2 SMM STM support functions
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #include <Library/DebugLib.h>
17 #define IA32_PG_P BIT0
18 #define IA32_PG_RW BIT1
19 #define IA32_PG_PS BIT7
23 Create 4G page table for STM.
24 2M PAE page table in X64 version.
26 @param PageTableBase The page table base in MSEG
31 IN UINTN PageTableBase
40 Pml4
= (UINT64
*)(UINTN
)PageTableBase
;
41 PageTableBase
+= SIZE_4KB
;
42 *Pml4
= PageTableBase
| IA32_PG_RW
| IA32_PG_P
;
44 Pde
= (UINT64
*)(UINTN
)PageTableBase
;
45 PageTableBase
+= SIZE_4KB
;
46 Pte
= (UINT64
*)(UINTN
)PageTableBase
;
48 for (Index
= 0; Index
< 4; Index
++) {
49 *Pde
= PageTableBase
| IA32_PG_RW
| IA32_PG_P
;
51 PageTableBase
+= SIZE_4KB
;
53 for (SubIndex
= 0; SubIndex
< SIZE_4KB
/ sizeof (*Pte
); SubIndex
++) {
54 *Pte
= (((Index
<< 9) + SubIndex
) << 21) | IA32_PG_PS
| IA32_PG_RW
| IA32_PG_P
;
61 This is SMM exception handle.
62 Consumed by STM when exception happen.
64 @param Context STM protection exception stack frame
66 @return the EBX value for STM reference.
67 EBX = 0: resume SMM guest using register state found on exception stack.
68 EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the
69 TXT.ERRORCODE register and subsequently reset the system via
70 TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as
71 follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC
72 EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.
77 SmmStmExceptionHandler (
78 IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context
81 // TBD - SmmStmExceptionHandler, record information
82 DEBUG ((DEBUG_ERROR
, "SmmStmExceptionHandler ...\n"));
84 // Skip this instruction and continue;
86 Context
.X64StackFrame
->Rip
+= Context
.X64StackFrame
->VmcsExitInstructionLength
;