2 Page table manipulation functions for IA-32 processors
4 Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include "PiSmmCpuDxeSmm.h"
18 Create PageTable for SMM use.
20 @return PageTable Address
28 UINTN PageFaultHandlerHookAddress
;
29 IA32_IDT_GATE_DESCRIPTOR
*IdtEntry
;
33 // Initialize spin lock
35 InitializeSpinLock (mPFLock
);
37 if (FeaturePcdGet (PcdCpuSmmProfileEnable
)) {
39 // Set own Page Fault entry instead of the default one, because SMM Profile
40 // feature depends on IRET instruction to do Single Step
42 PageFaultHandlerHookAddress
= (UINTN
)PageFaultIdtHandlerSmmProfile
;
43 IdtEntry
= (IA32_IDT_GATE_DESCRIPTOR
*) gcSmiIdtr
.Base
;
44 IdtEntry
+= EXCEPT_IA32_PAGE_FAULT
;
45 IdtEntry
->Bits
.OffsetLow
= (UINT16
)PageFaultHandlerHookAddress
;
46 IdtEntry
->Bits
.Reserved_0
= 0;
47 IdtEntry
->Bits
.GateType
= IA32_IDT_GATE_TYPE_INTERRUPT_32
;
48 IdtEntry
->Bits
.OffsetHigh
= (UINT16
)(PageFaultHandlerHookAddress
>> 16);
51 // Register SMM Page Fault Handler
53 Status
= SmmRegisterExceptionHandler (&mSmmCpuService
, EXCEPT_IA32_PAGE_FAULT
, SmiPFHandler
);
54 ASSERT_EFI_ERROR (Status
);
58 // Additional SMM IDT initialization for SMM stack guard
60 if (FeaturePcdGet (PcdCpuSmmStackGuard
)) {
61 InitializeIDTSmmStackGuard ();
63 return Gen4GPageTable (TRUE
);
67 Page Fault handler for SMM use.
79 ThePage Fault handler wrapper for SMM use.
81 @param InterruptType Defines the type of interrupt or exception that
82 occurred on the processor.This parameter is processor architecture specific.
83 @param SystemContext A pointer to the processor context when
84 the interrupt occurred on the processor.
89 IN EFI_EXCEPTION_TYPE InterruptType
,
90 IN EFI_SYSTEM_CONTEXT SystemContext
95 ASSERT (InterruptType
== EXCEPT_IA32_PAGE_FAULT
);
97 AcquireSpinLock (mPFLock
);
99 PFAddress
= AsmReadCr2 ();
101 if ((FeaturePcdGet (PcdCpuSmmStackGuard
)) &&
102 (PFAddress
>= mCpuHotPlugData
.SmrrBase
) &&
103 (PFAddress
< (mCpuHotPlugData
.SmrrBase
+ mCpuHotPlugData
.SmrrSize
))) {
104 DEBUG ((DEBUG_ERROR
, "SMM stack overflow!\n"));
109 // If a page fault occurs in SMM range
111 if ((PFAddress
< mCpuHotPlugData
.SmrrBase
) ||
112 (PFAddress
>= mCpuHotPlugData
.SmrrBase
+ mCpuHotPlugData
.SmrrSize
)) {
113 if ((SystemContext
.SystemContextIa32
->ExceptionData
& IA32_PF_EC_ID
) != 0) {
114 DEBUG ((DEBUG_ERROR
, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress
));
116 DumpModuleInfoByIp (*(UINTN
*)(UINTN
)SystemContext
.SystemContextIa32
->Esp
);
122 if (FeaturePcdGet (PcdCpuSmmProfileEnable
)) {
123 SmmProfilePFHandler (
124 SystemContext
.SystemContextIa32
->Eip
,
125 SystemContext
.SystemContextIa32
->ExceptionData
128 SmiDefaultPFHandler ();
131 ReleaseSpinLock (mPFLock
);
135 This function sets memory attribute for page table.
138 SetPageTableAttributes (
148 BOOLEAN PageTableSplitted
;
150 DEBUG ((DEBUG_INFO
, "SetPageTableAttributes\n"));
153 // Disable write protection, because we need mark page table to be write protected.
154 // We need *write* page table memory, to mark itself to be *read only*.
156 AsmWriteCr0 (AsmReadCr0() & ~CR0_WP
);
159 DEBUG ((DEBUG_INFO
, "Start...\n"));
160 PageTableSplitted
= FALSE
;
162 L3PageTable
= (UINT64
*)GetPageTableBase ();
164 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L3PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
165 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
167 for (Index3
= 0; Index3
< 4; Index3
++) {
168 L2PageTable
= (UINT64
*)(UINTN
)(L3PageTable
[Index3
] & PAGING_4K_ADDRESS_MASK_64
);
169 if (L2PageTable
== NULL
) {
173 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L2PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
174 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
176 for (Index2
= 0; Index2
< SIZE_4KB
/sizeof(UINT64
); Index2
++) {
177 if ((L2PageTable
[Index2
] & IA32_PG_PS
) != 0) {
181 L1PageTable
= (UINT64
*)(UINTN
)(L2PageTable
[Index2
] & PAGING_4K_ADDRESS_MASK_64
);
182 if (L1PageTable
== NULL
) {
185 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS
)(UINTN
)L1PageTable
, SIZE_4KB
, EFI_MEMORY_RO
, &IsSplitted
);
186 PageTableSplitted
= (PageTableSplitted
|| IsSplitted
);
189 } while (PageTableSplitted
);
192 // Enable write protection, after page table updated.
194 AsmWriteCr0 (AsmReadCr0() | CR0_WP
);