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1 /** @file
2 Page table manipulation functions for IA-32 processors
3
4 Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PiSmmCpuDxeSmm.h"
16
17 /**
18 Create PageTable for SMM use.
19
20 @return PageTable Address
21
22 **/
23 UINT32
24 SmmInitPageTable (
25 VOID
26 )
27 {
28 UINTN PageFaultHandlerHookAddress;
29 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
30 EFI_STATUS Status;
31
32 //
33 // Initialize spin lock
34 //
35 InitializeSpinLock (mPFLock);
36
37 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
38 //
39 // Set own Page Fault entry instead of the default one, because SMM Profile
40 // feature depends on IRET instruction to do Single Step
41 //
42 PageFaultHandlerHookAddress = (UINTN)PageFaultIdtHandlerSmmProfile;
43 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) gcSmiIdtr.Base;
44 IdtEntry += EXCEPT_IA32_PAGE_FAULT;
45 IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;
46 IdtEntry->Bits.Reserved_0 = 0;
47 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
48 IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);
49 } else {
50 //
51 // Register SMM Page Fault Handler
52 //
53 Status = SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_PAGE_FAULT, SmiPFHandler);
54 ASSERT_EFI_ERROR (Status);
55 }
56
57 //
58 // Additional SMM IDT initialization for SMM stack guard
59 //
60 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
61 InitializeIDTSmmStackGuard ();
62 }
63 return Gen4GPageTable (TRUE);
64 }
65
66 /**
67 Page Fault handler for SMM use.
68
69 **/
70 VOID
71 SmiDefaultPFHandler (
72 VOID
73 )
74 {
75 CpuDeadLoop ();
76 }
77
78 /**
79 ThePage Fault handler wrapper for SMM use.
80
81 @param InterruptType Defines the type of interrupt or exception that
82 occurred on the processor.This parameter is processor architecture specific.
83 @param SystemContext A pointer to the processor context when
84 the interrupt occurred on the processor.
85 **/
86 VOID
87 EFIAPI
88 SmiPFHandler (
89 IN EFI_EXCEPTION_TYPE InterruptType,
90 IN EFI_SYSTEM_CONTEXT SystemContext
91 )
92 {
93 UINTN PFAddress;
94
95 ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);
96
97 AcquireSpinLock (mPFLock);
98
99 PFAddress = AsmReadCr2 ();
100
101 if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&
102 (PFAddress >= mCpuHotPlugData.SmrrBase) &&
103 (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {
104 DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));
105 CpuDeadLoop ();
106 }
107
108 //
109 // If a page fault occurs in SMM range
110 //
111 if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
112 (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
113 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {
114 DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));
115 DEBUG_CODE (
116 DumpModuleInfoByIp (*(UINTN *)(UINTN)SystemContext.SystemContextIa32->Esp);
117 );
118 CpuDeadLoop ();
119 }
120 }
121
122 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
123 SmmProfilePFHandler (
124 SystemContext.SystemContextIa32->Eip,
125 SystemContext.SystemContextIa32->ExceptionData
126 );
127 } else {
128 SmiDefaultPFHandler ();
129 }
130
131 ReleaseSpinLock (mPFLock);
132 }
133
134 /**
135 This function sets memory attribute for page table.
136 **/
137 VOID
138 SetPageTableAttributes (
139 VOID
140 )
141 {
142 UINTN Index2;
143 UINTN Index3;
144 UINT64 *L1PageTable;
145 UINT64 *L2PageTable;
146 UINT64 *L3PageTable;
147 BOOLEAN IsSplitted;
148 BOOLEAN PageTableSplitted;
149
150 DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));
151
152 //
153 // Disable write protection, because we need mark page table to be write protected.
154 // We need *write* page table memory, to mark itself to be *read only*.
155 //
156 AsmWriteCr0 (AsmReadCr0() & ~CR0_WP);
157
158 do {
159 DEBUG ((DEBUG_INFO, "Start...\n"));
160 PageTableSplitted = FALSE;
161
162 L3PageTable = (UINT64 *)GetPageTableBase ();
163
164 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L3PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
165 PageTableSplitted = (PageTableSplitted || IsSplitted);
166
167 for (Index3 = 0; Index3 < 4; Index3++) {
168 L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & PAGING_4K_ADDRESS_MASK_64);
169 if (L2PageTable == NULL) {
170 continue;
171 }
172
173 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L2PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
174 PageTableSplitted = (PageTableSplitted || IsSplitted);
175
176 for (Index2 = 0; Index2 < SIZE_4KB/sizeof(UINT64); Index2++) {
177 if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
178 // 2M
179 continue;
180 }
181 L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & PAGING_4K_ADDRESS_MASK_64);
182 if (L1PageTable == NULL) {
183 continue;
184 }
185 SmmSetMemoryAttributesEx ((EFI_PHYSICAL_ADDRESS)(UINTN)L1PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
186 PageTableSplitted = (PageTableSplitted || IsSplitted);
187 }
188 }
189 } while (PageTableSplitted);
190
191 //
192 // Enable write protection, after page table updated.
193 //
194 AsmWriteCr0 (AsmReadCr0() | CR0_WP);
195
196 return ;
197 }