UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm

   1 ;------------------------------------------------------------------------------ ;
   2 ; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
   3 ; This program and the accompanying materials
   4 ; are licensed and made available under the terms and conditions of the BSD License
   5 ; which accompanies this distribution.  The full text of the license may be found at
   6 ; http://opensource.org/licenses/bsd-license.php.
   7 ;
   8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  10 ;
  11 ; Module Name:
  12 ;
  13 ;   SmiEntry.asm
  14 ;
  15 ; Abstract:
  16 ;
  17 ;   Code template of the SMI handler for a particular processor
  18 ;
  19 ;-------------------------------------------------------------------------------
  20
  21     .686p
  22     .model  flat,C
  23     .xmm
  24
  25 DSC_OFFSET    EQU     0fb00h
  26 DSC_GDTPTR    EQU     30h
  27 DSC_GDTSIZ    EQU     38h
  28 DSC_CS        EQU     14
  29 DSC_DS        EQU     16
  30 DSC_SS        EQU     18
  31 DSC_OTHERSEG  EQU     20
  32
  33 PROTECT_MODE_CS EQU   08h
  34 PROTECT_MODE_DS EQU   20h
  35 TSS_SEGMENT     EQU   40h
  36
  37 SmiRendezvous   PROTO   C
  38
  39 EXTERNDEF   gcSmiHandlerTemplate:BYTE
  40 EXTERNDEF   gcSmiHandlerSize:WORD
  41 EXTERNDEF   gSmiCr3:DWORD
  42 EXTERNDEF   gSmiStack:DWORD
  43 EXTERNDEF   gSmbase:DWORD
  44 EXTERNDEF   FeaturePcdGet (PcdCpuSmmDebug):BYTE
  45 EXTERNDEF   FeaturePcdGet (PcdCpuSmmStackGuard):BYTE
  46 EXTERNDEF   gSmiHandlerIdtr:FWORD
  47
  48     .code
  49
  50 gcSmiHandlerTemplate    LABEL   BYTE
  51
  52 _SmiEntryPoint:
  53     DB      0bbh                        ; mov bx, imm16
  54     DW      offset _GdtDesc - _SmiEntryPoint + 8000h
  55     DB      2eh, 0a1h                   ; mov ax, cs:[offset16]
  56     DW      DSC_OFFSET + DSC_GDTSIZ
  57     dec     eax
  58     mov     cs:[edi], eax               ; mov cs:[bx], ax
  59     DB      66h, 2eh, 0a1h              ; mov eax, cs:[offset16]
  60     DW      DSC_OFFSET + DSC_GDTPTR
  61     mov     cs:[edi + 2], ax            ; mov cs:[bx + 2], eax
  62     mov     bp, ax                      ; ebp = GDT base
  63     DB      66h
  64     lgdt    fword ptr cs:[edi]          ; lgdt fword ptr cs:[bx]
  65 ; Patch ProtectedMode Segment
  66     DB      0b8h                        ; mov ax, imm16
  67     DW      PROTECT_MODE_CS             ; set AX for segment directly
  68     mov     cs:[edi - 2], eax           ; mov cs:[bx - 2], ax
  69 ; Patch ProtectedMode entry
  70     DB      66h, 0bfh                   ; mov edi, SMBASE
  71 gSmbase    DD    ?
  72     DB      67h
  73     lea     ax, [edi + (@32bit - _SmiEntryPoint) + 8000h]
  74     mov     cs:[edi - 6], ax            ; mov cs:[bx - 6], eax
  75     mov     ebx, cr0
  76     DB      66h
  77     and     ebx, 9ffafff3h
  78     DB      66h
  79     or      ebx, 23h
  80     mov     cr0, ebx
  81     DB      66h, 0eah
  82     DD      ?
  83     DW      ?
  84 _GdtDesc    FWORD   ?
  85
  86 @32bit:
  87     mov     ax, PROTECT_MODE_DS
  88     mov     ds, ax
  89     mov     es, ax
  90     mov     fs, ax
  91     mov     gs, ax
  92     mov     ss, ax
  93     DB      0bch                   ; mov esp, imm32
  94 gSmiStack   DD      ?
  95     mov     eax, offset gSmiHandlerIdtr
  96     lidt    fword ptr [eax]
  97     jmp     ProtFlatMode
  98
  99 ProtFlatMode:
 100     DB      0b8h                        ; mov eax, imm32
 101 gSmiCr3     DD      ?
 102     mov     cr3, eax
 103 ;
 104 ; Need to test for CR4 specific bit support
 105 ;
 106     mov     eax, 1
 107     cpuid                               ; use CPUID to determine if specific CR4 bits are supported
 108     xor     eax, eax                    ; Clear EAX
 109     test    edx, BIT2                   ; Check for DE capabilities
 110     jz      @f
 111     or      eax, BIT3
 112 @@:
 113     test    edx, BIT6                   ; Check for PAE capabilities
 114     jz      @f
 115     or      eax, BIT5
 116 @@:
 117     test    edx, BIT7                   ; Check for MCE capabilities
 118     jz      @f
 119     or      eax, BIT6
 120 @@:
 121     test    edx, BIT24                  ; Check for FXSR capabilities
 122     jz      @f
 123     or      eax, BIT9
 124 @@:
 125     test    edx, BIT25                  ; Check for SSE capabilities
 126     jz      @f
 127     or      eax, BIT10
 128 @@:                                     ; as cr4.PGE is not set here, refresh cr3
 129     mov     cr4, eax                    ; in PreModifyMtrrs() to flush TLB.
 130     mov     ebx, cr0
 131     or      ebx, 080000000h             ; enable paging
 132     mov     cr0, ebx
 133     lea     ebx, [edi + DSC_OFFSET]
 134     mov     ax, [ebx + DSC_DS]
 135     mov     ds, eax
 136     mov     ax, [ebx + DSC_OTHERSEG]
 137     mov     es, eax
 138     mov     fs, eax
 139     mov     gs, eax
 140     mov     ax, [ebx + DSC_SS]
 141     mov     ss, eax
 142
 143     cmp     FeaturePcdGet (PcdCpuSmmStackGuard), 0
 144     jz      @F
 145
 146 ; Load TSS
 147     mov     byte ptr [ebp + TSS_SEGMENT + 5], 89h ; clear busy flag
 148     mov     eax, TSS_SEGMENT
 149     ltr     ax
 150 @@:
 151 ;   jmp     _SmiHandler                 ; instruction is not needed
 152
 153 _SmiHandler PROC
 154     cmp     FeaturePcdGet (PcdCpuSmmDebug), 0
 155     jz      @3
 156     call    @1
 157 @1:
 158     pop     ebp
 159     mov     eax, 80000001h
 160     cpuid
 161     bt      edx, 29                     ; check cpuid to identify X64 or IA32
 162     lea     edi, [ebp - (@1 - _SmiEntryPoint) + 7fc8h]
 163     lea     esi, [edi + 4]
 164     jnc     @2
 165     add     esi, 4
 166 @2:
 167     mov     ecx, [esi]
 168     mov     edx, [edi]
 169 @5:
 170     mov     dr6, ecx
 171     mov     dr7, edx                    ; restore DR6 & DR7 before running C code
 172 @3:
 173     mov     ecx, [esp]                  ; CPU Index
 174
 175     push    ecx
 176     mov     eax, SmiRendezvous
 177     call    eax
 178     pop     ecx
 179
 180     cmp     FeaturePcdGet (PcdCpuSmmDebug), 0
 181     jz      @4
 182
 183     mov     ecx, dr6
 184     mov     edx, dr7
 185     mov     [esi], ecx
 186     mov     [edi], edx
 187 @4:
 188     rsm
 189 _SmiHandler ENDP
 190
 191 gcSmiHandlerSize    DW      $ - _SmiEntryPoint
 192
 193     END