UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm

   1 ;------------------------------------------------------------------------------ ;
   2 ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   3 ; This program and the accompanying materials
   4 ; are licensed and made available under the terms and conditions of the BSD License
   5 ; which accompanies this distribution.  The full text of the license may be found at
   6 ; http://opensource.org/licenses/bsd-license.php.
   7 ;
   8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  10 ;
  11 ; Module Name:
  12 ;
  13 ;   SmmInit.nasm
  14 ;
  15 ; Abstract:
  16 ;
  17 ;   Functions for relocating SMBASE's for all processors
  18 ;
  19 ;-------------------------------------------------------------------------------
  20
  21 extern ASM_PFX(SmmInitHandler)
  22 extern ASM_PFX(mRebasedFlag)
  23 extern ASM_PFX(mSmmRelocationOriginalAddress)
  24
  25 global ASM_PFX(gPatchSmmCr3)
  26 global ASM_PFX(gPatchSmmCr4)
  27 global ASM_PFX(gPatchSmmCr0)
  28 global ASM_PFX(gSmmInitStack)
  29 global ASM_PFX(gcSmiInitGdtr)
  30 global ASM_PFX(gcSmmInitSize)
  31 global ASM_PFX(gcSmmInitTemplate)
  32
  33 %define PROTECT_MODE_CS 0x8
  34 %define PROTECT_MODE_DS 0x20
  35
  36     SECTION .text
  37
  38 ASM_PFX(gcSmiInitGdtr):
  39             DW      0
  40             DQ      0
  41
  42 global ASM_PFX(SmmStartup)
  43
  44 BITS 16
  45 ASM_PFX(SmmStartup):
  46     mov     eax, 0x80000001             ; read capability
  47     cpuid
  48     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.
  49     and     ebx, BIT20                  ; extract NX capability bit
  50     shr     ebx, 9                      ; shift bit to IA32_EFER.NXE[BIT11] position
  51     mov     eax, strict dword 0         ; source operand will be patched
  52 ASM_PFX(gPatchSmmCr3):
  53     mov     cr3, eax
  54 o32 lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
  55     mov     eax, strict dword 0         ; source operand will be patched
  56 ASM_PFX(gPatchSmmCr4):
  57     mov     cr4, eax
  58     mov     ecx, 0xc0000080             ; IA32_EFER MSR
  59     rdmsr
  60     or      eax, ebx                    ; set NXE bit if NX is available
  61     wrmsr
  62     mov     eax, strict dword 0         ; source operand will be patched
  63 ASM_PFX(gPatchSmmCr0):
  64     mov     di, PROTECT_MODE_DS
  65     mov     cr0, eax
  66     jmp     PROTECT_MODE_CS : dword @32bit
  67
  68 BITS 32
  69 @32bit:
  70     mov     ds, edi
  71     mov     es, edi
  72     mov     fs, edi
  73     mov     gs, edi
  74     mov     ss, edi
  75     DB      0xbc                        ; mov esp, imm32
  76 ASM_PFX(gSmmInitStack): DD 0
  77     call    ASM_PFX(SmmInitHandler)
  78     rsm
  79
  80 BITS 16
  81 ASM_PFX(gcSmmInitTemplate):
  82     mov ebp, ASM_PFX(SmmStartup)
  83     sub ebp, 0x30000
  84     jmp ebp
  85
  86 ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
  87
  88 BITS 32
  89 global ASM_PFX(SmmRelocationSemaphoreComplete)
  90 ASM_PFX(SmmRelocationSemaphoreComplete):
  91     push    eax
  92     mov     eax, [ASM_PFX(mRebasedFlag)]
  93     mov     byte [eax], 1
  94     pop     eax
  95     jmp     [ASM_PFX(mSmmRelocationOriginalAddress)]
  96
  97 global ASM_PFX(PiSmmCpuSmmInitFixupAddress)
  98 ASM_PFX(PiSmmCpuSmmInitFixupAddress):
  99     ret