UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

   1 /** @file
   2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
   3
   4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
   5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef _CPU_PISMMCPUDXESMM_H_
  18 #define _CPU_PISMMCPUDXESMM_H_
  19
  20 #include <PiSmm.h>
  21
  22 #include <Protocol/MpService.h>
  23 #include <Protocol/SmmConfiguration.h>
  24 #include <Protocol/SmmCpu.h>
  25 #include <Protocol/SmmAccess2.h>
  26 #include <Protocol/SmmReadyToLock.h>
  27 #include <Protocol/SmmCpuService.h>
  28 #include <Protocol/SmmMemoryAttribute.h>
  29
  30 #include <Guid/AcpiS3Context.h>
  31 #include <Guid/MemoryAttributesTable.h>
  32 #include <Guid/PiSmmMemoryAttributesTable.h>
  33
  34 #include <Library/BaseLib.h>
  35 #include <Library/IoLib.h>
  36 #include <Library/TimerLib.h>
  37 #include <Library/SynchronizationLib.h>
  38 #include <Library/DebugLib.h>
  39 #include <Library/BaseMemoryLib.h>
  40 #include <Library/PcdLib.h>
  41 #include <Library/MtrrLib.h>
  42 #include <Library/SmmCpuPlatformHookLib.h>
  43 #include <Library/SmmServicesTableLib.h>
  44 #include <Library/MemoryAllocationLib.h>
  45 #include <Library/UefiBootServicesTableLib.h>
  46 #include <Library/UefiRuntimeServicesTableLib.h>
  47 #include <Library/DebugAgentLib.h>
  48 #include <Library/UefiLib.h>
  49 #include <Library/HobLib.h>
  50 #include <Library/LocalApicLib.h>
  51 #include <Library/UefiCpuLib.h>
  52 #include <Library/CpuExceptionHandlerLib.h>
  53 #include <Library/ReportStatusCodeLib.h>
  54 #include <Library/SmmCpuFeaturesLib.h>
  55 #include <Library/PeCoffGetEntryPointLib.h>
  56
  57 #include <AcpiCpuData.h>
  58 #include <CpuHotPlugData.h>
  59
  60 #include <Register/Cpuid.h>
  61 #include <Register/Msr.h>
  62
  63 #include "CpuService.h"
  64 #include "SmmProfile.h"
  65
  66 //
  67 // MSRs required for configuration of SMM Code Access Check
  68 //
  69 #define EFI_MSR_SMM_MCA_CAP                    0x17D
  70 #define  SMM_CODE_ACCESS_CHK_BIT               BIT58
  71
  72 #define  SMM_FEATURE_CONTROL_LOCK_BIT          BIT0
  73 #define  SMM_CODE_CHK_EN_BIT                   BIT2
  74
  75 ///
  76 /// Page Table Entry
  77 ///
  78 #define IA32_PG_P                   BIT0
  79 #define IA32_PG_RW                  BIT1
  80 #define IA32_PG_U                   BIT2
  81 #define IA32_PG_WT                  BIT3
  82 #define IA32_PG_CD                  BIT4
  83 #define IA32_PG_A                   BIT5
  84 #define IA32_PG_D                   BIT6
  85 #define IA32_PG_PS                  BIT7
  86 #define IA32_PG_PAT_2M              BIT12
  87 #define IA32_PG_PAT_4K              IA32_PG_PS
  88 #define IA32_PG_PMNT                BIT62
  89 #define IA32_PG_NX                  BIT63
  90
  91 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
  92 //
  93 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
  94 // X64 PAE PDPTE does not have such restriction
  95 //
  96 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
  97
  98 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
  99
 100 #define PAGING_4K_MASK  0xFFF
 101 #define PAGING_2M_MASK  0x1FFFFF
 102 #define PAGING_1G_MASK  0x3FFFFFFF
 103
 104 #define PAGING_PAE_INDEX_MASK  0x1FF
 105
 106 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
 107 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
 108 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
 109
 110 #define SMRR_MAX_ADDRESS       BASE_4GB
 111
 112 typedef enum {
 113   PageNone,
 114   Page4K,
 115   Page2M,
 116   Page1G,
 117 } PAGE_ATTRIBUTE;
 118
 119 typedef struct {
 120   PAGE_ATTRIBUTE   Attribute;
 121   UINT64           Length;
 122   UINT64           AddressMask;
 123 } PAGE_ATTRIBUTE_TABLE;
 124
 125 //
 126 // Size of Task-State Segment defined in IA32 Manual
 127 //
 128 #define TSS_SIZE              104
 129 #define TSS_X64_IST1_OFFSET   36
 130 #define TSS_IA32_CR3_OFFSET   28
 131 #define TSS_IA32_ESP_OFFSET   56
 132
 133 #define CR0_WP                BIT16
 134
 135 //
 136 // Code select value
 137 //
 138 #define PROTECT_MODE_CODE_SEGMENT          0x08
 139 #define LONG_MODE_CODE_SEGMENT             0x38
 140
 141 //
 142 // The size 0x20 must be bigger than
 143 // the size of template code of SmmInit. Currently,
 144 // the size of SmmInit requires the 0x16 Bytes buffer
 145 // at least.
 146 //
 147 #define BACK_BUF_SIZE  0x20
 148
 149 #define EXCEPTION_VECTOR_NUMBER     0x20
 150
 151 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
 152
 153 typedef UINT32                              SMM_CPU_ARRIVAL_EXCEPTIONS;
 154 #define ARRIVAL_EXCEPTION_BLOCKED           0x1
 155 #define ARRIVAL_EXCEPTION_DELAYED           0x2
 156 #define ARRIVAL_EXCEPTION_SMI_DISABLED      0x4
 157
 158 //
 159 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
 160 // Contains the SMM Configuration Protocols that is produced.
 161 // Contains a mix of DXE and SMM contents.  All the fields must be used properly.
 162 //
 163 #define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 164
 165 typedef struct {
 166   UINTN                           Signature;
 167
 168   EFI_HANDLE                      SmmCpuHandle;
 169
 170   EFI_PROCESSOR_INFORMATION       *ProcessorInfo;
 171   SMM_CPU_OPERATION               *Operation;
 172   UINTN                           *CpuSaveStateSize;
 173   VOID                            **CpuSaveState;
 174
 175   EFI_SMM_RESERVED_SMRAM_REGION   SmmReservedSmramRegion[1];
 176   EFI_SMM_ENTRY_CONTEXT           SmmCoreEntryContext;
 177   EFI_SMM_ENTRY_POINT             SmmCoreEntry;
 178
 179   EFI_SMM_CONFIGURATION_PROTOCOL  SmmConfiguration;
 180 } SMM_CPU_PRIVATE_DATA;
 181
 182 extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
 183 extern CPU_HOT_PLUG_DATA      mCpuHotPlugData;
 184 extern UINTN                  mMaxNumberOfCpus;
 185 extern UINTN                  mNumberOfCpus;
 186 extern EFI_SMM_CPU_PROTOCOL   mSmmCpu;
 187
 188 ///
 189 /// The mode of the CPU at the time an SMI occurs
 190 ///
 191 extern UINT8  mSmmSaveStateRegisterLma;
 192
 193 //
 194 // SMM CPU Protocol function prototypes.
 195 //
 196
 197 /**
 198   Read information from the CPU save state.
 199
 200   @param  This      EFI_SMM_CPU_PROTOCOL instance
 201   @param  Width     The number of bytes to read from the CPU save state.
 202   @param  Register  Specifies the CPU register to read form the save state.
 203   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 204   @param  Buffer    Upon return, this holds the CPU register value read from the save state.
 205
 206   @retval EFI_SUCCESS   The register was read from Save State
 207   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 208   @retval EFI_INVALID_PARAMTER   This or Buffer is NULL.
 209
 210 **/
 211 EFI_STATUS
 212 EFIAPI
 213 SmmReadSaveState (
 214   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 215   IN UINTN                              Width,
 216   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 217   IN UINTN                              CpuIndex,
 218   OUT VOID                              *Buffer
 219   );
 220
 221 /**
 222   Write data to the CPU save state.
 223
 224   @param  This      EFI_SMM_CPU_PROTOCOL instance
 225   @param  Width     The number of bytes to read from the CPU save state.
 226   @param  Register  Specifies the CPU register to write to the save state.
 227   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 228   @param  Buffer    Upon entry, this holds the new CPU register value.
 229
 230   @retval EFI_SUCCESS   The register was written from Save State
 231   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 232   @retval EFI_INVALID_PARAMTER   ProcessorIndex or Width is not correct
 233
 234 **/
 235 EFI_STATUS
 236 EFIAPI
 237 SmmWriteSaveState (
 238   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 239   IN UINTN                              Width,
 240   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 241   IN UINTN                              CpuIndex,
 242   IN CONST VOID                         *Buffer
 243   );
 244
 245 /**
 246 Read a CPU Save State register on the target processor.
 247
 248 This function abstracts the differences that whether the CPU Save State register is in the
 249 IA32 CPU Save State Map or X64 CPU Save State Map.
 250
 251 This function supports reading a CPU Save State register in SMBase relocation handler.
 252
 253 @param[in]  CpuIndex       Specifies the zero-based index of the CPU save state.
 254 @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 255 @param[in]  Width          The number of bytes to read from the CPU save state.
 256 @param[out] Buffer         Upon return, this holds the CPU register value read from the save state.
 257
 258 @retval EFI_SUCCESS           The register was read from Save State.
 259 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 260 @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 261
 262 **/
 263 EFI_STATUS
 264 EFIAPI
 265 ReadSaveStateRegister (
 266   IN UINTN                        CpuIndex,
 267   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 268   IN UINTN                        Width,
 269   OUT VOID                        *Buffer
 270   );
 271
 272 /**
 273 Write value to a CPU Save State register on the target processor.
 274
 275 This function abstracts the differences that whether the CPU Save State register is in the
 276 IA32 CPU Save State Map or X64 CPU Save State Map.
 277
 278 This function supports writing a CPU Save State register in SMBase relocation handler.
 279
 280 @param[in] CpuIndex       Specifies the zero-based index of the CPU save state.
 281 @param[in] RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 282 @param[in] Width          The number of bytes to read from the CPU save state.
 283 @param[in] Buffer         Upon entry, this holds the new CPU register value.
 284
 285 @retval EFI_SUCCESS           The register was written to Save State.
 286 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 287 @retval EFI_INVALID_PARAMTER  ProcessorIndex or Width is not correct.
 288
 289 **/
 290 EFI_STATUS
 291 EFIAPI
 292 WriteSaveStateRegister (
 293   IN UINTN                        CpuIndex,
 294   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 295   IN UINTN                        Width,
 296   IN CONST VOID                   *Buffer
 297   );
 298
 299 extern CONST UINT8                  gcSmmInitTemplate[];
 300 extern CONST UINT16                 gcSmmInitSize;
 301 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr0;
 302 extern UINT32                       mSmmCr0;
 303 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr3;
 304 extern UINT32                       mSmmCr4;
 305 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr4;
 306 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmInitStack;
 307
 308 /**
 309   Semaphore operation for all processor relocate SMMBase.
 310 **/
 311 VOID
 312 EFIAPI
 313 SmmRelocationSemaphoreComplete (
 314   VOID
 315   );
 316
 317 ///
 318 /// The type of SMM CPU Information
 319 ///
 320 typedef struct {
 321   SPIN_LOCK                         *Busy;
 322   volatile EFI_AP_PROCEDURE         Procedure;
 323   volatile VOID                     *Parameter;
 324   volatile UINT32                   *Run;
 325   volatile BOOLEAN                  *Present;
 326 } SMM_CPU_DATA_BLOCK;
 327
 328 typedef enum {
 329   SmmCpuSyncModeTradition,
 330   SmmCpuSyncModeRelaxedAp,
 331   SmmCpuSyncModeMax
 332 } SMM_CPU_SYNC_MODE;
 333
 334 typedef struct {
 335   //
 336   // Pointer to an array. The array should be located immediately after this structure
 337   // so that UC cache-ability can be set together.
 338   //
 339   SMM_CPU_DATA_BLOCK            *CpuData;
 340   volatile UINT32               *Counter;
 341   volatile UINT32               BspIndex;
 342   volatile BOOLEAN              *InsideSmm;
 343   volatile BOOLEAN              *AllCpusInSync;
 344   volatile SMM_CPU_SYNC_MODE    EffectiveSyncMode;
 345   volatile BOOLEAN              SwitchBsp;
 346   volatile BOOLEAN              *CandidateBsp;
 347 } SMM_DISPATCHER_MP_SYNC_DATA;
 348
 349 #define MSR_SPIN_LOCK_INIT_NUM 15
 350
 351 typedef struct {
 352   SPIN_LOCK    *SpinLock;
 353   UINT32       MsrIndex;
 354 } MP_MSR_LOCK;
 355
 356 #define SMM_PSD_OFFSET              0xfb00
 357
 358 ///
 359 /// All global semaphores' pointer
 360 ///
 361 typedef struct {
 362   volatile UINT32      *Counter;
 363   volatile BOOLEAN     *InsideSmm;
 364   volatile BOOLEAN     *AllCpusInSync;
 365   SPIN_LOCK            *PFLock;
 366   SPIN_LOCK            *CodeAccessCheckLock;
 367   SPIN_LOCK            *MemoryMappedLock;
 368 } SMM_CPU_SEMAPHORE_GLOBAL;
 369
 370 ///
 371 /// All semaphores for each processor
 372 ///
 373 typedef struct {
 374   SPIN_LOCK                         *Busy;
 375   volatile UINT32                   *Run;
 376   volatile BOOLEAN                  *Present;
 377 } SMM_CPU_SEMAPHORE_CPU;
 378
 379 ///
 380 /// All MSRs semaphores' pointer and counter
 381 ///
 382 typedef struct {
 383   SPIN_LOCK            *Msr;
 384   UINTN                AvailableCounter;
 385 } SMM_CPU_SEMAPHORE_MSR;
 386
 387 ///
 388 /// All semaphores' information
 389 ///
 390 typedef struct {
 391   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;
 392   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;
 393   SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;
 394 } SMM_CPU_SEMAPHORES;
 395
 396 extern IA32_DESCRIPTOR                     gcSmiGdtr;
 397 extern EFI_PHYSICAL_ADDRESS                mGdtBuffer;
 398 extern UINTN                               mGdtBufferSize;
 399 extern IA32_DESCRIPTOR                     gcSmiIdtr;
 400 extern VOID                                *gcSmiIdtrPtr;
 401 extern UINT64                              gPhyMask;
 402 extern SMM_DISPATCHER_MP_SYNC_DATA         *mSmmMpSyncData;
 403 extern UINTN                               mSmmStackArrayBase;
 404 extern UINTN                               mSmmStackArrayEnd;
 405 extern UINTN                               mSmmStackSize;
 406 extern EFI_SMM_CPU_SERVICE_PROTOCOL        mSmmCpuService;
 407 extern IA32_DESCRIPTOR                     gcSmiInitGdtr;
 408 extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 409 extern UINTN                               mSemaphoreSize;
 410 extern SPIN_LOCK                           *mPFLock;
 411 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;
 412 extern SPIN_LOCK                           *mMemoryMappedLock;
 413 extern EFI_SMRAM_DESCRIPTOR                *mSmmCpuSmramRanges;
 414 extern UINTN                               mSmmCpuSmramRangeCount;
 415 extern UINT8                               mPhysicalAddressBits;
 416
 417 //
 418 // Copy of the PcdPteMemoryEncryptionAddressOrMask
 419 //
 420 extern UINT64  mAddressEncMask;
 421
 422 /**
 423   Create 4G PageTable in SMRAM.
 424
 425   @param[in]      Is32BitPageTable Whether the page table is 32-bit PAE
 426   @return         PageTable Address
 427
 428 **/
 429 UINT32
 430 Gen4GPageTable (
 431   IN      BOOLEAN                   Is32BitPageTable
 432   );
 433
 434
 435 /**
 436   Initialize global data for MP synchronization.
 437
 438   @param Stacks       Base address of SMI stack buffer for all processors.
 439   @param StackSize    Stack size for each processor in SMM.
 440
 441 **/
 442 UINT32
 443 InitializeMpServiceData (
 444   IN VOID        *Stacks,
 445   IN UINTN       StackSize
 446   );
 447
 448 /**
 449   Initialize Timer for SMM AP Sync.
 450
 451 **/
 452 VOID
 453 InitializeSmmTimer (
 454   VOID
 455   );
 456
 457 /**
 458   Start Timer for SMM AP Sync.
 459
 460 **/
 461 UINT64
 462 EFIAPI
 463 StartSyncTimer (
 464   VOID
 465   );
 466
 467 /**
 468   Check if the SMM AP Sync timer is timeout.
 469
 470   @param Timer  The start timer from the begin.
 471
 472 **/
 473 BOOLEAN
 474 EFIAPI
 475 IsSyncTimerTimeout (
 476   IN      UINT64                    Timer
 477   );
 478
 479 /**
 480   Initialize IDT for SMM Stack Guard.
 481
 482 **/
 483 VOID
 484 EFIAPI
 485 InitializeIDTSmmStackGuard (
 486   VOID
 487   );
 488
 489 /**
 490   Initialize Gdt for all processors.
 491
 492   @param[in]   Cr3          CR3 value.
 493   @param[out]  GdtStepSize  The step size for GDT table.
 494
 495   @return GdtBase for processor 0.
 496           GdtBase for processor X is: GdtBase + (GdtStepSize * X)
 497 **/
 498 VOID *
 499 InitGdt (
 500   IN  UINTN  Cr3,
 501   OUT UINTN  *GdtStepSize
 502   );
 503
 504 /**
 505
 506   Register the SMM Foundation entry point.
 507
 508   @param          This              Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
 509   @param          SmmEntryPoint     SMM Foundation EntryPoint
 510
 511   @retval         EFI_SUCCESS       Successfully to register SMM foundation entry point
 512
 513 **/
 514 EFI_STATUS
 515 EFIAPI
 516 RegisterSmmEntry (
 517   IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
 518   IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
 519   );
 520
 521 /**
 522   Create PageTable for SMM use.
 523
 524   @return     PageTable Address
 525
 526 **/
 527 UINT32
 528 SmmInitPageTable (
 529   VOID
 530   );
 531
 532 /**
 533   Schedule a procedure to run on the specified CPU.
 534
 535   @param   Procedure        The address of the procedure to run
 536   @param   CpuIndex         Target CPU number
 537   @param   ProcArguments    The parameter to pass to the procedure
 538
 539   @retval   EFI_INVALID_PARAMETER    CpuNumber not valid
 540   @retval   EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 541   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 542   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 543   @retval   EFI_SUCCESS - The procedure has been successfully scheduled
 544
 545 **/
 546 EFI_STATUS
 547 EFIAPI
 548 SmmStartupThisAp (
 549   IN      EFI_AP_PROCEDURE          Procedure,
 550   IN      UINTN                     CpuIndex,
 551   IN OUT  VOID                      *ProcArguments OPTIONAL
 552   );
 553
 554 /**
 555   Schedule a procedure to run on the specified CPU in a blocking fashion.
 556
 557   @param  Procedure                The address of the procedure to run
 558   @param  CpuIndex                 Target CPU Index
 559   @param  ProcArguments            The parameter to pass to the procedure
 560
 561   @retval EFI_INVALID_PARAMETER    CpuNumber not valid
 562   @retval EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 563   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 564   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 565   @retval EFI_SUCCESS              The procedure has been successfully scheduled
 566
 567 **/
 568 EFI_STATUS
 569 EFIAPI
 570 SmmBlockingStartupThisAp (
 571   IN      EFI_AP_PROCEDURE          Procedure,
 572   IN      UINTN                     CpuIndex,
 573   IN OUT  VOID                      *ProcArguments OPTIONAL
 574   );
 575
 576 /**
 577   This function sets the attributes for the memory region specified by BaseAddress and
 578   Length from their current attributes to the attributes specified by Attributes.
 579
 580   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 581   @param[in]  Length           The size in bytes of the memory region.
 582   @param[in]  Attributes       The bit mask of attributes to set for the memory region.
 583
 584   @retval EFI_SUCCESS           The attributes were set for the memory region.
 585   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 586                                 BaseAddress and Length cannot be modified.
 587   @retval EFI_INVALID_PARAMETER Length is zero.
 588                                 Attributes specified an illegal combination of attributes that
 589                                 cannot be set together.
 590   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 591                                 the memory resource range.
 592   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 593                                 resource range specified by BaseAddress and Length.
 594                                 The bit mask of attributes is not support for the memory resource
 595                                 range specified by BaseAddress and Length.
 596
 597 **/
 598 EFI_STATUS
 599 EFIAPI
 600 SmmSetMemoryAttributes (
 601   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 602   IN  UINT64                                     Length,
 603   IN  UINT64                                     Attributes
 604   );
 605
 606 /**
 607   This function clears the attributes for the memory region specified by BaseAddress and
 608   Length from their current attributes to the attributes specified by Attributes.
 609
 610   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 611   @param[in]  Length           The size in bytes of the memory region.
 612   @param[in]  Attributes       The bit mask of attributes to clear for the memory region.
 613
 614   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 615   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 616                                 BaseAddress and Length cannot be modified.
 617   @retval EFI_INVALID_PARAMETER Length is zero.
 618                                 Attributes specified an illegal combination of attributes that
 619                                 cannot be set together.
 620   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 621                                 the memory resource range.
 622   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 623                                 resource range specified by BaseAddress and Length.
 624                                 The bit mask of attributes is not support for the memory resource
 625                                 range specified by BaseAddress and Length.
 626
 627 **/
 628 EFI_STATUS
 629 EFIAPI
 630 SmmClearMemoryAttributes (
 631   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 632   IN  UINT64                                     Length,
 633   IN  UINT64                                     Attributes
 634   );
 635
 636 /**
 637   Initialize MP synchronization data.
 638
 639 **/
 640 VOID
 641 EFIAPI
 642 InitializeMpSyncData (
 643   VOID
 644   );
 645
 646 /**
 647
 648   Find out SMRAM information including SMRR base and SMRR size.
 649
 650   @param          SmrrBase          SMRR base
 651   @param          SmrrSize          SMRR size
 652
 653 **/
 654 VOID
 655 FindSmramInfo (
 656   OUT UINT32   *SmrrBase,
 657   OUT UINT32   *SmrrSize
 658   );
 659
 660 /**
 661   Relocate SmmBases for each processor.
 662
 663   Execute on first boot and all S3 resumes
 664
 665 **/
 666 VOID
 667 EFIAPI
 668 SmmRelocateBases (
 669   VOID
 670   );
 671
 672 /**
 673   Page Fault handler for SMM use.
 674
 675   @param  InterruptType    Defines the type of interrupt or exception that
 676                            occurred on the processor.This parameter is processor architecture specific.
 677   @param  SystemContext    A pointer to the processor context when
 678                            the interrupt occurred on the processor.
 679 **/
 680 VOID
 681 EFIAPI
 682 SmiPFHandler (
 683   IN EFI_EXCEPTION_TYPE   InterruptType,
 684   IN EFI_SYSTEM_CONTEXT   SystemContext
 685   );
 686
 687 /**
 688   Perform the remaining tasks.
 689
 690 **/
 691 VOID
 692 PerformRemainingTasks (
 693   VOID
 694   );
 695
 696 /**
 697   Perform the pre tasks.
 698
 699 **/
 700 VOID
 701 PerformPreTasks (
 702   VOID
 703   );
 704
 705 /**
 706   Initialize MSR spin lock by MSR index.
 707
 708   @param  MsrIndex       MSR index value.
 709
 710 **/
 711 VOID
 712 InitMsrSpinLockByIndex (
 713   IN UINT32      MsrIndex
 714   );
 715
 716 /**
 717   Hook return address of SMM Save State so that semaphore code
 718   can be executed immediately after AP exits SMM to indicate to
 719   the BSP that an AP has exited SMM after SMBASE relocation.
 720
 721   @param[in] CpuIndex     The processor index.
 722   @param[in] RebasedFlag  A pointer to a flag that is set to TRUE
 723                           immediately after AP exits SMM.
 724
 725 **/
 726 VOID
 727 SemaphoreHook (
 728   IN UINTN             CpuIndex,
 729   IN volatile BOOLEAN  *RebasedFlag
 730   );
 731
 732 /**
 733 Configure SMM Code Access Check feature for all processors.
 734 SMM Feature Control MSR will be locked after configuration.
 735 **/
 736 VOID
 737 ConfigSmmCodeAccessCheck (
 738   VOID
 739   );
 740
 741 /**
 742   Hook the code executed immediately after an RSM instruction on the currently
 743   executing CPU.  The mode of code executed immediately after RSM must be
 744   detected, and the appropriate hook must be selected.  Always clear the auto
 745   HALT restart flag if it is set.
 746
 747   @param[in] CpuIndex                 The processor index for the currently
 748                                       executing CPU.
 749   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 750                                       currently executing CPU.
 751   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 752                                       32-bit mode from 64-bit SMM.
 753   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 754                                       same mode as SMM.
 755
 756   @retval The value of the original instruction pointer before it was hooked.
 757
 758 **/
 759 UINT64
 760 EFIAPI
 761 HookReturnFromSmm (
 762   IN UINTN              CpuIndex,
 763   SMRAM_SAVE_STATE_MAP  *CpuState,
 764   UINT64                NewInstructionPointer32,
 765   UINT64                NewInstructionPointer
 766   );
 767
 768 /**
 769   Get the size of the SMI Handler in bytes.
 770
 771   @retval The size, in bytes, of the SMI Handler.
 772
 773 **/
 774 UINTN
 775 EFIAPI
 776 GetSmiHandlerSize (
 777   VOID
 778   );
 779
 780 /**
 781   Install the SMI handler for the CPU specified by CpuIndex.  This function
 782   is called by the CPU that was elected as monarch during System Management
 783   Mode initialization.
 784
 785   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 786                         The value must be between 0 and the NumberOfCpus field
 787                         in the System Management System Table (SMST).
 788   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 789   @param[in] SmiStack   The stack to use when an SMI is processed by the
 790                         the CPU specified by CpuIndex.
 791   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 792                         processed by the CPU specified by CpuIndex.
 793   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 794                         processed by the CPU specified by CpuIndex.
 795   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 796                         processed by the CPU specified by CpuIndex.
 797   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 798                         processed by the CPU specified by CpuIndex.
 799   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 800                         processed by the CPU specified by CpuIndex.
 801   @param[in] Cr3        The base address of the page tables to use when an SMI
 802                         is processed by the CPU specified by CpuIndex.
 803 **/
 804 VOID
 805 EFIAPI
 806 InstallSmiHandler (
 807   IN UINTN   CpuIndex,
 808   IN UINT32  SmBase,
 809   IN VOID    *SmiStack,
 810   IN UINTN   StackSize,
 811   IN UINTN   GdtBase,
 812   IN UINTN   GdtSize,
 813   IN UINTN   IdtBase,
 814   IN UINTN   IdtSize,
 815   IN UINT32  Cr3
 816   );
 817
 818 /**
 819   Search module name by input IP address and output it.
 820
 821   @param CallerIpAddress   Caller instruction pointer.
 822
 823 **/
 824 VOID
 825 DumpModuleInfoByIp (
 826   IN  UINTN              CallerIpAddress
 827   );
 828
 829 /**
 830   This function sets memory attribute according to MemoryAttributesTable.
 831 **/
 832 VOID
 833 SetMemMapAttributes (
 834   VOID
 835   );
 836
 837 /**
 838   This function sets UEFI memory attribute according to UEFI memory map.
 839 **/
 840 VOID
 841 SetUefiMemMapAttributes (
 842   VOID
 843   );
 844
 845 /**
 846   Return if the Address is forbidden as SMM communication buffer.
 847
 848   @param[in] Address the address to be checked
 849
 850   @return TRUE  The address is forbidden as SMM communication buffer.
 851   @return FALSE The address is allowed as SMM communication buffer.
 852 **/
 853 BOOLEAN
 854 IsSmmCommBufferForbiddenAddress (
 855   IN UINT64  Address
 856   );
 857
 858 /**
 859   This function caches the UEFI memory map information.
 860 **/
 861 VOID
 862 GetUefiMemoryMap (
 863   VOID
 864   );
 865
 866 /**
 867   This function sets memory attribute for page table.
 868 **/
 869 VOID
 870 SetPageTableAttributes (
 871   VOID
 872   );
 873
 874 /**
 875   Return page table base.
 876
 877   @return page table base.
 878 **/
 879 UINTN
 880 GetPageTableBase (
 881   VOID
 882   );
 883
 884 /**
 885   This function sets the attributes for the memory region specified by BaseAddress and
 886   Length from their current attributes to the attributes specified by Attributes.
 887
 888   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 889   @param[in]   Length           The size in bytes of the memory region.
 890   @param[in]   Attributes       The bit mask of attributes to set for the memory region.
 891   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 892
 893   @retval EFI_SUCCESS           The attributes were set for the memory region.
 894   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 895                                 BaseAddress and Length cannot be modified.
 896   @retval EFI_INVALID_PARAMETER Length is zero.
 897                                 Attributes specified an illegal combination of attributes that
 898                                 cannot be set together.
 899   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 900                                 the memory resource range.
 901   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 902                                 resource range specified by BaseAddress and Length.
 903                                 The bit mask of attributes is not support for the memory resource
 904                                 range specified by BaseAddress and Length.
 905
 906 **/
 907 EFI_STATUS
 908 EFIAPI
 909 SmmSetMemoryAttributesEx (
 910   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 911   IN  UINT64                                     Length,
 912   IN  UINT64                                     Attributes,
 913   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 914   );
 915
 916 /**
 917   This function clears the attributes for the memory region specified by BaseAddress and
 918   Length from their current attributes to the attributes specified by Attributes.
 919
 920   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 921   @param[in]   Length           The size in bytes of the memory region.
 922   @param[in]   Attributes       The bit mask of attributes to clear for the memory region.
 923   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 924
 925   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 926   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 927                                 BaseAddress and Length cannot be modified.
 928   @retval EFI_INVALID_PARAMETER Length is zero.
 929                                 Attributes specified an illegal combination of attributes that
 930                                 cannot be set together.
 931   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 932                                 the memory resource range.
 933   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 934                                 resource range specified by BaseAddress and Length.
 935                                 The bit mask of attributes is not support for the memory resource
 936                                 range specified by BaseAddress and Length.
 937
 938 **/
 939 EFI_STATUS
 940 EFIAPI
 941 SmmClearMemoryAttributesEx (
 942   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 943   IN  UINT64                                     Length,
 944   IN  UINT64                                     Attributes,
 945   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 946   );
 947
 948 /**
 949   This API provides a way to allocate memory for page table.
 950
 951   This API can be called more once to allocate memory for page tables.
 952
 953   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 954   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 955   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 956   returned.
 957
 958   @param  Pages                 The number of 4 KB pages to allocate.
 959
 960   @return A pointer to the allocated buffer or NULL if allocation fails.
 961
 962 **/
 963 VOID *
 964 AllocatePageTableMemory (
 965   IN UINTN           Pages
 966   );
 967
 968 /**
 969   Allocate pages for code.
 970
 971   @param[in]  Pages Number of pages to be allocated.
 972
 973   @return Allocated memory.
 974 **/
 975 VOID *
 976 AllocateCodePages (
 977   IN UINTN           Pages
 978   );
 979
 980 /**
 981   Allocate aligned pages for code.
 982
 983   @param[in]  Pages                 Number of pages to be allocated.
 984   @param[in]  Alignment             The requested alignment of the allocation.
 985                                     Must be a power of two.
 986                                     If Alignment is zero, then byte alignment is used.
 987
 988   @return Allocated memory.
 989 **/
 990 VOID *
 991 AllocateAlignedCodePages (
 992   IN UINTN            Pages,
 993   IN UINTN            Alignment
 994   );
 995
 996
 997 //
 998 // S3 related global variable and function prototype.
 999 //
1000
1001 extern BOOLEAN                mSmmS3Flag;
1002
1003 /**
1004   Initialize SMM S3 resume state structure used during S3 Resume.
1005
1006   @param[in] Cr3    The base address of the page tables to use in SMM.
1007
1008 **/
1009 VOID
1010 InitSmmS3ResumeState (
1011   IN UINT32  Cr3
1012   );
1013
1014 /**
1015   Get ACPI CPU data.
1016
1017 **/
1018 VOID
1019 GetAcpiCpuData (
1020   VOID
1021   );
1022
1023 /**
1024   Restore SMM Configuration in S3 boot path.
1025
1026 **/
1027 VOID
1028 RestoreSmmConfigurationInS3 (
1029   VOID
1030   );
1031
1032 /**
1033   Get ACPI S3 enable flag.
1034
1035 **/
1036 VOID
1037 GetAcpiS3EnableFlag (
1038   VOID
1039   );
1040
1041 /**
1042   Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1043
1044   @param[in] ApHltLoopCode          The address of the safe hlt-loop function.
1045   @param[in] TopOfStack             A pointer to the new stack to use for the ApHltLoopCode.
1046   @param[in] NumberToFinishAddress  Address of Semaphore of APs finish count.
1047
1048 **/
1049 VOID
1050 TransferApToSafeState (
1051   IN UINTN  ApHltLoopCode,
1052   IN UINTN  TopOfStack,
1053   IN UINTN  NumberToFinishAddress
1054   );
1055
1056 /**
1057   This function set given attributes of the memory region specified by
1058   BaseAddress and Length.
1059
1060   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1061   @param  BaseAddress       The physical address that is the start address of
1062                             a memory region.
1063   @param  Length            The size in bytes of the memory region.
1064   @param  Attributes        The bit mask of attributes to set for the memory
1065                             region.
1066
1067   @retval EFI_SUCCESS           The attributes were set for the memory region.
1068   @retval EFI_INVALID_PARAMETER Length is zero.
1069                                 Attributes specified an illegal combination of
1070                                 attributes that cannot be set together.
1071   @retval EFI_UNSUPPORTED       The processor does not support one or more
1072                                 bytes of the memory resource range specified
1073                                 by BaseAddress and Length.
1074                                 The bit mask of attributes is not supported for
1075                                 the memory resource range specified by
1076                                 BaseAddress and Length.
1077
1078 **/
1079 EFI_STATUS
1080 EFIAPI
1081 EdkiiSmmSetMemoryAttributes (
1082   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1083   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1084   IN  UINT64                                Length,
1085   IN  UINT64                                Attributes
1086   );
1087
1088 /**
1089   This function clears given attributes of the memory region specified by
1090   BaseAddress and Length.
1091
1092   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1093   @param  BaseAddress       The physical address that is the start address of
1094                             a memory region.
1095   @param  Length            The size in bytes of the memory region.
1096   @param  Attributes        The bit mask of attributes to clear for the memory
1097                             region.
1098
1099   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
1100   @retval EFI_INVALID_PARAMETER Length is zero.
1101                                 Attributes specified an illegal combination of
1102                                 attributes that cannot be cleared together.
1103   @retval EFI_UNSUPPORTED       The processor does not support one or more
1104                                 bytes of the memory resource range specified
1105                                 by BaseAddress and Length.
1106                                 The bit mask of attributes is not supported for
1107                                 the memory resource range specified by
1108                                 BaseAddress and Length.
1109
1110 **/
1111 EFI_STATUS
1112 EFIAPI
1113 EdkiiSmmClearMemoryAttributes (
1114   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1115   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1116   IN  UINT64                                Length,
1117   IN  UINT64                                Attributes
1118   );
1119
1120 /**
1121   This function retrieves the attributes of the memory region specified by
1122   BaseAddress and Length. If different attributes are got from different part
1123   of the memory region, EFI_NO_MAPPING will be returned.
1124
1125   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1126   @param  BaseAddress       The physical address that is the start address of
1127                             a memory region.
1128   @param  Length            The size in bytes of the memory region.
1129   @param  Attributes        Pointer to attributes returned.
1130
1131   @retval EFI_SUCCESS           The attributes got for the memory region.
1132   @retval EFI_INVALID_PARAMETER Length is zero.
1133                                 Attributes is NULL.
1134   @retval EFI_NO_MAPPING        Attributes are not consistent cross the memory
1135                                 region.
1136   @retval EFI_UNSUPPORTED       The processor does not support one or more
1137                                 bytes of the memory resource range specified
1138                                 by BaseAddress and Length.
1139
1140 **/
1141 EFI_STATUS
1142 EFIAPI
1143 EdkiiSmmGetMemoryAttributes (
1144   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1145   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1146   IN  UINT64                                Length,
1147   IN  UINT64                                *Attributes
1148   );
1149
1150 /**
1151   This function fixes up the address of the global variable or function
1152   referred in SmmInit assembly files to be the absoute address.
1153 **/
1154 VOID
1155 EFIAPI
1156 PiSmmCpuSmmInitFixupAddress (
1157  );
1158
1159 /**
1160   This function fixes up the address of the global variable or function
1161   referred in SmiEntry assembly files to be the absoute address.
1162 **/
1163 VOID
1164 EFIAPI
1165 PiSmmCpuSmiEntryFixupAddress (
1166  );
1167
1168 #endif