UefiCpuPkg/PiSmmCpuDxeSmm: Add SmmMemoryAttribute protocol
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / PiSmmCpuDxeSmm.h
1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _CPU_PISMMCPUDXESMM_H_
18 #define _CPU_PISMMCPUDXESMM_H_
19
20 #include <PiSmm.h>
21
22 #include <Protocol/MpService.h>
23 #include <Protocol/SmmConfiguration.h>
24 #include <Protocol/SmmCpu.h>
25 #include <Protocol/SmmAccess2.h>
26 #include <Protocol/SmmReadyToLock.h>
27 #include <Protocol/SmmCpuService.h>
28 #include <Protocol/SmmMemoryAttribute.h>
29
30 #include <Guid/AcpiS3Context.h>
31 #include <Guid/PiSmmMemoryAttributesTable.h>
32
33 #include <Library/BaseLib.h>
34 #include <Library/IoLib.h>
35 #include <Library/TimerLib.h>
36 #include <Library/SynchronizationLib.h>
37 #include <Library/DebugLib.h>
38 #include <Library/BaseMemoryLib.h>
39 #include <Library/PcdLib.h>
40 #include <Library/CacheMaintenanceLib.h>
41 #include <Library/MtrrLib.h>
42 #include <Library/SmmCpuPlatformHookLib.h>
43 #include <Library/SmmServicesTableLib.h>
44 #include <Library/MemoryAllocationLib.h>
45 #include <Library/UefiBootServicesTableLib.h>
46 #include <Library/UefiRuntimeServicesTableLib.h>
47 #include <Library/DebugAgentLib.h>
48 #include <Library/HobLib.h>
49 #include <Library/LocalApicLib.h>
50 #include <Library/UefiCpuLib.h>
51 #include <Library/CpuExceptionHandlerLib.h>
52 #include <Library/ReportStatusCodeLib.h>
53 #include <Library/SmmCpuFeaturesLib.h>
54 #include <Library/PeCoffGetEntryPointLib.h>
55
56 #include <AcpiCpuData.h>
57 #include <CpuHotPlugData.h>
58
59 #include <Register/Cpuid.h>
60 #include <Register/Msr.h>
61
62 #include "CpuService.h"
63 #include "SmmProfile.h"
64
65 //
66 // MSRs required for configuration of SMM Code Access Check
67 //
68 #define EFI_MSR_SMM_MCA_CAP 0x17D
69 #define SMM_CODE_ACCESS_CHK_BIT BIT58
70
71 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
72 #define SMM_CODE_CHK_EN_BIT BIT2
73
74 ///
75 /// Page Table Entry
76 ///
77 #define IA32_PG_P BIT0
78 #define IA32_PG_RW BIT1
79 #define IA32_PG_U BIT2
80 #define IA32_PG_WT BIT3
81 #define IA32_PG_CD BIT4
82 #define IA32_PG_A BIT5
83 #define IA32_PG_D BIT6
84 #define IA32_PG_PS BIT7
85 #define IA32_PG_PAT_2M BIT12
86 #define IA32_PG_PAT_4K IA32_PG_PS
87 #define IA32_PG_PMNT BIT62
88 #define IA32_PG_NX BIT63
89
90 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
91 //
92 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
93 // X64 PAE PDPTE does not have such restriction
94 //
95 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
96
97 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
98
99 #define PAGING_4K_MASK 0xFFF
100 #define PAGING_2M_MASK 0x1FFFFF
101 #define PAGING_1G_MASK 0x3FFFFFFF
102
103 #define PAGING_PAE_INDEX_MASK 0x1FF
104
105 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
106 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
107 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
108
109 #define SMRR_MAX_ADDRESS BASE_4GB
110
111 typedef enum {
112 PageNone,
113 Page4K,
114 Page2M,
115 Page1G,
116 } PAGE_ATTRIBUTE;
117
118 typedef struct {
119 PAGE_ATTRIBUTE Attribute;
120 UINT64 Length;
121 UINT64 AddressMask;
122 } PAGE_ATTRIBUTE_TABLE;
123
124 //
125 // Size of Task-State Segment defined in IA32 Manual
126 //
127 #define TSS_SIZE 104
128 #define TSS_X64_IST1_OFFSET 36
129 #define TSS_IA32_CR3_OFFSET 28
130 #define TSS_IA32_ESP_OFFSET 56
131
132 #define CR0_WP BIT16
133
134 //
135 // Code select value
136 //
137 #define PROTECT_MODE_CODE_SEGMENT 0x08
138 #define LONG_MODE_CODE_SEGMENT 0x38
139
140 //
141 // The size 0x20 must be bigger than
142 // the size of template code of SmmInit. Currently,
143 // the size of SmmInit requires the 0x16 Bytes buffer
144 // at least.
145 //
146 #define BACK_BUF_SIZE 0x20
147
148 #define EXCEPTION_VECTOR_NUMBER 0x20
149
150 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
151
152 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;
153 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
154 #define ARRIVAL_EXCEPTION_DELAYED 0x2
155 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
156
157 //
158 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
159 // Contains the SMM Configuration Protocols that is produced.
160 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
161 //
162 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
163
164 typedef struct {
165 UINTN Signature;
166
167 EFI_HANDLE SmmCpuHandle;
168
169 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
170 SMM_CPU_OPERATION *Operation;
171 UINTN *CpuSaveStateSize;
172 VOID **CpuSaveState;
173
174 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
175 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
176 EFI_SMM_ENTRY_POINT SmmCoreEntry;
177
178 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
179 } SMM_CPU_PRIVATE_DATA;
180
181 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
182 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
183 extern UINTN mMaxNumberOfCpus;
184 extern UINTN mNumberOfCpus;
185 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
186
187 ///
188 /// The mode of the CPU at the time an SMI occurs
189 ///
190 extern UINT8 mSmmSaveStateRegisterLma;
191
192 //
193 // SMM CPU Protocol function prototypes.
194 //
195
196 /**
197 Read information from the CPU save state.
198
199 @param This EFI_SMM_CPU_PROTOCOL instance
200 @param Width The number of bytes to read from the CPU save state.
201 @param Register Specifies the CPU register to read form the save state.
202 @param CpuIndex Specifies the zero-based index of the CPU save state
203 @param Buffer Upon return, this holds the CPU register value read from the save state.
204
205 @retval EFI_SUCCESS The register was read from Save State
206 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
207 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
208
209 **/
210 EFI_STATUS
211 EFIAPI
212 SmmReadSaveState (
213 IN CONST EFI_SMM_CPU_PROTOCOL *This,
214 IN UINTN Width,
215 IN EFI_SMM_SAVE_STATE_REGISTER Register,
216 IN UINTN CpuIndex,
217 OUT VOID *Buffer
218 );
219
220 /**
221 Write data to the CPU save state.
222
223 @param This EFI_SMM_CPU_PROTOCOL instance
224 @param Width The number of bytes to read from the CPU save state.
225 @param Register Specifies the CPU register to write to the save state.
226 @param CpuIndex Specifies the zero-based index of the CPU save state
227 @param Buffer Upon entry, this holds the new CPU register value.
228
229 @retval EFI_SUCCESS The register was written from Save State
230 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
231 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct
232
233 **/
234 EFI_STATUS
235 EFIAPI
236 SmmWriteSaveState (
237 IN CONST EFI_SMM_CPU_PROTOCOL *This,
238 IN UINTN Width,
239 IN EFI_SMM_SAVE_STATE_REGISTER Register,
240 IN UINTN CpuIndex,
241 IN CONST VOID *Buffer
242 );
243
244 /**
245 Read a CPU Save State register on the target processor.
246
247 This function abstracts the differences that whether the CPU Save State register is in the
248 IA32 CPU Save State Map or X64 CPU Save State Map.
249
250 This function supports reading a CPU Save State register in SMBase relocation handler.
251
252 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
253 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
254 @param[in] Width The number of bytes to read from the CPU save state.
255 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
256
257 @retval EFI_SUCCESS The register was read from Save State.
258 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
259 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
260
261 **/
262 EFI_STATUS
263 EFIAPI
264 ReadSaveStateRegister (
265 IN UINTN CpuIndex,
266 IN EFI_SMM_SAVE_STATE_REGISTER Register,
267 IN UINTN Width,
268 OUT VOID *Buffer
269 );
270
271 /**
272 Write value to a CPU Save State register on the target processor.
273
274 This function abstracts the differences that whether the CPU Save State register is in the
275 IA32 CPU Save State Map or X64 CPU Save State Map.
276
277 This function supports writing a CPU Save State register in SMBase relocation handler.
278
279 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
280 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
281 @param[in] Width The number of bytes to read from the CPU save state.
282 @param[in] Buffer Upon entry, this holds the new CPU register value.
283
284 @retval EFI_SUCCESS The register was written to Save State.
285 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
286 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.
287
288 **/
289 EFI_STATUS
290 EFIAPI
291 WriteSaveStateRegister (
292 IN UINTN CpuIndex,
293 IN EFI_SMM_SAVE_STATE_REGISTER Register,
294 IN UINTN Width,
295 IN CONST VOID *Buffer
296 );
297
298 //
299 //
300 //
301 typedef struct {
302 UINT32 Offset;
303 UINT16 Segment;
304 UINT16 Reserved;
305 } IA32_FAR_ADDRESS;
306
307 extern IA32_FAR_ADDRESS gSmmJmpAddr;
308
309 extern CONST UINT8 gcSmmInitTemplate[];
310 extern CONST UINT16 gcSmmInitSize;
311 extern UINT32 gSmmCr0;
312 extern UINT32 gSmmCr3;
313 extern UINT32 gSmmCr4;
314 extern UINTN gSmmInitStack;
315
316 /**
317 Semaphore operation for all processor relocate SMMBase.
318 **/
319 VOID
320 EFIAPI
321 SmmRelocationSemaphoreComplete (
322 VOID
323 );
324
325 ///
326 /// The type of SMM CPU Information
327 ///
328 typedef struct {
329 SPIN_LOCK *Busy;
330 volatile EFI_AP_PROCEDURE Procedure;
331 volatile VOID *Parameter;
332 volatile UINT32 *Run;
333 volatile BOOLEAN *Present;
334 } SMM_CPU_DATA_BLOCK;
335
336 typedef enum {
337 SmmCpuSyncModeTradition,
338 SmmCpuSyncModeRelaxedAp,
339 SmmCpuSyncModeMax
340 } SMM_CPU_SYNC_MODE;
341
342 typedef struct {
343 //
344 // Pointer to an array. The array should be located immediately after this structure
345 // so that UC cache-ability can be set together.
346 //
347 SMM_CPU_DATA_BLOCK *CpuData;
348 volatile UINT32 *Counter;
349 volatile UINT32 BspIndex;
350 volatile BOOLEAN *InsideSmm;
351 volatile BOOLEAN *AllCpusInSync;
352 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
353 volatile BOOLEAN SwitchBsp;
354 volatile BOOLEAN *CandidateBsp;
355 } SMM_DISPATCHER_MP_SYNC_DATA;
356
357 #define MSR_SPIN_LOCK_INIT_NUM 15
358
359 typedef struct {
360 SPIN_LOCK *SpinLock;
361 UINT32 MsrIndex;
362 } MP_MSR_LOCK;
363
364 #define SMM_PSD_OFFSET 0xfb00
365
366 ///
367 /// All global semaphores' pointer
368 ///
369 typedef struct {
370 volatile UINT32 *Counter;
371 volatile BOOLEAN *InsideSmm;
372 volatile BOOLEAN *AllCpusInSync;
373 SPIN_LOCK *PFLock;
374 SPIN_LOCK *CodeAccessCheckLock;
375 SPIN_LOCK *MemoryMappedLock;
376 } SMM_CPU_SEMAPHORE_GLOBAL;
377
378 ///
379 /// All semaphores for each processor
380 ///
381 typedef struct {
382 SPIN_LOCK *Busy;
383 volatile UINT32 *Run;
384 volatile BOOLEAN *Present;
385 } SMM_CPU_SEMAPHORE_CPU;
386
387 ///
388 /// All MSRs semaphores' pointer and counter
389 ///
390 typedef struct {
391 SPIN_LOCK *Msr;
392 UINTN AvailableCounter;
393 } SMM_CPU_SEMAPHORE_MSR;
394
395 ///
396 /// All semaphores' information
397 ///
398 typedef struct {
399 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
400 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
401 SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;
402 } SMM_CPU_SEMAPHORES;
403
404 extern IA32_DESCRIPTOR gcSmiGdtr;
405 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
406 extern UINTN mGdtBufferSize;
407 extern IA32_DESCRIPTOR gcSmiIdtr;
408 extern VOID *gcSmiIdtrPtr;
409 extern UINT64 gPhyMask;
410 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
411 extern UINTN mSmmStackArrayBase;
412 extern UINTN mSmmStackArrayEnd;
413 extern UINTN mSmmStackSize;
414 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
415 extern IA32_DESCRIPTOR gcSmiInitGdtr;
416 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
417 extern UINTN mSemaphoreSize;
418 extern SPIN_LOCK *mPFLock;
419 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
420 extern SPIN_LOCK *mMemoryMappedLock;
421 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
422 extern UINTN mSmmCpuSmramRangeCount;
423 extern UINT8 mPhysicalAddressBits;
424
425 //
426 // Copy of the PcdPteMemoryEncryptionAddressOrMask
427 //
428 extern UINT64 mAddressEncMask;
429
430 /**
431 Create 4G PageTable in SMRAM.
432
433 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
434 @return PageTable Address
435
436 **/
437 UINT32
438 Gen4GPageTable (
439 IN BOOLEAN Is32BitPageTable
440 );
441
442
443 /**
444 Initialize global data for MP synchronization.
445
446 @param Stacks Base address of SMI stack buffer for all processors.
447 @param StackSize Stack size for each processor in SMM.
448
449 **/
450 UINT32
451 InitializeMpServiceData (
452 IN VOID *Stacks,
453 IN UINTN StackSize
454 );
455
456 /**
457 Initialize Timer for SMM AP Sync.
458
459 **/
460 VOID
461 InitializeSmmTimer (
462 VOID
463 );
464
465 /**
466 Start Timer for SMM AP Sync.
467
468 **/
469 UINT64
470 EFIAPI
471 StartSyncTimer (
472 VOID
473 );
474
475 /**
476 Check if the SMM AP Sync timer is timeout.
477
478 @param Timer The start timer from the begin.
479
480 **/
481 BOOLEAN
482 EFIAPI
483 IsSyncTimerTimeout (
484 IN UINT64 Timer
485 );
486
487 /**
488 Initialize IDT for SMM Stack Guard.
489
490 **/
491 VOID
492 EFIAPI
493 InitializeIDTSmmStackGuard (
494 VOID
495 );
496
497 /**
498 Initialize Gdt for all processors.
499
500 @param[in] Cr3 CR3 value.
501 @param[out] GdtStepSize The step size for GDT table.
502
503 @return GdtBase for processor 0.
504 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
505 **/
506 VOID *
507 InitGdt (
508 IN UINTN Cr3,
509 OUT UINTN *GdtStepSize
510 );
511
512 /**
513 This function sets GDT/IDT buffer to be RO and XP.
514 **/
515 VOID
516 PatchGdtIdtMap (
517 VOID
518 );
519
520 /**
521
522 Register the SMM Foundation entry point.
523
524 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
525 @param SmmEntryPoint SMM Foundation EntryPoint
526
527 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
528
529 **/
530 EFI_STATUS
531 EFIAPI
532 RegisterSmmEntry (
533 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
534 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
535 );
536
537 /**
538 Create PageTable for SMM use.
539
540 @return PageTable Address
541
542 **/
543 UINT32
544 SmmInitPageTable (
545 VOID
546 );
547
548 /**
549 Schedule a procedure to run on the specified CPU.
550
551 @param Procedure The address of the procedure to run
552 @param CpuIndex Target CPU number
553 @param ProcArguments The parameter to pass to the procedure
554
555 @retval EFI_INVALID_PARAMETER CpuNumber not valid
556 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
557 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
558 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
559 @retval EFI_SUCCESS - The procedure has been successfully scheduled
560
561 **/
562 EFI_STATUS
563 EFIAPI
564 SmmStartupThisAp (
565 IN EFI_AP_PROCEDURE Procedure,
566 IN UINTN CpuIndex,
567 IN OUT VOID *ProcArguments OPTIONAL
568 );
569
570 /**
571 Schedule a procedure to run on the specified CPU in a blocking fashion.
572
573 @param Procedure The address of the procedure to run
574 @param CpuIndex Target CPU Index
575 @param ProcArguments The parameter to pass to the procedure
576
577 @retval EFI_INVALID_PARAMETER CpuNumber not valid
578 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
579 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
580 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
581 @retval EFI_SUCCESS The procedure has been successfully scheduled
582
583 **/
584 EFI_STATUS
585 EFIAPI
586 SmmBlockingStartupThisAp (
587 IN EFI_AP_PROCEDURE Procedure,
588 IN UINTN CpuIndex,
589 IN OUT VOID *ProcArguments OPTIONAL
590 );
591
592 /**
593 This function sets the attributes for the memory region specified by BaseAddress and
594 Length from their current attributes to the attributes specified by Attributes.
595
596 @param[in] BaseAddress The physical address that is the start address of a memory region.
597 @param[in] Length The size in bytes of the memory region.
598 @param[in] Attributes The bit mask of attributes to set for the memory region.
599
600 @retval EFI_SUCCESS The attributes were set for the memory region.
601 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
602 BaseAddress and Length cannot be modified.
603 @retval EFI_INVALID_PARAMETER Length is zero.
604 Attributes specified an illegal combination of attributes that
605 cannot be set together.
606 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
607 the memory resource range.
608 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
609 resource range specified by BaseAddress and Length.
610 The bit mask of attributes is not support for the memory resource
611 range specified by BaseAddress and Length.
612
613 **/
614 EFI_STATUS
615 EFIAPI
616 SmmSetMemoryAttributes (
617 IN EFI_PHYSICAL_ADDRESS BaseAddress,
618 IN UINT64 Length,
619 IN UINT64 Attributes
620 );
621
622 /**
623 This function clears the attributes for the memory region specified by BaseAddress and
624 Length from their current attributes to the attributes specified by Attributes.
625
626 @param[in] BaseAddress The physical address that is the start address of a memory region.
627 @param[in] Length The size in bytes of the memory region.
628 @param[in] Attributes The bit mask of attributes to clear for the memory region.
629
630 @retval EFI_SUCCESS The attributes were cleared for the memory region.
631 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
632 BaseAddress and Length cannot be modified.
633 @retval EFI_INVALID_PARAMETER Length is zero.
634 Attributes specified an illegal combination of attributes that
635 cannot be set together.
636 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
637 the memory resource range.
638 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
639 resource range specified by BaseAddress and Length.
640 The bit mask of attributes is not support for the memory resource
641 range specified by BaseAddress and Length.
642
643 **/
644 EFI_STATUS
645 EFIAPI
646 SmmClearMemoryAttributes (
647 IN EFI_PHYSICAL_ADDRESS BaseAddress,
648 IN UINT64 Length,
649 IN UINT64 Attributes
650 );
651
652 /**
653 Initialize MP synchronization data.
654
655 **/
656 VOID
657 EFIAPI
658 InitializeMpSyncData (
659 VOID
660 );
661
662 /**
663
664 Find out SMRAM information including SMRR base and SMRR size.
665
666 @param SmrrBase SMRR base
667 @param SmrrSize SMRR size
668
669 **/
670 VOID
671 FindSmramInfo (
672 OUT UINT32 *SmrrBase,
673 OUT UINT32 *SmrrSize
674 );
675
676 /**
677 Relocate SmmBases for each processor.
678
679 Execute on first boot and all S3 resumes
680
681 **/
682 VOID
683 EFIAPI
684 SmmRelocateBases (
685 VOID
686 );
687
688 /**
689 Page Fault handler for SMM use.
690
691 @param InterruptType Defines the type of interrupt or exception that
692 occurred on the processor.This parameter is processor architecture specific.
693 @param SystemContext A pointer to the processor context when
694 the interrupt occurred on the processor.
695 **/
696 VOID
697 EFIAPI
698 SmiPFHandler (
699 IN EFI_EXCEPTION_TYPE InterruptType,
700 IN EFI_SYSTEM_CONTEXT SystemContext
701 );
702
703 /**
704 Perform the remaining tasks.
705
706 **/
707 VOID
708 PerformRemainingTasks (
709 VOID
710 );
711
712 /**
713 Perform the pre tasks.
714
715 **/
716 VOID
717 PerformPreTasks (
718 VOID
719 );
720
721 /**
722 Initialize MSR spin lock by MSR index.
723
724 @param MsrIndex MSR index value.
725
726 **/
727 VOID
728 InitMsrSpinLockByIndex (
729 IN UINT32 MsrIndex
730 );
731
732 /**
733 Hook return address of SMM Save State so that semaphore code
734 can be executed immediately after AP exits SMM to indicate to
735 the BSP that an AP has exited SMM after SMBASE relocation.
736
737 @param[in] CpuIndex The processor index.
738 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
739 immediately after AP exits SMM.
740
741 **/
742 VOID
743 SemaphoreHook (
744 IN UINTN CpuIndex,
745 IN volatile BOOLEAN *RebasedFlag
746 );
747
748 /**
749 Configure SMM Code Access Check feature for all processors.
750 SMM Feature Control MSR will be locked after configuration.
751 **/
752 VOID
753 ConfigSmmCodeAccessCheck (
754 VOID
755 );
756
757 /**
758 Hook the code executed immediately after an RSM instruction on the currently
759 executing CPU. The mode of code executed immediately after RSM must be
760 detected, and the appropriate hook must be selected. Always clear the auto
761 HALT restart flag if it is set.
762
763 @param[in] CpuIndex The processor index for the currently
764 executing CPU.
765 @param[in] CpuState Pointer to SMRAM Save State Map for the
766 currently executing CPU.
767 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
768 32-bit mode from 64-bit SMM.
769 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
770 same mode as SMM.
771
772 @retval The value of the original instruction pointer before it was hooked.
773
774 **/
775 UINT64
776 EFIAPI
777 HookReturnFromSmm (
778 IN UINTN CpuIndex,
779 SMRAM_SAVE_STATE_MAP *CpuState,
780 UINT64 NewInstructionPointer32,
781 UINT64 NewInstructionPointer
782 );
783
784 /**
785 Get the size of the SMI Handler in bytes.
786
787 @retval The size, in bytes, of the SMI Handler.
788
789 **/
790 UINTN
791 EFIAPI
792 GetSmiHandlerSize (
793 VOID
794 );
795
796 /**
797 Install the SMI handler for the CPU specified by CpuIndex. This function
798 is called by the CPU that was elected as monarch during System Management
799 Mode initialization.
800
801 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
802 The value must be between 0 and the NumberOfCpus field
803 in the System Management System Table (SMST).
804 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
805 @param[in] SmiStack The stack to use when an SMI is processed by the
806 the CPU specified by CpuIndex.
807 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
808 processed by the CPU specified by CpuIndex.
809 @param[in] GdtBase The base address of the GDT to use when an SMI is
810 processed by the CPU specified by CpuIndex.
811 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
812 processed by the CPU specified by CpuIndex.
813 @param[in] IdtBase The base address of the IDT to use when an SMI is
814 processed by the CPU specified by CpuIndex.
815 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
816 processed by the CPU specified by CpuIndex.
817 @param[in] Cr3 The base address of the page tables to use when an SMI
818 is processed by the CPU specified by CpuIndex.
819 **/
820 VOID
821 EFIAPI
822 InstallSmiHandler (
823 IN UINTN CpuIndex,
824 IN UINT32 SmBase,
825 IN VOID *SmiStack,
826 IN UINTN StackSize,
827 IN UINTN GdtBase,
828 IN UINTN GdtSize,
829 IN UINTN IdtBase,
830 IN UINTN IdtSize,
831 IN UINT32 Cr3
832 );
833
834 /**
835 Search module name by input IP address and output it.
836
837 @param CallerIpAddress Caller instruction pointer.
838
839 **/
840 VOID
841 DumpModuleInfoByIp (
842 IN UINTN CallerIpAddress
843 );
844
845 /**
846 This function sets memory attribute according to MemoryAttributesTable.
847 **/
848 VOID
849 SetMemMapAttributes (
850 VOID
851 );
852
853 /**
854 This function sets UEFI memory attribute according to UEFI memory map.
855 **/
856 VOID
857 SetUefiMemMapAttributes (
858 VOID
859 );
860
861 /**
862 Return if the Address is forbidden as SMM communication buffer.
863
864 @param[in] Address the address to be checked
865
866 @return TRUE The address is forbidden as SMM communication buffer.
867 @return FALSE The address is allowed as SMM communication buffer.
868 **/
869 BOOLEAN
870 IsSmmCommBufferForbiddenAddress (
871 IN UINT64 Address
872 );
873
874 /**
875 This function caches the UEFI memory map information.
876 **/
877 VOID
878 GetUefiMemoryMap (
879 VOID
880 );
881
882 /**
883 This function sets memory attribute for page table.
884 **/
885 VOID
886 SetPageTableAttributes (
887 VOID
888 );
889
890 /**
891 Return page table base.
892
893 @return page table base.
894 **/
895 UINTN
896 GetPageTableBase (
897 VOID
898 );
899
900 /**
901 This function sets the attributes for the memory region specified by BaseAddress and
902 Length from their current attributes to the attributes specified by Attributes.
903
904 @param[in] BaseAddress The physical address that is the start address of a memory region.
905 @param[in] Length The size in bytes of the memory region.
906 @param[in] Attributes The bit mask of attributes to set for the memory region.
907 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
908
909 @retval EFI_SUCCESS The attributes were set for the memory region.
910 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
911 BaseAddress and Length cannot be modified.
912 @retval EFI_INVALID_PARAMETER Length is zero.
913 Attributes specified an illegal combination of attributes that
914 cannot be set together.
915 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
916 the memory resource range.
917 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
918 resource range specified by BaseAddress and Length.
919 The bit mask of attributes is not support for the memory resource
920 range specified by BaseAddress and Length.
921
922 **/
923 EFI_STATUS
924 EFIAPI
925 SmmSetMemoryAttributesEx (
926 IN EFI_PHYSICAL_ADDRESS BaseAddress,
927 IN UINT64 Length,
928 IN UINT64 Attributes,
929 OUT BOOLEAN *IsSplitted OPTIONAL
930 );
931
932 /**
933 This function clears the attributes for the memory region specified by BaseAddress and
934 Length from their current attributes to the attributes specified by Attributes.
935
936 @param[in] BaseAddress The physical address that is the start address of a memory region.
937 @param[in] Length The size in bytes of the memory region.
938 @param[in] Attributes The bit mask of attributes to clear for the memory region.
939 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
940
941 @retval EFI_SUCCESS The attributes were cleared for the memory region.
942 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
943 BaseAddress and Length cannot be modified.
944 @retval EFI_INVALID_PARAMETER Length is zero.
945 Attributes specified an illegal combination of attributes that
946 cannot be set together.
947 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
948 the memory resource range.
949 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
950 resource range specified by BaseAddress and Length.
951 The bit mask of attributes is not support for the memory resource
952 range specified by BaseAddress and Length.
953
954 **/
955 EFI_STATUS
956 EFIAPI
957 SmmClearMemoryAttributesEx (
958 IN EFI_PHYSICAL_ADDRESS BaseAddress,
959 IN UINT64 Length,
960 IN UINT64 Attributes,
961 OUT BOOLEAN *IsSplitted OPTIONAL
962 );
963
964 /**
965 This API provides a way to allocate memory for page table.
966
967 This API can be called more once to allocate memory for page tables.
968
969 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
970 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
971 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
972 returned.
973
974 @param Pages The number of 4 KB pages to allocate.
975
976 @return A pointer to the allocated buffer or NULL if allocation fails.
977
978 **/
979 VOID *
980 AllocatePageTableMemory (
981 IN UINTN Pages
982 );
983
984 /**
985 Allocate pages for code.
986
987 @param[in] Pages Number of pages to be allocated.
988
989 @return Allocated memory.
990 **/
991 VOID *
992 AllocateCodePages (
993 IN UINTN Pages
994 );
995
996 /**
997 Allocate aligned pages for code.
998
999 @param[in] Pages Number of pages to be allocated.
1000 @param[in] Alignment The requested alignment of the allocation.
1001 Must be a power of two.
1002 If Alignment is zero, then byte alignment is used.
1003
1004 @return Allocated memory.
1005 **/
1006 VOID *
1007 AllocateAlignedCodePages (
1008 IN UINTN Pages,
1009 IN UINTN Alignment
1010 );
1011
1012
1013 //
1014 // S3 related global variable and function prototype.
1015 //
1016
1017 extern BOOLEAN mSmmS3Flag;
1018
1019 /**
1020 Initialize SMM S3 resume state structure used during S3 Resume.
1021
1022 @param[in] Cr3 The base address of the page tables to use in SMM.
1023
1024 **/
1025 VOID
1026 InitSmmS3ResumeState (
1027 IN UINT32 Cr3
1028 );
1029
1030 /**
1031 Get ACPI CPU data.
1032
1033 **/
1034 VOID
1035 GetAcpiCpuData (
1036 VOID
1037 );
1038
1039 /**
1040 Restore SMM Configuration in S3 boot path.
1041
1042 **/
1043 VOID
1044 RestoreSmmConfigurationInS3 (
1045 VOID
1046 );
1047
1048 /**
1049 Get ACPI S3 enable flag.
1050
1051 **/
1052 VOID
1053 GetAcpiS3EnableFlag (
1054 VOID
1055 );
1056
1057 /**
1058 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1059
1060 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1061 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1062 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1063
1064 **/
1065 VOID
1066 TransferApToSafeState (
1067 IN UINTN ApHltLoopCode,
1068 IN UINTN TopOfStack,
1069 IN UINTN NumberToFinishAddress
1070 );
1071
1072 /**
1073 This function set given attributes of the memory region specified by
1074 BaseAddress and Length.
1075
1076 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1077 @param BaseAddress The physical address that is the start address of
1078 a memory region.
1079 @param Length The size in bytes of the memory region.
1080 @param Attributes The bit mask of attributes to set for the memory
1081 region.
1082
1083 @retval EFI_SUCCESS The attributes were set for the memory region.
1084 @retval EFI_INVALID_PARAMETER Length is zero.
1085 Attributes specified an illegal combination of
1086 attributes that cannot be set together.
1087 @retval EFI_UNSUPPORTED The processor does not support one or more
1088 bytes of the memory resource range specified
1089 by BaseAddress and Length.
1090 The bit mask of attributes is not support for
1091 the memory resource range specified by
1092 BaseAddress and Length.
1093
1094 **/
1095 EFI_STATUS
1096 EFIAPI
1097 EdkiiSmmSetMemoryAttributes (
1098 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1099 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1100 IN UINT64 Length,
1101 IN UINT64 Attributes
1102 );
1103
1104 /**
1105 This function clears given attributes of the memory region specified by
1106 BaseAddress and Length.
1107
1108 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1109 @param BaseAddress The physical address that is the start address of
1110 a memory region.
1111 @param Length The size in bytes of the memory region.
1112 @param Attributes The bit mask of attributes to set for the memory
1113 region.
1114
1115 @retval EFI_SUCCESS The attributes were set for the memory region.
1116 @retval EFI_INVALID_PARAMETER Length is zero.
1117 Attributes specified an illegal combination of
1118 attributes that cannot be set together.
1119 @retval EFI_UNSUPPORTED The processor does not support one or more
1120 bytes of the memory resource range specified
1121 by BaseAddress and Length.
1122 The bit mask of attributes is not support for
1123 the memory resource range specified by
1124 BaseAddress and Length.
1125
1126 **/
1127 EFI_STATUS
1128 EFIAPI
1129 EdkiiSmmClearMemoryAttributes (
1130 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1131 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1132 IN UINT64 Length,
1133 IN UINT64 Attributes
1134 );
1135
1136 /**
1137 This function retrieve the attributes of the memory region specified by
1138 BaseAddress and Length. If different attributes are got from different part
1139 of the memory region, EFI_NO_MAPPING will be returned.
1140
1141 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1142 @param BaseAddress The physical address that is the start address of
1143 a memory region.
1144 @param Length The size in bytes of the memory region.
1145 @param Attributes Pointer to attributes returned.
1146
1147 @retval EFI_SUCCESS The attributes got for the memory region.
1148 @retval EFI_INVALID_PARAMETER Length is zero.
1149 Attributes is NULL.
1150 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1151 region.
1152 @retval EFI_UNSUPPORTED The processor does not support one or more
1153 bytes of the memory resource range specified
1154 by BaseAddress and Length.
1155 The bit mask of attributes is not support for
1156 the memory resource range specified by
1157 BaseAddress and Length.
1158
1159 **/
1160 EFI_STATUS
1161 EFIAPI
1162 EdkiiSmmGetMemoryAttributes (
1163 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1164 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1165 IN UINT64 Length,
1166 IN UINT64 *Attributes
1167 );
1168
1169 #endif