UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

   1 /** @file
   2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
   3
   4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
   5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef _CPU_PISMMCPUDXESMM_H_
  18 #define _CPU_PISMMCPUDXESMM_H_
  19
  20 #include <PiSmm.h>
  21
  22 #include <Protocol/MpService.h>
  23 #include <Protocol/SmmConfiguration.h>
  24 #include <Protocol/SmmCpu.h>
  25 #include <Protocol/SmmAccess2.h>
  26 #include <Protocol/SmmReadyToLock.h>
  27 #include <Protocol/SmmCpuService.h>
  28 #include <Protocol/SmmMemoryAttribute.h>
  29
  30 #include <Guid/AcpiS3Context.h>
  31 #include <Guid/PiSmmMemoryAttributesTable.h>
  32
  33 #include <Library/BaseLib.h>
  34 #include <Library/IoLib.h>
  35 #include <Library/TimerLib.h>
  36 #include <Library/SynchronizationLib.h>
  37 #include <Library/DebugLib.h>
  38 #include <Library/BaseMemoryLib.h>
  39 #include <Library/PcdLib.h>
  40 #include <Library/CacheMaintenanceLib.h>
  41 #include <Library/MtrrLib.h>
  42 #include <Library/SmmCpuPlatformHookLib.h>
  43 #include <Library/SmmServicesTableLib.h>
  44 #include <Library/MemoryAllocationLib.h>
  45 #include <Library/UefiBootServicesTableLib.h>
  46 #include <Library/UefiRuntimeServicesTableLib.h>
  47 #include <Library/DebugAgentLib.h>
  48 #include <Library/HobLib.h>
  49 #include <Library/LocalApicLib.h>
  50 #include <Library/UefiCpuLib.h>
  51 #include <Library/CpuExceptionHandlerLib.h>
  52 #include <Library/ReportStatusCodeLib.h>
  53 #include <Library/SmmCpuFeaturesLib.h>
  54 #include <Library/PeCoffGetEntryPointLib.h>
  55
  56 #include <AcpiCpuData.h>
  57 #include <CpuHotPlugData.h>
  58
  59 #include <Register/Cpuid.h>
  60 #include <Register/Msr.h>
  61
  62 #include "CpuService.h"
  63 #include "SmmProfile.h"
  64
  65 //
  66 // MSRs required for configuration of SMM Code Access Check
  67 //
  68 #define EFI_MSR_SMM_MCA_CAP                    0x17D
  69 #define  SMM_CODE_ACCESS_CHK_BIT               BIT58
  70
  71 #define  SMM_FEATURE_CONTROL_LOCK_BIT          BIT0
  72 #define  SMM_CODE_CHK_EN_BIT                   BIT2
  73
  74 ///
  75 /// Page Table Entry
  76 ///
  77 #define IA32_PG_P                   BIT0
  78 #define IA32_PG_RW                  BIT1
  79 #define IA32_PG_U                   BIT2
  80 #define IA32_PG_WT                  BIT3
  81 #define IA32_PG_CD                  BIT4
  82 #define IA32_PG_A                   BIT5
  83 #define IA32_PG_D                   BIT6
  84 #define IA32_PG_PS                  BIT7
  85 #define IA32_PG_PAT_2M              BIT12
  86 #define IA32_PG_PAT_4K              IA32_PG_PS
  87 #define IA32_PG_PMNT                BIT62
  88 #define IA32_PG_NX                  BIT63
  89
  90 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
  91 //
  92 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
  93 // X64 PAE PDPTE does not have such restriction
  94 //
  95 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
  96
  97 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
  98
  99 #define PAGING_4K_MASK  0xFFF
 100 #define PAGING_2M_MASK  0x1FFFFF
 101 #define PAGING_1G_MASK  0x3FFFFFFF
 102
 103 #define PAGING_PAE_INDEX_MASK  0x1FF
 104
 105 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
 106 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
 107 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
 108
 109 #define SMRR_MAX_ADDRESS       BASE_4GB
 110
 111 typedef enum {
 112   PageNone,
 113   Page4K,
 114   Page2M,
 115   Page1G,
 116 } PAGE_ATTRIBUTE;
 117
 118 typedef struct {
 119   PAGE_ATTRIBUTE   Attribute;
 120   UINT64           Length;
 121   UINT64           AddressMask;
 122 } PAGE_ATTRIBUTE_TABLE;
 123
 124 //
 125 // Size of Task-State Segment defined in IA32 Manual
 126 //
 127 #define TSS_SIZE              104
 128 #define TSS_X64_IST1_OFFSET   36
 129 #define TSS_IA32_CR3_OFFSET   28
 130 #define TSS_IA32_ESP_OFFSET   56
 131
 132 #define CR0_WP                BIT16
 133
 134 //
 135 // Code select value
 136 //
 137 #define PROTECT_MODE_CODE_SEGMENT          0x08
 138 #define LONG_MODE_CODE_SEGMENT             0x38
 139
 140 //
 141 // The size 0x20 must be bigger than
 142 // the size of template code of SmmInit. Currently,
 143 // the size of SmmInit requires the 0x16 Bytes buffer
 144 // at least.
 145 //
 146 #define BACK_BUF_SIZE  0x20
 147
 148 #define EXCEPTION_VECTOR_NUMBER     0x20
 149
 150 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
 151
 152 typedef UINT32                              SMM_CPU_ARRIVAL_EXCEPTIONS;
 153 #define ARRIVAL_EXCEPTION_BLOCKED           0x1
 154 #define ARRIVAL_EXCEPTION_DELAYED           0x2
 155 #define ARRIVAL_EXCEPTION_SMI_DISABLED      0x4
 156
 157 //
 158 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
 159 // Contains the SMM Configuration Protocols that is produced.
 160 // Contains a mix of DXE and SMM contents.  All the fields must be used properly.
 161 //
 162 #define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 163
 164 typedef struct {
 165   UINTN                           Signature;
 166
 167   EFI_HANDLE                      SmmCpuHandle;
 168
 169   EFI_PROCESSOR_INFORMATION       *ProcessorInfo;
 170   SMM_CPU_OPERATION               *Operation;
 171   UINTN                           *CpuSaveStateSize;
 172   VOID                            **CpuSaveState;
 173
 174   EFI_SMM_RESERVED_SMRAM_REGION   SmmReservedSmramRegion[1];
 175   EFI_SMM_ENTRY_CONTEXT           SmmCoreEntryContext;
 176   EFI_SMM_ENTRY_POINT             SmmCoreEntry;
 177
 178   EFI_SMM_CONFIGURATION_PROTOCOL  SmmConfiguration;
 179 } SMM_CPU_PRIVATE_DATA;
 180
 181 extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
 182 extern CPU_HOT_PLUG_DATA      mCpuHotPlugData;
 183 extern UINTN                  mMaxNumberOfCpus;
 184 extern UINTN                  mNumberOfCpus;
 185 extern EFI_SMM_CPU_PROTOCOL   mSmmCpu;
 186
 187 ///
 188 /// The mode of the CPU at the time an SMI occurs
 189 ///
 190 extern UINT8  mSmmSaveStateRegisterLma;
 191
 192 //
 193 // SMM CPU Protocol function prototypes.
 194 //
 195
 196 /**
 197   Read information from the CPU save state.
 198
 199   @param  This      EFI_SMM_CPU_PROTOCOL instance
 200   @param  Width     The number of bytes to read from the CPU save state.
 201   @param  Register  Specifies the CPU register to read form the save state.
 202   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 203   @param  Buffer    Upon return, this holds the CPU register value read from the save state.
 204
 205   @retval EFI_SUCCESS   The register was read from Save State
 206   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 207   @retval EFI_INVALID_PARAMTER   This or Buffer is NULL.
 208
 209 **/
 210 EFI_STATUS
 211 EFIAPI
 212 SmmReadSaveState (
 213   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 214   IN UINTN                              Width,
 215   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 216   IN UINTN                              CpuIndex,
 217   OUT VOID                              *Buffer
 218   );
 219
 220 /**
 221   Write data to the CPU save state.
 222
 223   @param  This      EFI_SMM_CPU_PROTOCOL instance
 224   @param  Width     The number of bytes to read from the CPU save state.
 225   @param  Register  Specifies the CPU register to write to the save state.
 226   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 227   @param  Buffer    Upon entry, this holds the new CPU register value.
 228
 229   @retval EFI_SUCCESS   The register was written from Save State
 230   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 231   @retval EFI_INVALID_PARAMTER   ProcessorIndex or Width is not correct
 232
 233 **/
 234 EFI_STATUS
 235 EFIAPI
 236 SmmWriteSaveState (
 237   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 238   IN UINTN                              Width,
 239   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 240   IN UINTN                              CpuIndex,
 241   IN CONST VOID                         *Buffer
 242   );
 243
 244 /**
 245 Read a CPU Save State register on the target processor.
 246
 247 This function abstracts the differences that whether the CPU Save State register is in the
 248 IA32 CPU Save State Map or X64 CPU Save State Map.
 249
 250 This function supports reading a CPU Save State register in SMBase relocation handler.
 251
 252 @param[in]  CpuIndex       Specifies the zero-based index of the CPU save state.
 253 @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 254 @param[in]  Width          The number of bytes to read from the CPU save state.
 255 @param[out] Buffer         Upon return, this holds the CPU register value read from the save state.
 256
 257 @retval EFI_SUCCESS           The register was read from Save State.
 258 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 259 @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 260
 261 **/
 262 EFI_STATUS
 263 EFIAPI
 264 ReadSaveStateRegister (
 265   IN UINTN                        CpuIndex,
 266   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 267   IN UINTN                        Width,
 268   OUT VOID                        *Buffer
 269   );
 270
 271 /**
 272 Write value to a CPU Save State register on the target processor.
 273
 274 This function abstracts the differences that whether the CPU Save State register is in the
 275 IA32 CPU Save State Map or X64 CPU Save State Map.
 276
 277 This function supports writing a CPU Save State register in SMBase relocation handler.
 278
 279 @param[in] CpuIndex       Specifies the zero-based index of the CPU save state.
 280 @param[in] RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 281 @param[in] Width          The number of bytes to read from the CPU save state.
 282 @param[in] Buffer         Upon entry, this holds the new CPU register value.
 283
 284 @retval EFI_SUCCESS           The register was written to Save State.
 285 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 286 @retval EFI_INVALID_PARAMTER  ProcessorIndex or Width is not correct.
 287
 288 **/
 289 EFI_STATUS
 290 EFIAPI
 291 WriteSaveStateRegister (
 292   IN UINTN                        CpuIndex,
 293   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 294   IN UINTN                        Width,
 295   IN CONST VOID                   *Buffer
 296   );
 297
 298 extern CONST UINT8                  gcSmmInitTemplate[];
 299 extern CONST UINT16                 gcSmmInitSize;
 300 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr0;
 301 extern UINT32                       mSmmCr0;
 302 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr3;
 303 extern UINT32                       mSmmCr4;
 304 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr4;
 305 extern UINTN                        gSmmInitStack;
 306
 307 /**
 308   Semaphore operation for all processor relocate SMMBase.
 309 **/
 310 VOID
 311 EFIAPI
 312 SmmRelocationSemaphoreComplete (
 313   VOID
 314   );
 315
 316 ///
 317 /// The type of SMM CPU Information
 318 ///
 319 typedef struct {
 320   SPIN_LOCK                         *Busy;
 321   volatile EFI_AP_PROCEDURE         Procedure;
 322   volatile VOID                     *Parameter;
 323   volatile UINT32                   *Run;
 324   volatile BOOLEAN                  *Present;
 325 } SMM_CPU_DATA_BLOCK;
 326
 327 typedef enum {
 328   SmmCpuSyncModeTradition,
 329   SmmCpuSyncModeRelaxedAp,
 330   SmmCpuSyncModeMax
 331 } SMM_CPU_SYNC_MODE;
 332
 333 typedef struct {
 334   //
 335   // Pointer to an array. The array should be located immediately after this structure
 336   // so that UC cache-ability can be set together.
 337   //
 338   SMM_CPU_DATA_BLOCK            *CpuData;
 339   volatile UINT32               *Counter;
 340   volatile UINT32               BspIndex;
 341   volatile BOOLEAN              *InsideSmm;
 342   volatile BOOLEAN              *AllCpusInSync;
 343   volatile SMM_CPU_SYNC_MODE    EffectiveSyncMode;
 344   volatile BOOLEAN              SwitchBsp;
 345   volatile BOOLEAN              *CandidateBsp;
 346 } SMM_DISPATCHER_MP_SYNC_DATA;
 347
 348 #define MSR_SPIN_LOCK_INIT_NUM 15
 349
 350 typedef struct {
 351   SPIN_LOCK    *SpinLock;
 352   UINT32       MsrIndex;
 353 } MP_MSR_LOCK;
 354
 355 #define SMM_PSD_OFFSET              0xfb00
 356
 357 ///
 358 /// All global semaphores' pointer
 359 ///
 360 typedef struct {
 361   volatile UINT32      *Counter;
 362   volatile BOOLEAN     *InsideSmm;
 363   volatile BOOLEAN     *AllCpusInSync;
 364   SPIN_LOCK            *PFLock;
 365   SPIN_LOCK            *CodeAccessCheckLock;
 366   SPIN_LOCK            *MemoryMappedLock;
 367 } SMM_CPU_SEMAPHORE_GLOBAL;
 368
 369 ///
 370 /// All semaphores for each processor
 371 ///
 372 typedef struct {
 373   SPIN_LOCK                         *Busy;
 374   volatile UINT32                   *Run;
 375   volatile BOOLEAN                  *Present;
 376 } SMM_CPU_SEMAPHORE_CPU;
 377
 378 ///
 379 /// All MSRs semaphores' pointer and counter
 380 ///
 381 typedef struct {
 382   SPIN_LOCK            *Msr;
 383   UINTN                AvailableCounter;
 384 } SMM_CPU_SEMAPHORE_MSR;
 385
 386 ///
 387 /// All semaphores' information
 388 ///
 389 typedef struct {
 390   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;
 391   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;
 392   SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;
 393 } SMM_CPU_SEMAPHORES;
 394
 395 extern IA32_DESCRIPTOR                     gcSmiGdtr;
 396 extern EFI_PHYSICAL_ADDRESS                mGdtBuffer;
 397 extern UINTN                               mGdtBufferSize;
 398 extern IA32_DESCRIPTOR                     gcSmiIdtr;
 399 extern VOID                                *gcSmiIdtrPtr;
 400 extern UINT64                              gPhyMask;
 401 extern SMM_DISPATCHER_MP_SYNC_DATA         *mSmmMpSyncData;
 402 extern UINTN                               mSmmStackArrayBase;
 403 extern UINTN                               mSmmStackArrayEnd;
 404 extern UINTN                               mSmmStackSize;
 405 extern EFI_SMM_CPU_SERVICE_PROTOCOL        mSmmCpuService;
 406 extern IA32_DESCRIPTOR                     gcSmiInitGdtr;
 407 extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 408 extern UINTN                               mSemaphoreSize;
 409 extern SPIN_LOCK                           *mPFLock;
 410 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;
 411 extern SPIN_LOCK                           *mMemoryMappedLock;
 412 extern EFI_SMRAM_DESCRIPTOR                *mSmmCpuSmramRanges;
 413 extern UINTN                               mSmmCpuSmramRangeCount;
 414 extern UINT8                               mPhysicalAddressBits;
 415
 416 //
 417 // Copy of the PcdPteMemoryEncryptionAddressOrMask
 418 //
 419 extern UINT64  mAddressEncMask;
 420
 421 /**
 422   Create 4G PageTable in SMRAM.
 423
 424   @param[in]      Is32BitPageTable Whether the page table is 32-bit PAE
 425   @return         PageTable Address
 426
 427 **/
 428 UINT32
 429 Gen4GPageTable (
 430   IN      BOOLEAN                   Is32BitPageTable
 431   );
 432
 433
 434 /**
 435   Initialize global data for MP synchronization.
 436
 437   @param Stacks       Base address of SMI stack buffer for all processors.
 438   @param StackSize    Stack size for each processor in SMM.
 439
 440 **/
 441 UINT32
 442 InitializeMpServiceData (
 443   IN VOID        *Stacks,
 444   IN UINTN       StackSize
 445   );
 446
 447 /**
 448   Initialize Timer for SMM AP Sync.
 449
 450 **/
 451 VOID
 452 InitializeSmmTimer (
 453   VOID
 454   );
 455
 456 /**
 457   Start Timer for SMM AP Sync.
 458
 459 **/
 460 UINT64
 461 EFIAPI
 462 StartSyncTimer (
 463   VOID
 464   );
 465
 466 /**
 467   Check if the SMM AP Sync timer is timeout.
 468
 469   @param Timer  The start timer from the begin.
 470
 471 **/
 472 BOOLEAN
 473 EFIAPI
 474 IsSyncTimerTimeout (
 475   IN      UINT64                    Timer
 476   );
 477
 478 /**
 479   Initialize IDT for SMM Stack Guard.
 480
 481 **/
 482 VOID
 483 EFIAPI
 484 InitializeIDTSmmStackGuard (
 485   VOID
 486   );
 487
 488 /**
 489   Initialize Gdt for all processors.
 490
 491   @param[in]   Cr3          CR3 value.
 492   @param[out]  GdtStepSize  The step size for GDT table.
 493
 494   @return GdtBase for processor 0.
 495           GdtBase for processor X is: GdtBase + (GdtStepSize * X)
 496 **/
 497 VOID *
 498 InitGdt (
 499   IN  UINTN  Cr3,
 500   OUT UINTN  *GdtStepSize
 501   );
 502
 503 /**
 504
 505   Register the SMM Foundation entry point.
 506
 507   @param          This              Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
 508   @param          SmmEntryPoint     SMM Foundation EntryPoint
 509
 510   @retval         EFI_SUCCESS       Successfully to register SMM foundation entry point
 511
 512 **/
 513 EFI_STATUS
 514 EFIAPI
 515 RegisterSmmEntry (
 516   IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
 517   IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
 518   );
 519
 520 /**
 521   Create PageTable for SMM use.
 522
 523   @return     PageTable Address
 524
 525 **/
 526 UINT32
 527 SmmInitPageTable (
 528   VOID
 529   );
 530
 531 /**
 532   Schedule a procedure to run on the specified CPU.
 533
 534   @param   Procedure        The address of the procedure to run
 535   @param   CpuIndex         Target CPU number
 536   @param   ProcArguments    The parameter to pass to the procedure
 537
 538   @retval   EFI_INVALID_PARAMETER    CpuNumber not valid
 539   @retval   EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 540   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 541   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 542   @retval   EFI_SUCCESS - The procedure has been successfully scheduled
 543
 544 **/
 545 EFI_STATUS
 546 EFIAPI
 547 SmmStartupThisAp (
 548   IN      EFI_AP_PROCEDURE          Procedure,
 549   IN      UINTN                     CpuIndex,
 550   IN OUT  VOID                      *ProcArguments OPTIONAL
 551   );
 552
 553 /**
 554   Schedule a procedure to run on the specified CPU in a blocking fashion.
 555
 556   @param  Procedure                The address of the procedure to run
 557   @param  CpuIndex                 Target CPU Index
 558   @param  ProcArguments            The parameter to pass to the procedure
 559
 560   @retval EFI_INVALID_PARAMETER    CpuNumber not valid
 561   @retval EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 562   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 563   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 564   @retval EFI_SUCCESS              The procedure has been successfully scheduled
 565
 566 **/
 567 EFI_STATUS
 568 EFIAPI
 569 SmmBlockingStartupThisAp (
 570   IN      EFI_AP_PROCEDURE          Procedure,
 571   IN      UINTN                     CpuIndex,
 572   IN OUT  VOID                      *ProcArguments OPTIONAL
 573   );
 574
 575 /**
 576   This function sets the attributes for the memory region specified by BaseAddress and
 577   Length from their current attributes to the attributes specified by Attributes.
 578
 579   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 580   @param[in]  Length           The size in bytes of the memory region.
 581   @param[in]  Attributes       The bit mask of attributes to set for the memory region.
 582
 583   @retval EFI_SUCCESS           The attributes were set for the memory region.
 584   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 585                                 BaseAddress and Length cannot be modified.
 586   @retval EFI_INVALID_PARAMETER Length is zero.
 587                                 Attributes specified an illegal combination of attributes that
 588                                 cannot be set together.
 589   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 590                                 the memory resource range.
 591   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 592                                 resource range specified by BaseAddress and Length.
 593                                 The bit mask of attributes is not support for the memory resource
 594                                 range specified by BaseAddress and Length.
 595
 596 **/
 597 EFI_STATUS
 598 EFIAPI
 599 SmmSetMemoryAttributes (
 600   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 601   IN  UINT64                                     Length,
 602   IN  UINT64                                     Attributes
 603   );
 604
 605 /**
 606   This function clears the attributes for the memory region specified by BaseAddress and
 607   Length from their current attributes to the attributes specified by Attributes.
 608
 609   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 610   @param[in]  Length           The size in bytes of the memory region.
 611   @param[in]  Attributes       The bit mask of attributes to clear for the memory region.
 612
 613   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 614   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 615                                 BaseAddress and Length cannot be modified.
 616   @retval EFI_INVALID_PARAMETER Length is zero.
 617                                 Attributes specified an illegal combination of attributes that
 618                                 cannot be set together.
 619   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 620                                 the memory resource range.
 621   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 622                                 resource range specified by BaseAddress and Length.
 623                                 The bit mask of attributes is not support for the memory resource
 624                                 range specified by BaseAddress and Length.
 625
 626 **/
 627 EFI_STATUS
 628 EFIAPI
 629 SmmClearMemoryAttributes (
 630   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 631   IN  UINT64                                     Length,
 632   IN  UINT64                                     Attributes
 633   );
 634
 635 /**
 636   Initialize MP synchronization data.
 637
 638 **/
 639 VOID
 640 EFIAPI
 641 InitializeMpSyncData (
 642   VOID
 643   );
 644
 645 /**
 646
 647   Find out SMRAM information including SMRR base and SMRR size.
 648
 649   @param          SmrrBase          SMRR base
 650   @param          SmrrSize          SMRR size
 651
 652 **/
 653 VOID
 654 FindSmramInfo (
 655   OUT UINT32   *SmrrBase,
 656   OUT UINT32   *SmrrSize
 657   );
 658
 659 /**
 660   Relocate SmmBases for each processor.
 661
 662   Execute on first boot and all S3 resumes
 663
 664 **/
 665 VOID
 666 EFIAPI
 667 SmmRelocateBases (
 668   VOID
 669   );
 670
 671 /**
 672   Page Fault handler for SMM use.
 673
 674   @param  InterruptType    Defines the type of interrupt or exception that
 675                            occurred on the processor.This parameter is processor architecture specific.
 676   @param  SystemContext    A pointer to the processor context when
 677                            the interrupt occurred on the processor.
 678 **/
 679 VOID
 680 EFIAPI
 681 SmiPFHandler (
 682   IN EFI_EXCEPTION_TYPE   InterruptType,
 683   IN EFI_SYSTEM_CONTEXT   SystemContext
 684   );
 685
 686 /**
 687   Perform the remaining tasks.
 688
 689 **/
 690 VOID
 691 PerformRemainingTasks (
 692   VOID
 693   );
 694
 695 /**
 696   Perform the pre tasks.
 697
 698 **/
 699 VOID
 700 PerformPreTasks (
 701   VOID
 702   );
 703
 704 /**
 705   Initialize MSR spin lock by MSR index.
 706
 707   @param  MsrIndex       MSR index value.
 708
 709 **/
 710 VOID
 711 InitMsrSpinLockByIndex (
 712   IN UINT32      MsrIndex
 713   );
 714
 715 /**
 716   Hook return address of SMM Save State so that semaphore code
 717   can be executed immediately after AP exits SMM to indicate to
 718   the BSP that an AP has exited SMM after SMBASE relocation.
 719
 720   @param[in] CpuIndex     The processor index.
 721   @param[in] RebasedFlag  A pointer to a flag that is set to TRUE
 722                           immediately after AP exits SMM.
 723
 724 **/
 725 VOID
 726 SemaphoreHook (
 727   IN UINTN             CpuIndex,
 728   IN volatile BOOLEAN  *RebasedFlag
 729   );
 730
 731 /**
 732 Configure SMM Code Access Check feature for all processors.
 733 SMM Feature Control MSR will be locked after configuration.
 734 **/
 735 VOID
 736 ConfigSmmCodeAccessCheck (
 737   VOID
 738   );
 739
 740 /**
 741   Hook the code executed immediately after an RSM instruction on the currently
 742   executing CPU.  The mode of code executed immediately after RSM must be
 743   detected, and the appropriate hook must be selected.  Always clear the auto
 744   HALT restart flag if it is set.
 745
 746   @param[in] CpuIndex                 The processor index for the currently
 747                                       executing CPU.
 748   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 749                                       currently executing CPU.
 750   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 751                                       32-bit mode from 64-bit SMM.
 752   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 753                                       same mode as SMM.
 754
 755   @retval The value of the original instruction pointer before it was hooked.
 756
 757 **/
 758 UINT64
 759 EFIAPI
 760 HookReturnFromSmm (
 761   IN UINTN              CpuIndex,
 762   SMRAM_SAVE_STATE_MAP  *CpuState,
 763   UINT64                NewInstructionPointer32,
 764   UINT64                NewInstructionPointer
 765   );
 766
 767 /**
 768   Get the size of the SMI Handler in bytes.
 769
 770   @retval The size, in bytes, of the SMI Handler.
 771
 772 **/
 773 UINTN
 774 EFIAPI
 775 GetSmiHandlerSize (
 776   VOID
 777   );
 778
 779 /**
 780   Install the SMI handler for the CPU specified by CpuIndex.  This function
 781   is called by the CPU that was elected as monarch during System Management
 782   Mode initialization.
 783
 784   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 785                         The value must be between 0 and the NumberOfCpus field
 786                         in the System Management System Table (SMST).
 787   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 788   @param[in] SmiStack   The stack to use when an SMI is processed by the
 789                         the CPU specified by CpuIndex.
 790   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 791                         processed by the CPU specified by CpuIndex.
 792   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 793                         processed by the CPU specified by CpuIndex.
 794   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 795                         processed by the CPU specified by CpuIndex.
 796   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 797                         processed by the CPU specified by CpuIndex.
 798   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 799                         processed by the CPU specified by CpuIndex.
 800   @param[in] Cr3        The base address of the page tables to use when an SMI
 801                         is processed by the CPU specified by CpuIndex.
 802 **/
 803 VOID
 804 EFIAPI
 805 InstallSmiHandler (
 806   IN UINTN   CpuIndex,
 807   IN UINT32  SmBase,
 808   IN VOID    *SmiStack,
 809   IN UINTN   StackSize,
 810   IN UINTN   GdtBase,
 811   IN UINTN   GdtSize,
 812   IN UINTN   IdtBase,
 813   IN UINTN   IdtSize,
 814   IN UINT32  Cr3
 815   );
 816
 817 /**
 818   Search module name by input IP address and output it.
 819
 820   @param CallerIpAddress   Caller instruction pointer.
 821
 822 **/
 823 VOID
 824 DumpModuleInfoByIp (
 825   IN  UINTN              CallerIpAddress
 826   );
 827
 828 /**
 829   This function sets memory attribute according to MemoryAttributesTable.
 830 **/
 831 VOID
 832 SetMemMapAttributes (
 833   VOID
 834   );
 835
 836 /**
 837   This function sets UEFI memory attribute according to UEFI memory map.
 838 **/
 839 VOID
 840 SetUefiMemMapAttributes (
 841   VOID
 842   );
 843
 844 /**
 845   Return if the Address is forbidden as SMM communication buffer.
 846
 847   @param[in] Address the address to be checked
 848
 849   @return TRUE  The address is forbidden as SMM communication buffer.
 850   @return FALSE The address is allowed as SMM communication buffer.
 851 **/
 852 BOOLEAN
 853 IsSmmCommBufferForbiddenAddress (
 854   IN UINT64  Address
 855   );
 856
 857 /**
 858   This function caches the UEFI memory map information.
 859 **/
 860 VOID
 861 GetUefiMemoryMap (
 862   VOID
 863   );
 864
 865 /**
 866   This function sets memory attribute for page table.
 867 **/
 868 VOID
 869 SetPageTableAttributes (
 870   VOID
 871   );
 872
 873 /**
 874   Return page table base.
 875
 876   @return page table base.
 877 **/
 878 UINTN
 879 GetPageTableBase (
 880   VOID
 881   );
 882
 883 /**
 884   This function sets the attributes for the memory region specified by BaseAddress and
 885   Length from their current attributes to the attributes specified by Attributes.
 886
 887   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 888   @param[in]   Length           The size in bytes of the memory region.
 889   @param[in]   Attributes       The bit mask of attributes to set for the memory region.
 890   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 891
 892   @retval EFI_SUCCESS           The attributes were set for the memory region.
 893   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 894                                 BaseAddress and Length cannot be modified.
 895   @retval EFI_INVALID_PARAMETER Length is zero.
 896                                 Attributes specified an illegal combination of attributes that
 897                                 cannot be set together.
 898   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 899                                 the memory resource range.
 900   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 901                                 resource range specified by BaseAddress and Length.
 902                                 The bit mask of attributes is not support for the memory resource
 903                                 range specified by BaseAddress and Length.
 904
 905 **/
 906 EFI_STATUS
 907 EFIAPI
 908 SmmSetMemoryAttributesEx (
 909   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 910   IN  UINT64                                     Length,
 911   IN  UINT64                                     Attributes,
 912   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 913   );
 914
 915 /**
 916   This function clears the attributes for the memory region specified by BaseAddress and
 917   Length from their current attributes to the attributes specified by Attributes.
 918
 919   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 920   @param[in]   Length           The size in bytes of the memory region.
 921   @param[in]   Attributes       The bit mask of attributes to clear for the memory region.
 922   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 923
 924   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 925   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 926                                 BaseAddress and Length cannot be modified.
 927   @retval EFI_INVALID_PARAMETER Length is zero.
 928                                 Attributes specified an illegal combination of attributes that
 929                                 cannot be set together.
 930   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 931                                 the memory resource range.
 932   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 933                                 resource range specified by BaseAddress and Length.
 934                                 The bit mask of attributes is not support for the memory resource
 935                                 range specified by BaseAddress and Length.
 936
 937 **/
 938 EFI_STATUS
 939 EFIAPI
 940 SmmClearMemoryAttributesEx (
 941   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 942   IN  UINT64                                     Length,
 943   IN  UINT64                                     Attributes,
 944   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 945   );
 946
 947 /**
 948   This API provides a way to allocate memory for page table.
 949
 950   This API can be called more once to allocate memory for page tables.
 951
 952   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 953   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 954   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 955   returned.
 956
 957   @param  Pages                 The number of 4 KB pages to allocate.
 958
 959   @return A pointer to the allocated buffer or NULL if allocation fails.
 960
 961 **/
 962 VOID *
 963 AllocatePageTableMemory (
 964   IN UINTN           Pages
 965   );
 966
 967 /**
 968   Allocate pages for code.
 969
 970   @param[in]  Pages Number of pages to be allocated.
 971
 972   @return Allocated memory.
 973 **/
 974 VOID *
 975 AllocateCodePages (
 976   IN UINTN           Pages
 977   );
 978
 979 /**
 980   Allocate aligned pages for code.
 981
 982   @param[in]  Pages                 Number of pages to be allocated.
 983   @param[in]  Alignment             The requested alignment of the allocation.
 984                                     Must be a power of two.
 985                                     If Alignment is zero, then byte alignment is used.
 986
 987   @return Allocated memory.
 988 **/
 989 VOID *
 990 AllocateAlignedCodePages (
 991   IN UINTN            Pages,
 992   IN UINTN            Alignment
 993   );
 994
 995
 996 //
 997 // S3 related global variable and function prototype.
 998 //
 999
1000 extern BOOLEAN                mSmmS3Flag;
1001
1002 /**
1003   Initialize SMM S3 resume state structure used during S3 Resume.
1004
1005   @param[in] Cr3    The base address of the page tables to use in SMM.
1006
1007 **/
1008 VOID
1009 InitSmmS3ResumeState (
1010   IN UINT32  Cr3
1011   );
1012
1013 /**
1014   Get ACPI CPU data.
1015
1016 **/
1017 VOID
1018 GetAcpiCpuData (
1019   VOID
1020   );
1021
1022 /**
1023   Restore SMM Configuration in S3 boot path.
1024
1025 **/
1026 VOID
1027 RestoreSmmConfigurationInS3 (
1028   VOID
1029   );
1030
1031 /**
1032   Get ACPI S3 enable flag.
1033
1034 **/
1035 VOID
1036 GetAcpiS3EnableFlag (
1037   VOID
1038   );
1039
1040 /**
1041   Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1042
1043   @param[in] ApHltLoopCode          The address of the safe hlt-loop function.
1044   @param[in] TopOfStack             A pointer to the new stack to use for the ApHltLoopCode.
1045   @param[in] NumberToFinishAddress  Address of Semaphore of APs finish count.
1046
1047 **/
1048 VOID
1049 TransferApToSafeState (
1050   IN UINTN  ApHltLoopCode,
1051   IN UINTN  TopOfStack,
1052   IN UINTN  NumberToFinishAddress
1053   );
1054
1055 /**
1056   This function set given attributes of the memory region specified by
1057   BaseAddress and Length.
1058
1059   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1060   @param  BaseAddress       The physical address that is the start address of
1061                             a memory region.
1062   @param  Length            The size in bytes of the memory region.
1063   @param  Attributes        The bit mask of attributes to set for the memory
1064                             region.
1065
1066   @retval EFI_SUCCESS           The attributes were set for the memory region.
1067   @retval EFI_INVALID_PARAMETER Length is zero.
1068                                 Attributes specified an illegal combination of
1069                                 attributes that cannot be set together.
1070   @retval EFI_UNSUPPORTED       The processor does not support one or more
1071                                 bytes of the memory resource range specified
1072                                 by BaseAddress and Length.
1073                                 The bit mask of attributes is not supported for
1074                                 the memory resource range specified by
1075                                 BaseAddress and Length.
1076
1077 **/
1078 EFI_STATUS
1079 EFIAPI
1080 EdkiiSmmSetMemoryAttributes (
1081   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1082   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1083   IN  UINT64                                Length,
1084   IN  UINT64                                Attributes
1085   );
1086
1087 /**
1088   This function clears given attributes of the memory region specified by
1089   BaseAddress and Length.
1090
1091   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1092   @param  BaseAddress       The physical address that is the start address of
1093                             a memory region.
1094   @param  Length            The size in bytes of the memory region.
1095   @param  Attributes        The bit mask of attributes to clear for the memory
1096                             region.
1097
1098   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
1099   @retval EFI_INVALID_PARAMETER Length is zero.
1100                                 Attributes specified an illegal combination of
1101                                 attributes that cannot be cleared together.
1102   @retval EFI_UNSUPPORTED       The processor does not support one or more
1103                                 bytes of the memory resource range specified
1104                                 by BaseAddress and Length.
1105                                 The bit mask of attributes is not supported for
1106                                 the memory resource range specified by
1107                                 BaseAddress and Length.
1108
1109 **/
1110 EFI_STATUS
1111 EFIAPI
1112 EdkiiSmmClearMemoryAttributes (
1113   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1114   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1115   IN  UINT64                                Length,
1116   IN  UINT64                                Attributes
1117   );
1118
1119 /**
1120   This function retrieves the attributes of the memory region specified by
1121   BaseAddress and Length. If different attributes are got from different part
1122   of the memory region, EFI_NO_MAPPING will be returned.
1123
1124   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1125   @param  BaseAddress       The physical address that is the start address of
1126                             a memory region.
1127   @param  Length            The size in bytes of the memory region.
1128   @param  Attributes        Pointer to attributes returned.
1129
1130   @retval EFI_SUCCESS           The attributes got for the memory region.
1131   @retval EFI_INVALID_PARAMETER Length is zero.
1132                                 Attributes is NULL.
1133   @retval EFI_NO_MAPPING        Attributes are not consistent cross the memory
1134                                 region.
1135   @retval EFI_UNSUPPORTED       The processor does not support one or more
1136                                 bytes of the memory resource range specified
1137                                 by BaseAddress and Length.
1138
1139 **/
1140 EFI_STATUS
1141 EFIAPI
1142 EdkiiSmmGetMemoryAttributes (
1143   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1144   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1145   IN  UINT64                                Length,
1146   IN  UINT64                                *Attributes
1147   );
1148
1149 /**
1150   This function fixes up the address of the global variable or function
1151   referred in SmmInit assembly files to be the absoute address.
1152 **/
1153 VOID
1154 EFIAPI
1155 PiSmmCpuSmmInitFixupAddress (
1156  );
1157
1158 /**
1159   This function fixes up the address of the global variable or function
1160   referred in SmiEntry assembly files to be the absoute address.
1161 **/
1162 VOID
1163 EFIAPI
1164 PiSmmCpuSmiEntryFixupAddress (
1165  );
1166
1167 #endif