]> git.proxmox.com Git - mirror_edk2.git/blob - UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / PiSmmCpuDxeSmm.h
1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef _CPU_PISMMCPUDXESMM_H_
12 #define _CPU_PISMMCPUDXESMM_H_
13
14 #include <PiSmm.h>
15
16 #include <Protocol/MpService.h>
17 #include <Protocol/SmmConfiguration.h>
18 #include <Protocol/SmmCpu.h>
19 #include <Protocol/SmmAccess2.h>
20 #include <Protocol/SmmReadyToLock.h>
21 #include <Protocol/SmmCpuService.h>
22 #include <Protocol/SmmMemoryAttribute.h>
23 #include <Protocol/MmMp.h>
24
25 #include <Guid/AcpiS3Context.h>
26 #include <Guid/MemoryAttributesTable.h>
27 #include <Guid/PiSmmMemoryAttributesTable.h>
28
29 #include <Library/BaseLib.h>
30 #include <Library/IoLib.h>
31 #include <Library/TimerLib.h>
32 #include <Library/SynchronizationLib.h>
33 #include <Library/DebugLib.h>
34 #include <Library/BaseMemoryLib.h>
35 #include <Library/PcdLib.h>
36 #include <Library/MtrrLib.h>
37 #include <Library/SmmCpuPlatformHookLib.h>
38 #include <Library/SmmServicesTableLib.h>
39 #include <Library/MemoryAllocationLib.h>
40 #include <Library/UefiBootServicesTableLib.h>
41 #include <Library/UefiRuntimeServicesTableLib.h>
42 #include <Library/DebugAgentLib.h>
43 #include <Library/UefiLib.h>
44 #include <Library/HobLib.h>
45 #include <Library/LocalApicLib.h>
46 #include <Library/CpuLib.h>
47 #include <Library/UefiCpuLib.h>
48 #include <Library/CpuExceptionHandlerLib.h>
49 #include <Library/ReportStatusCodeLib.h>
50 #include <Library/SmmCpuFeaturesLib.h>
51 #include <Library/PeCoffGetEntryPointLib.h>
52 #include <Library/RegisterCpuFeaturesLib.h>
53
54 #include <AcpiCpuData.h>
55 #include <CpuHotPlugData.h>
56
57 #include <Register/Intel/Cpuid.h>
58 #include <Register/Intel/Msr.h>
59
60 #include "CpuService.h"
61 #include "SmmProfile.h"
62
63 //
64 // CET definition
65 //
66 #define CPUID_CET_SS BIT7
67 #define CPUID_CET_IBT BIT20
68
69 #define CR4_CET_ENABLE BIT23
70
71 #define MSR_IA32_S_CET 0x6A2
72 #define MSR_IA32_PL0_SSP 0x6A4
73 #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
74
75 typedef union {
76 struct {
77 // enable shadow stacks
78 UINT32 SH_STK_ENP : 1;
79 // enable the WRSS{D,Q}W instructions.
80 UINT32 WR_SHSTK_EN : 1;
81 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
82 UINT32 ENDBR_EN : 1;
83 // enable legacy compatibility treatment for indirect call/jmp tracking.
84 UINT32 LEG_IW_EN : 1;
85 // enable use of no-track prefix on indirect call/jmp.
86 UINT32 NO_TRACK_EN : 1;
87 // disable suppression of CET indirect branch tracking on legacy compatibility.
88 UINT32 SUPPRESS_DIS : 1;
89 UINT32 RSVD : 4;
90 // indirect branch tracking is suppressed.
91 // This bit can be written to 1 only if TRACKER is written as IDLE.
92 UINT32 SUPPRESS : 1;
93 // Value of the endbranch state machine
94 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
95 UINT32 TRACKER : 1;
96 // linear address of a bitmap in memory indicating valid
97 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
98 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
99 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
100 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
101 // (this automatically aligns the address on a 4-Kbyte boundary).
102 UINT32 EB_LEG_BITMAP_BASE_low : 12;
103 UINT32 EB_LEG_BITMAP_BASE_high : 32;
104 } Bits;
105 UINT64 Uint64;
106 } MSR_IA32_CET;
107
108 //
109 // MSRs required for configuration of SMM Code Access Check
110 //
111 #define EFI_MSR_SMM_MCA_CAP 0x17D
112 #define SMM_CODE_ACCESS_CHK_BIT BIT58
113
114 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
115 #define SMM_CODE_CHK_EN_BIT BIT2
116
117 ///
118 /// Page Table Entry
119 ///
120 #define IA32_PG_P BIT0
121 #define IA32_PG_RW BIT1
122 #define IA32_PG_U BIT2
123 #define IA32_PG_WT BIT3
124 #define IA32_PG_CD BIT4
125 #define IA32_PG_A BIT5
126 #define IA32_PG_D BIT6
127 #define IA32_PG_PS BIT7
128 #define IA32_PG_PAT_2M BIT12
129 #define IA32_PG_PAT_4K IA32_PG_PS
130 #define IA32_PG_PMNT BIT62
131 #define IA32_PG_NX BIT63
132
133 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
134 //
135 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
136 // X64 PAE PDPTE does not have such restriction
137 //
138 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
139
140 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
141
142 #define PAGING_4K_MASK 0xFFF
143 #define PAGING_2M_MASK 0x1FFFFF
144 #define PAGING_1G_MASK 0x3FFFFFFF
145
146 #define PAGING_PAE_INDEX_MASK 0x1FF
147
148 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
149 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
150 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
151
152 #define SMRR_MAX_ADDRESS BASE_4GB
153
154 typedef enum {
155 PageNone,
156 Page4K,
157 Page2M,
158 Page1G,
159 } PAGE_ATTRIBUTE;
160
161 typedef struct {
162 PAGE_ATTRIBUTE Attribute;
163 UINT64 Length;
164 UINT64 AddressMask;
165 } PAGE_ATTRIBUTE_TABLE;
166
167 //
168 // Size of Task-State Segment defined in IA32 Manual
169 //
170 #define TSS_SIZE 104
171 #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
172 #define TSS_X64_IST1_OFFSET 36
173 #define TSS_IA32_CR3_OFFSET 28
174 #define TSS_IA32_ESP_OFFSET 56
175 #define TSS_IA32_SSP_OFFSET 104
176
177 #define CR0_WP BIT16
178
179 //
180 // Code select value
181 //
182 #define PROTECT_MODE_CODE_SEGMENT 0x08
183 #define LONG_MODE_CODE_SEGMENT 0x38
184
185 //
186 // The size 0x20 must be bigger than
187 // the size of template code of SmmInit. Currently,
188 // the size of SmmInit requires the 0x16 Bytes buffer
189 // at least.
190 //
191 #define BACK_BUF_SIZE 0x20
192
193 #define EXCEPTION_VECTOR_NUMBER 0x20
194
195 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
196
197 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;
198 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
199 #define ARRIVAL_EXCEPTION_DELAYED 0x2
200 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
201
202 //
203 // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
204 //
205 typedef struct {
206 EFI_AP_PROCEDURE Procedure;
207 VOID *ProcedureArgument;
208 } PROCEDURE_WRAPPER;
209
210 #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')
211
212 typedef struct {
213 UINTN Signature;
214 LIST_ENTRY Link;
215
216 SPIN_LOCK *SpinLock;
217 volatile UINT32 RunningApCount;
218 } PROCEDURE_TOKEN;
219
220 #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
221
222 #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')
223
224 typedef struct {
225 UINTN Signature;
226 LIST_ENTRY Link;
227
228 UINT8 *Buffer;
229 } TOKEN_BUFFER;
230
231 #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
232
233 //
234 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
235 // Contains the SMM Configuration Protocols that is produced.
236 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
237 //
238 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
239
240 typedef struct {
241 UINTN Signature;
242
243 EFI_HANDLE SmmCpuHandle;
244
245 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
246 SMM_CPU_OPERATION *Operation;
247 UINTN *CpuSaveStateSize;
248 VOID **CpuSaveState;
249
250 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
251 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
252 EFI_SMM_ENTRY_POINT SmmCoreEntry;
253
254 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
255
256 PROCEDURE_WRAPPER *ApWrapperFunc;
257 LIST_ENTRY TokenList;
258 LIST_ENTRY *FirstFreeToken;
259 } SMM_CPU_PRIVATE_DATA;
260
261 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
262 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
263 extern UINTN mMaxNumberOfCpus;
264 extern UINTN mNumberOfCpus;
265 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
266 extern EFI_MM_MP_PROTOCOL mSmmMp;
267 extern UINTN mInternalCr3;
268
269 ///
270 /// The mode of the CPU at the time an SMI occurs
271 ///
272 extern UINT8 mSmmSaveStateRegisterLma;
273
274 //
275 // SMM CPU Protocol function prototypes.
276 //
277
278 /**
279 Read information from the CPU save state.
280
281 @param This EFI_SMM_CPU_PROTOCOL instance
282 @param Width The number of bytes to read from the CPU save state.
283 @param Register Specifies the CPU register to read form the save state.
284 @param CpuIndex Specifies the zero-based index of the CPU save state
285 @param Buffer Upon return, this holds the CPU register value read from the save state.
286
287 @retval EFI_SUCCESS The register was read from Save State
288 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
289 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.
290
291 **/
292 EFI_STATUS
293 EFIAPI
294 SmmReadSaveState (
295 IN CONST EFI_SMM_CPU_PROTOCOL *This,
296 IN UINTN Width,
297 IN EFI_SMM_SAVE_STATE_REGISTER Register,
298 IN UINTN CpuIndex,
299 OUT VOID *Buffer
300 );
301
302 /**
303 Write data to the CPU save state.
304
305 @param This EFI_SMM_CPU_PROTOCOL instance
306 @param Width The number of bytes to read from the CPU save state.
307 @param Register Specifies the CPU register to write to the save state.
308 @param CpuIndex Specifies the zero-based index of the CPU save state
309 @param Buffer Upon entry, this holds the new CPU register value.
310
311 @retval EFI_SUCCESS The register was written from Save State
312 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
313 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct
314
315 **/
316 EFI_STATUS
317 EFIAPI
318 SmmWriteSaveState (
319 IN CONST EFI_SMM_CPU_PROTOCOL *This,
320 IN UINTN Width,
321 IN EFI_SMM_SAVE_STATE_REGISTER Register,
322 IN UINTN CpuIndex,
323 IN CONST VOID *Buffer
324 );
325
326 /**
327 Read a CPU Save State register on the target processor.
328
329 This function abstracts the differences that whether the CPU Save State register is in the
330 IA32 CPU Save State Map or X64 CPU Save State Map.
331
332 This function supports reading a CPU Save State register in SMBase relocation handler.
333
334 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
335 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
336 @param[in] Width The number of bytes to read from the CPU save state.
337 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
338
339 @retval EFI_SUCCESS The register was read from Save State.
340 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
341 @retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.
342
343 **/
344 EFI_STATUS
345 EFIAPI
346 ReadSaveStateRegister (
347 IN UINTN CpuIndex,
348 IN EFI_SMM_SAVE_STATE_REGISTER Register,
349 IN UINTN Width,
350 OUT VOID *Buffer
351 );
352
353 /**
354 Write value to a CPU Save State register on the target processor.
355
356 This function abstracts the differences that whether the CPU Save State register is in the
357 IA32 CPU Save State Map or X64 CPU Save State Map.
358
359 This function supports writing a CPU Save State register in SMBase relocation handler.
360
361 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
362 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
363 @param[in] Width The number of bytes to read from the CPU save state.
364 @param[in] Buffer Upon entry, this holds the new CPU register value.
365
366 @retval EFI_SUCCESS The register was written to Save State.
367 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
368 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.
369
370 **/
371 EFI_STATUS
372 EFIAPI
373 WriteSaveStateRegister (
374 IN UINTN CpuIndex,
375 IN EFI_SMM_SAVE_STATE_REGISTER Register,
376 IN UINTN Width,
377 IN CONST VOID *Buffer
378 );
379
380 extern CONST UINT8 gcSmmInitTemplate[];
381 extern CONST UINT16 gcSmmInitSize;
382 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
383 extern UINT32 mSmmCr0;
384 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
385 extern UINT32 mSmmCr4;
386 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
387 X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
388 X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;
389 extern BOOLEAN mCetSupported;
390
391 /**
392 Semaphore operation for all processor relocate SMMBase.
393 **/
394 VOID
395 EFIAPI
396 SmmRelocationSemaphoreComplete (
397 VOID
398 );
399
400 ///
401 /// The type of SMM CPU Information
402 ///
403 typedef struct {
404 SPIN_LOCK *Busy;
405 volatile EFI_AP_PROCEDURE2 Procedure;
406 volatile VOID *Parameter;
407 volatile UINT32 *Run;
408 volatile BOOLEAN *Present;
409 PROCEDURE_TOKEN *Token;
410 EFI_STATUS *Status;
411 } SMM_CPU_DATA_BLOCK;
412
413 typedef enum {
414 SmmCpuSyncModeTradition,
415 SmmCpuSyncModeRelaxedAp,
416 SmmCpuSyncModeMax
417 } SMM_CPU_SYNC_MODE;
418
419 typedef struct {
420 //
421 // Pointer to an array. The array should be located immediately after this structure
422 // so that UC cache-ability can be set together.
423 //
424 SMM_CPU_DATA_BLOCK *CpuData;
425 volatile UINT32 *Counter;
426 volatile UINT32 BspIndex;
427 volatile BOOLEAN *InsideSmm;
428 volatile BOOLEAN *AllCpusInSync;
429 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
430 volatile BOOLEAN SwitchBsp;
431 volatile BOOLEAN *CandidateBsp;
432 volatile BOOLEAN AllApArrivedWithException;
433 EFI_AP_PROCEDURE StartupProcedure;
434 VOID *StartupProcArgs;
435 } SMM_DISPATCHER_MP_SYNC_DATA;
436
437 #define SMM_PSD_OFFSET 0xfb00
438
439 ///
440 /// All global semaphores' pointer
441 ///
442 typedef struct {
443 volatile UINT32 *Counter;
444 volatile BOOLEAN *InsideSmm;
445 volatile BOOLEAN *AllCpusInSync;
446 SPIN_LOCK *PFLock;
447 SPIN_LOCK *CodeAccessCheckLock;
448 } SMM_CPU_SEMAPHORE_GLOBAL;
449
450 ///
451 /// All semaphores for each processor
452 ///
453 typedef struct {
454 SPIN_LOCK *Busy;
455 volatile UINT32 *Run;
456 volatile BOOLEAN *Present;
457 SPIN_LOCK *Token;
458 } SMM_CPU_SEMAPHORE_CPU;
459
460 ///
461 /// All semaphores' information
462 ///
463 typedef struct {
464 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
465 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
466 } SMM_CPU_SEMAPHORES;
467
468 extern IA32_DESCRIPTOR gcSmiGdtr;
469 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
470 extern UINTN mGdtBufferSize;
471 extern IA32_DESCRIPTOR gcSmiIdtr;
472 extern VOID *gcSmiIdtrPtr;
473 extern UINT64 gPhyMask;
474 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
475 extern UINTN mSmmStackArrayBase;
476 extern UINTN mSmmStackArrayEnd;
477 extern UINTN mSmmStackSize;
478 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
479 extern IA32_DESCRIPTOR gcSmiInitGdtr;
480 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
481 extern UINTN mSemaphoreSize;
482 extern SPIN_LOCK *mPFLock;
483 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
484 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
485 extern UINTN mSmmCpuSmramRangeCount;
486 extern UINT8 mPhysicalAddressBits;
487
488 //
489 // Copy of the PcdPteMemoryEncryptionAddressOrMask
490 //
491 extern UINT64 mAddressEncMask;
492
493 /**
494 Create 4G PageTable in SMRAM.
495
496 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
497 @return PageTable Address
498
499 **/
500 UINT32
501 Gen4GPageTable (
502 IN BOOLEAN Is32BitPageTable
503 );
504
505 /**
506 Initialize global data for MP synchronization.
507
508 @param Stacks Base address of SMI stack buffer for all processors.
509 @param StackSize Stack size for each processor in SMM.
510 @param ShadowStackSize Shadow Stack size for each processor in SMM.
511
512 **/
513 UINT32
514 InitializeMpServiceData (
515 IN VOID *Stacks,
516 IN UINTN StackSize,
517 IN UINTN ShadowStackSize
518 );
519
520 /**
521 Initialize Timer for SMM AP Sync.
522
523 **/
524 VOID
525 InitializeSmmTimer (
526 VOID
527 );
528
529 /**
530 Start Timer for SMM AP Sync.
531
532 **/
533 UINT64
534 EFIAPI
535 StartSyncTimer (
536 VOID
537 );
538
539 /**
540 Check if the SMM AP Sync timer is timeout.
541
542 @param Timer The start timer from the begin.
543
544 **/
545 BOOLEAN
546 EFIAPI
547 IsSyncTimerTimeout (
548 IN UINT64 Timer
549 );
550
551 /**
552 Initialize IDT for SMM Stack Guard.
553
554 **/
555 VOID
556 EFIAPI
557 InitializeIDTSmmStackGuard (
558 VOID
559 );
560
561 /**
562 Initialize IDT IST Field.
563
564 @param[in] ExceptionType Exception type.
565 @param[in] Ist IST value.
566
567 **/
568 VOID
569 EFIAPI
570 InitializeIdtIst (
571 IN EFI_EXCEPTION_TYPE ExceptionType,
572 IN UINT8 Ist
573 );
574
575 /**
576 Initialize Gdt for all processors.
577
578 @param[in] Cr3 CR3 value.
579 @param[out] GdtStepSize The step size for GDT table.
580
581 @return GdtBase for processor 0.
582 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
583 **/
584 VOID *
585 InitGdt (
586 IN UINTN Cr3,
587 OUT UINTN *GdtStepSize
588 );
589
590 /**
591
592 Register the SMM Foundation entry point.
593
594 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
595 @param SmmEntryPoint SMM Foundation EntryPoint
596
597 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
598
599 **/
600 EFI_STATUS
601 EFIAPI
602 RegisterSmmEntry (
603 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
604 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
605 );
606
607 /**
608 Create PageTable for SMM use.
609
610 @return PageTable Address
611
612 **/
613 UINT32
614 SmmInitPageTable (
615 VOID
616 );
617
618 /**
619 Schedule a procedure to run on the specified CPU.
620
621 @param Procedure The address of the procedure to run
622 @param CpuIndex Target CPU number
623 @param ProcArguments The parameter to pass to the procedure
624
625 @retval EFI_INVALID_PARAMETER CpuNumber not valid
626 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
627 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
628 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
629 @retval EFI_SUCCESS - The procedure has been successfully scheduled
630
631 **/
632 EFI_STATUS
633 EFIAPI
634 SmmStartupThisAp (
635 IN EFI_AP_PROCEDURE Procedure,
636 IN UINTN CpuIndex,
637 IN OUT VOID *ProcArguments OPTIONAL
638 );
639
640 /**
641 Schedule a procedure to run on the specified CPU in a blocking fashion.
642
643 @param Procedure The address of the procedure to run
644 @param CpuIndex Target CPU Index
645 @param ProcArguments The parameter to pass to the procedure
646
647 @retval EFI_INVALID_PARAMETER CpuNumber not valid
648 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
649 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
650 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
651 @retval EFI_SUCCESS The procedure has been successfully scheduled
652
653 **/
654 EFI_STATUS
655 EFIAPI
656 SmmBlockingStartupThisAp (
657 IN EFI_AP_PROCEDURE Procedure,
658 IN UINTN CpuIndex,
659 IN OUT VOID *ProcArguments OPTIONAL
660 );
661
662 /**
663 This function sets the attributes for the memory region specified by BaseAddress and
664 Length from their current attributes to the attributes specified by Attributes.
665
666 @param[in] BaseAddress The physical address that is the start address of a memory region.
667 @param[in] Length The size in bytes of the memory region.
668 @param[in] Attributes The bit mask of attributes to set for the memory region.
669
670 @retval EFI_SUCCESS The attributes were set for the memory region.
671 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
672 BaseAddress and Length cannot be modified.
673 @retval EFI_INVALID_PARAMETER Length is zero.
674 Attributes specified an illegal combination of attributes that
675 cannot be set together.
676 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
677 the memory resource range.
678 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
679 resource range specified by BaseAddress and Length.
680 The bit mask of attributes is not support for the memory resource
681 range specified by BaseAddress and Length.
682
683 **/
684 EFI_STATUS
685 EFIAPI
686 SmmSetMemoryAttributes (
687 IN EFI_PHYSICAL_ADDRESS BaseAddress,
688 IN UINT64 Length,
689 IN UINT64 Attributes
690 );
691
692 /**
693 This function clears the attributes for the memory region specified by BaseAddress and
694 Length from their current attributes to the attributes specified by Attributes.
695
696 @param[in] BaseAddress The physical address that is the start address of a memory region.
697 @param[in] Length The size in bytes of the memory region.
698 @param[in] Attributes The bit mask of attributes to clear for the memory region.
699
700 @retval EFI_SUCCESS The attributes were cleared for the memory region.
701 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
702 BaseAddress and Length cannot be modified.
703 @retval EFI_INVALID_PARAMETER Length is zero.
704 Attributes specified an illegal combination of attributes that
705 cannot be set together.
706 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
707 the memory resource range.
708 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
709 resource range specified by BaseAddress and Length.
710 The bit mask of attributes is not support for the memory resource
711 range specified by BaseAddress and Length.
712
713 **/
714 EFI_STATUS
715 EFIAPI
716 SmmClearMemoryAttributes (
717 IN EFI_PHYSICAL_ADDRESS BaseAddress,
718 IN UINT64 Length,
719 IN UINT64 Attributes
720 );
721
722 /**
723 Initialize MP synchronization data.
724
725 **/
726 VOID
727 EFIAPI
728 InitializeMpSyncData (
729 VOID
730 );
731
732 /**
733
734 Find out SMRAM information including SMRR base and SMRR size.
735
736 @param SmrrBase SMRR base
737 @param SmrrSize SMRR size
738
739 **/
740 VOID
741 FindSmramInfo (
742 OUT UINT32 *SmrrBase,
743 OUT UINT32 *SmrrSize
744 );
745
746 /**
747 Relocate SmmBases for each processor.
748
749 Execute on first boot and all S3 resumes
750
751 **/
752 VOID
753 EFIAPI
754 SmmRelocateBases (
755 VOID
756 );
757
758 /**
759 Page Fault handler for SMM use.
760
761 @param InterruptType Defines the type of interrupt or exception that
762 occurred on the processor.This parameter is processor architecture specific.
763 @param SystemContext A pointer to the processor context when
764 the interrupt occurred on the processor.
765 **/
766 VOID
767 EFIAPI
768 SmiPFHandler (
769 IN EFI_EXCEPTION_TYPE InterruptType,
770 IN EFI_SYSTEM_CONTEXT SystemContext
771 );
772
773 /**
774 Perform the remaining tasks.
775
776 **/
777 VOID
778 PerformRemainingTasks (
779 VOID
780 );
781
782 /**
783 Perform the pre tasks.
784
785 **/
786 VOID
787 PerformPreTasks (
788 VOID
789 );
790
791 /**
792 Initialize MSR spin lock by MSR index.
793
794 @param MsrIndex MSR index value.
795
796 **/
797 VOID
798 InitMsrSpinLockByIndex (
799 IN UINT32 MsrIndex
800 );
801
802 /**
803 Hook return address of SMM Save State so that semaphore code
804 can be executed immediately after AP exits SMM to indicate to
805 the BSP that an AP has exited SMM after SMBASE relocation.
806
807 @param[in] CpuIndex The processor index.
808 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
809 immediately after AP exits SMM.
810
811 **/
812 VOID
813 SemaphoreHook (
814 IN UINTN CpuIndex,
815 IN volatile BOOLEAN *RebasedFlag
816 );
817
818 /**
819 Configure SMM Code Access Check feature for all processors.
820 SMM Feature Control MSR will be locked after configuration.
821 **/
822 VOID
823 ConfigSmmCodeAccessCheck (
824 VOID
825 );
826
827 /**
828 Hook the code executed immediately after an RSM instruction on the currently
829 executing CPU. The mode of code executed immediately after RSM must be
830 detected, and the appropriate hook must be selected. Always clear the auto
831 HALT restart flag if it is set.
832
833 @param[in] CpuIndex The processor index for the currently
834 executing CPU.
835 @param[in] CpuState Pointer to SMRAM Save State Map for the
836 currently executing CPU.
837 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
838 32-bit mode from 64-bit SMM.
839 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
840 same mode as SMM.
841
842 @retval The value of the original instruction pointer before it was hooked.
843
844 **/
845 UINT64
846 EFIAPI
847 HookReturnFromSmm (
848 IN UINTN CpuIndex,
849 SMRAM_SAVE_STATE_MAP *CpuState,
850 UINT64 NewInstructionPointer32,
851 UINT64 NewInstructionPointer
852 );
853
854 /**
855 Get the size of the SMI Handler in bytes.
856
857 @retval The size, in bytes, of the SMI Handler.
858
859 **/
860 UINTN
861 EFIAPI
862 GetSmiHandlerSize (
863 VOID
864 );
865
866 /**
867 Install the SMI handler for the CPU specified by CpuIndex. This function
868 is called by the CPU that was elected as monarch during System Management
869 Mode initialization.
870
871 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
872 The value must be between 0 and the NumberOfCpus field
873 in the System Management System Table (SMST).
874 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
875 @param[in] SmiStack The stack to use when an SMI is processed by the
876 the CPU specified by CpuIndex.
877 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
878 processed by the CPU specified by CpuIndex.
879 @param[in] GdtBase The base address of the GDT to use when an SMI is
880 processed by the CPU specified by CpuIndex.
881 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
882 processed by the CPU specified by CpuIndex.
883 @param[in] IdtBase The base address of the IDT to use when an SMI is
884 processed by the CPU specified by CpuIndex.
885 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
886 processed by the CPU specified by CpuIndex.
887 @param[in] Cr3 The base address of the page tables to use when an SMI
888 is processed by the CPU specified by CpuIndex.
889 **/
890 VOID
891 EFIAPI
892 InstallSmiHandler (
893 IN UINTN CpuIndex,
894 IN UINT32 SmBase,
895 IN VOID *SmiStack,
896 IN UINTN StackSize,
897 IN UINTN GdtBase,
898 IN UINTN GdtSize,
899 IN UINTN IdtBase,
900 IN UINTN IdtSize,
901 IN UINT32 Cr3
902 );
903
904 /**
905 Search module name by input IP address and output it.
906
907 @param CallerIpAddress Caller instruction pointer.
908
909 **/
910 VOID
911 DumpModuleInfoByIp (
912 IN UINTN CallerIpAddress
913 );
914
915 /**
916 This function sets memory attribute according to MemoryAttributesTable.
917 **/
918 VOID
919 SetMemMapAttributes (
920 VOID
921 );
922
923 /**
924 This function sets UEFI memory attribute according to UEFI memory map.
925 **/
926 VOID
927 SetUefiMemMapAttributes (
928 VOID
929 );
930
931 /**
932 Return if the Address is forbidden as SMM communication buffer.
933
934 @param[in] Address the address to be checked
935
936 @return TRUE The address is forbidden as SMM communication buffer.
937 @return FALSE The address is allowed as SMM communication buffer.
938 **/
939 BOOLEAN
940 IsSmmCommBufferForbiddenAddress (
941 IN UINT64 Address
942 );
943
944 /**
945 This function caches the UEFI memory map information.
946 **/
947 VOID
948 GetUefiMemoryMap (
949 VOID
950 );
951
952 /**
953 This function sets memory attribute for page table.
954 **/
955 VOID
956 SetPageTableAttributes (
957 VOID
958 );
959
960 /**
961 Get page table base address and the depth of the page table.
962
963 @param[out] Base Page table base address.
964 @param[out] FiveLevels TRUE means 5 level paging. FALSE means 4 level paging.
965 **/
966 VOID
967 GetPageTable (
968 OUT UINTN *Base,
969 OUT BOOLEAN *FiveLevels OPTIONAL
970 );
971
972 /**
973 This function sets the attributes for the memory region specified by BaseAddress and
974 Length from their current attributes to the attributes specified by Attributes.
975
976 @param[in] BaseAddress The physical address that is the start address of a memory region.
977 @param[in] Length The size in bytes of the memory region.
978 @param[in] Attributes The bit mask of attributes to set for the memory region.
979 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
980
981 @retval EFI_SUCCESS The attributes were set for the memory region.
982 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
983 BaseAddress and Length cannot be modified.
984 @retval EFI_INVALID_PARAMETER Length is zero.
985 Attributes specified an illegal combination of attributes that
986 cannot be set together.
987 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
988 the memory resource range.
989 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
990 resource range specified by BaseAddress and Length.
991 The bit mask of attributes is not support for the memory resource
992 range specified by BaseAddress and Length.
993
994 **/
995 EFI_STATUS
996 EFIAPI
997 SmmSetMemoryAttributesEx (
998 IN EFI_PHYSICAL_ADDRESS BaseAddress,
999 IN UINT64 Length,
1000 IN UINT64 Attributes,
1001 OUT BOOLEAN *IsSplitted OPTIONAL
1002 );
1003
1004 /**
1005 This function clears the attributes for the memory region specified by BaseAddress and
1006 Length from their current attributes to the attributes specified by Attributes.
1007
1008 @param[in] BaseAddress The physical address that is the start address of a memory region.
1009 @param[in] Length The size in bytes of the memory region.
1010 @param[in] Attributes The bit mask of attributes to clear for the memory region.
1011 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
1012
1013 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1014 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1015 BaseAddress and Length cannot be modified.
1016 @retval EFI_INVALID_PARAMETER Length is zero.
1017 Attributes specified an illegal combination of attributes that
1018 cannot be set together.
1019 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1020 the memory resource range.
1021 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1022 resource range specified by BaseAddress and Length.
1023 The bit mask of attributes is not support for the memory resource
1024 range specified by BaseAddress and Length.
1025
1026 **/
1027 EFI_STATUS
1028 EFIAPI
1029 SmmClearMemoryAttributesEx (
1030 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1031 IN UINT64 Length,
1032 IN UINT64 Attributes,
1033 OUT BOOLEAN *IsSplitted OPTIONAL
1034 );
1035
1036 /**
1037 This API provides a way to allocate memory for page table.
1038
1039 This API can be called more once to allocate memory for page tables.
1040
1041 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
1042 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
1043 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
1044 returned.
1045
1046 @param Pages The number of 4 KB pages to allocate.
1047
1048 @return A pointer to the allocated buffer or NULL if allocation fails.
1049
1050 **/
1051 VOID *
1052 AllocatePageTableMemory (
1053 IN UINTN Pages
1054 );
1055
1056 /**
1057 Allocate pages for code.
1058
1059 @param[in] Pages Number of pages to be allocated.
1060
1061 @return Allocated memory.
1062 **/
1063 VOID *
1064 AllocateCodePages (
1065 IN UINTN Pages
1066 );
1067
1068 /**
1069 Allocate aligned pages for code.
1070
1071 @param[in] Pages Number of pages to be allocated.
1072 @param[in] Alignment The requested alignment of the allocation.
1073 Must be a power of two.
1074 If Alignment is zero, then byte alignment is used.
1075
1076 @return Allocated memory.
1077 **/
1078 VOID *
1079 AllocateAlignedCodePages (
1080 IN UINTN Pages,
1081 IN UINTN Alignment
1082 );
1083
1084 //
1085 // S3 related global variable and function prototype.
1086 //
1087
1088 extern BOOLEAN mSmmS3Flag;
1089
1090 /**
1091 Initialize SMM S3 resume state structure used during S3 Resume.
1092
1093 @param[in] Cr3 The base address of the page tables to use in SMM.
1094
1095 **/
1096 VOID
1097 InitSmmS3ResumeState (
1098 IN UINT32 Cr3
1099 );
1100
1101 /**
1102 Get ACPI CPU data.
1103
1104 **/
1105 VOID
1106 GetAcpiCpuData (
1107 VOID
1108 );
1109
1110 /**
1111 Restore SMM Configuration in S3 boot path.
1112
1113 **/
1114 VOID
1115 RestoreSmmConfigurationInS3 (
1116 VOID
1117 );
1118
1119 /**
1120 Get ACPI S3 enable flag.
1121
1122 **/
1123 VOID
1124 GetAcpiS3EnableFlag (
1125 VOID
1126 );
1127
1128 /**
1129 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1130
1131 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1132 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1133 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1134
1135 **/
1136 VOID
1137 TransferApToSafeState (
1138 IN UINTN ApHltLoopCode,
1139 IN UINTN TopOfStack,
1140 IN UINTN NumberToFinishAddress
1141 );
1142
1143 /**
1144 Set ShadowStack memory.
1145
1146 @param[in] Cr3 The page table base address.
1147 @param[in] BaseAddress The physical address that is the start address of a memory region.
1148 @param[in] Length The size in bytes of the memory region.
1149
1150 @retval EFI_SUCCESS The shadow stack memory is set.
1151 **/
1152 EFI_STATUS
1153 SetShadowStack (
1154 IN UINTN Cr3,
1155 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1156 IN UINT64 Length
1157 );
1158
1159 /**
1160 Set not present memory.
1161
1162 @param[in] Cr3 The page table base address.
1163 @param[in] BaseAddress The physical address that is the start address of a memory region.
1164 @param[in] Length The size in bytes of the memory region.
1165
1166 @retval EFI_SUCCESS The not present memory is set.
1167 **/
1168 EFI_STATUS
1169 SetNotPresentPage (
1170 IN UINTN Cr3,
1171 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1172 IN UINT64 Length
1173 );
1174
1175 /**
1176 Initialize the shadow stack related data structure.
1177
1178 @param CpuIndex The index of CPU.
1179 @param ShadowStack The bottom of the shadow stack for this CPU.
1180 **/
1181 VOID
1182 InitShadowStack (
1183 IN UINTN CpuIndex,
1184 IN VOID *ShadowStack
1185 );
1186
1187 /**
1188 This function set given attributes of the memory region specified by
1189 BaseAddress and Length.
1190
1191 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1192 @param BaseAddress The physical address that is the start address of
1193 a memory region.
1194 @param Length The size in bytes of the memory region.
1195 @param Attributes The bit mask of attributes to set for the memory
1196 region.
1197
1198 @retval EFI_SUCCESS The attributes were set for the memory region.
1199 @retval EFI_INVALID_PARAMETER Length is zero.
1200 Attributes specified an illegal combination of
1201 attributes that cannot be set together.
1202 @retval EFI_UNSUPPORTED The processor does not support one or more
1203 bytes of the memory resource range specified
1204 by BaseAddress and Length.
1205 The bit mask of attributes is not supported for
1206 the memory resource range specified by
1207 BaseAddress and Length.
1208
1209 **/
1210 EFI_STATUS
1211 EFIAPI
1212 EdkiiSmmSetMemoryAttributes (
1213 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1214 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1215 IN UINT64 Length,
1216 IN UINT64 Attributes
1217 );
1218
1219 /**
1220 This function clears given attributes of the memory region specified by
1221 BaseAddress and Length.
1222
1223 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1224 @param BaseAddress The physical address that is the start address of
1225 a memory region.
1226 @param Length The size in bytes of the memory region.
1227 @param Attributes The bit mask of attributes to clear for the memory
1228 region.
1229
1230 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1231 @retval EFI_INVALID_PARAMETER Length is zero.
1232 Attributes specified an illegal combination of
1233 attributes that cannot be cleared together.
1234 @retval EFI_UNSUPPORTED The processor does not support one or more
1235 bytes of the memory resource range specified
1236 by BaseAddress and Length.
1237 The bit mask of attributes is not supported for
1238 the memory resource range specified by
1239 BaseAddress and Length.
1240
1241 **/
1242 EFI_STATUS
1243 EFIAPI
1244 EdkiiSmmClearMemoryAttributes (
1245 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1246 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1247 IN UINT64 Length,
1248 IN UINT64 Attributes
1249 );
1250
1251 /**
1252 This function retrieves the attributes of the memory region specified by
1253 BaseAddress and Length. If different attributes are got from different part
1254 of the memory region, EFI_NO_MAPPING will be returned.
1255
1256 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1257 @param BaseAddress The physical address that is the start address of
1258 a memory region.
1259 @param Length The size in bytes of the memory region.
1260 @param Attributes Pointer to attributes returned.
1261
1262 @retval EFI_SUCCESS The attributes got for the memory region.
1263 @retval EFI_INVALID_PARAMETER Length is zero.
1264 Attributes is NULL.
1265 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1266 region.
1267 @retval EFI_UNSUPPORTED The processor does not support one or more
1268 bytes of the memory resource range specified
1269 by BaseAddress and Length.
1270
1271 **/
1272 EFI_STATUS
1273 EFIAPI
1274 EdkiiSmmGetMemoryAttributes (
1275 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1276 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1277 IN UINT64 Length,
1278 IN UINT64 *Attributes
1279 );
1280
1281 /**
1282 This function fixes up the address of the global variable or function
1283 referred in SmmInit assembly files to be the absolute address.
1284 **/
1285 VOID
1286 EFIAPI
1287 PiSmmCpuSmmInitFixupAddress (
1288 );
1289
1290 /**
1291 This function fixes up the address of the global variable or function
1292 referred in SmiEntry assembly files to be the absolute address.
1293 **/
1294 VOID
1295 EFIAPI
1296 PiSmmCpuSmiEntryFixupAddress (
1297 );
1298
1299 /**
1300 This function reads CR2 register when on-demand paging is enabled
1301 for 64 bit and no action for 32 bit.
1302
1303 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1304 **/
1305 VOID
1306 SaveCr2 (
1307 OUT UINTN *Cr2
1308 );
1309
1310 /**
1311 This function writes into CR2 register when on-demand paging is enabled
1312 for 64 bit and no action for 32 bit.
1313
1314 @param[in] Cr2 Value to write into CR2 register.
1315 **/
1316 VOID
1317 RestoreCr2 (
1318 IN UINTN Cr2
1319 );
1320
1321 /**
1322 Schedule a procedure to run on the specified CPU.
1323
1324 @param[in] Procedure The address of the procedure to run
1325 @param[in] CpuIndex Target CPU Index
1326 @param[in,out] ProcArguments The parameter to pass to the procedure
1327 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1328 procedure in a blocking or non-blocking fashion. If it is NULL the
1329 call is blocking, and the call will not return until the AP has
1330 completed the procedure. If the token is not NULL, the call will
1331 return immediately. The caller can check whether the procedure has
1332 completed with CheckOnProcedure or WaitForProcedure.
1333 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1334 execution of Procedure, either for blocking or non-blocking mode.
1335 Zero means infinity. If the timeout expires before all APs return
1336 from Procedure, then Procedure on the failed APs is terminated. If
1337 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1338 If the timeout expires in non-blocking mode, the timeout determined
1339 can be through CheckOnProcedure or WaitForProcedure.
1340 Note that timeout support is optional. Whether an implementation
1341 supports this feature can be determined via the Attributes data
1342 member.
1343 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1344 by Procedure when it completes execution on the target AP, or with
1345 EFI_TIMEOUT if the Procedure fails to complete within the optional
1346 timeout. The implementation will update this variable with
1347 EFI_NOT_READY prior to starting Procedure on the target AP.
1348
1349 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1350 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1351 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1352 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1353 @retval EFI_SUCCESS The procedure has been successfully scheduled
1354
1355 **/
1356 EFI_STATUS
1357 InternalSmmStartupThisAp (
1358 IN EFI_AP_PROCEDURE2 Procedure,
1359 IN UINTN CpuIndex,
1360 IN OUT VOID *ProcArguments OPTIONAL,
1361 IN OUT MM_COMPLETION *Token,
1362 IN UINTN TimeoutInMicroseconds,
1363 IN OUT EFI_STATUS *CpuStatus
1364 );
1365
1366 /**
1367 Checks whether the input token is the current used token.
1368
1369 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1370 BroadcastProcedure.
1371
1372 @retval TRUE The input token is the current used token.
1373 @retval FALSE The input token is not the current used token.
1374 **/
1375 BOOLEAN
1376 IsTokenInUse (
1377 IN SPIN_LOCK *Token
1378 );
1379
1380 /**
1381 Checks status of specified AP.
1382
1383 This function checks whether the specified AP has finished the task assigned
1384 by StartupThisAP(), and whether timeout expires.
1385
1386 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1387 BroadcastProcedure.
1388
1389 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1390 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1391 **/
1392 EFI_STATUS
1393 IsApReady (
1394 IN SPIN_LOCK *Token
1395 );
1396
1397 /**
1398 Check whether it is an present AP.
1399
1400 @param CpuIndex The AP index which calls this function.
1401
1402 @retval TRUE It's a present AP.
1403 @retval TRUE This is not an AP or it is not present.
1404
1405 **/
1406 BOOLEAN
1407 IsPresentAp (
1408 IN UINTN CpuIndex
1409 );
1410
1411 /**
1412 Worker function to execute a caller provided function on all enabled APs.
1413
1414 @param[in] Procedure A pointer to the function to be run on
1415 enabled APs of the system.
1416 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1417 APs to return from Procedure, either for
1418 blocking or non-blocking mode.
1419 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1420 all APs.
1421 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1422 procedure in a blocking or non-blocking fashion. If it is NULL the
1423 call is blocking, and the call will not return until the AP has
1424 completed the procedure. If the token is not NULL, the call will
1425 return immediately. The caller can check whether the procedure has
1426 completed with CheckOnProcedure or WaitForProcedure.
1427 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1428 by Procedure when it completes execution on the target AP, or with
1429 EFI_TIMEOUT if the Procedure fails to complete within the optional
1430 timeout. The implementation will update this variable with
1431 EFI_NOT_READY prior to starting Procedure on the target AP.
1432
1433 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1434 the timeout expired.
1435 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1436 to all enabled APs.
1437 @retval others Failed to Startup all APs.
1438
1439 **/
1440 EFI_STATUS
1441 InternalSmmStartupAllAPs (
1442 IN EFI_AP_PROCEDURE2 Procedure,
1443 IN UINTN TimeoutInMicroseconds,
1444 IN OUT VOID *ProcedureArguments OPTIONAL,
1445 IN OUT MM_COMPLETION *Token,
1446 IN OUT EFI_STATUS *CPUStatus
1447 );
1448
1449 /**
1450
1451 Register the SMM Foundation entry point.
1452
1453 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1454 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1455 with the related definitions of
1456 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1457 If caller may pass a value of NULL to deregister any existing
1458 startup procedure.
1459 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1460 run by the AP. It is an optional common mailbox between APs and
1461 the caller to share information
1462
1463 @retval EFI_SUCCESS The Procedure has been set successfully.
1464 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1465
1466 **/
1467 EFI_STATUS
1468 RegisterStartupProcedure (
1469 IN EFI_AP_PROCEDURE Procedure,
1470 IN OUT VOID *ProcedureArguments OPTIONAL
1471 );
1472
1473 /**
1474 Allocate buffer for SpinLock and Wrapper function buffer.
1475
1476 **/
1477 VOID
1478 InitializeDataForMmMp (
1479 VOID
1480 );
1481
1482 /**
1483 Return whether access to non-SMRAM is restricted.
1484
1485 @retval TRUE Access to non-SMRAM is restricted.
1486 @retval FALSE Access to non-SMRAM is not restricted.
1487 **/
1488 BOOLEAN
1489 IsRestrictedMemoryAccess (
1490 VOID
1491 );
1492
1493 /**
1494 Choose blocking or non-blocking mode to Wait for all APs.
1495
1496 @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.
1497 @param[in] BlockingMode Blocking or non-blocking mode.
1498
1499 @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.
1500 @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.
1501
1502 **/
1503 EFI_STATUS
1504 EFIAPI
1505 SmmCpuRendezvous (
1506 IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,
1507 IN BOOLEAN BlockingMode
1508 );
1509
1510 /**
1511 Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.
1512
1513 **/
1514 VOID
1515 SmmWaitForApArrival (
1516 VOID
1517 );
1518
1519 #endif