UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

   1 /** @file
   2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
   3
   4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
   5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef _CPU_PISMMCPUDXESMM_H_
  18 #define _CPU_PISMMCPUDXESMM_H_
  19
  20 #include <PiSmm.h>
  21
  22 #include <Protocol/MpService.h>
  23 #include <Protocol/SmmConfiguration.h>
  24 #include <Protocol/SmmCpu.h>
  25 #include <Protocol/SmmAccess2.h>
  26 #include <Protocol/SmmReadyToLock.h>
  27 #include <Protocol/SmmCpuService.h>
  28 #include <Protocol/SmmMemoryAttribute.h>
  29
  30 #include <Guid/AcpiS3Context.h>
  31 #include <Guid/MemoryAttributesTable.h>
  32 #include <Guid/PiSmmMemoryAttributesTable.h>
  33
  34 #include <Library/BaseLib.h>
  35 #include <Library/IoLib.h>
  36 #include <Library/TimerLib.h>
  37 #include <Library/SynchronizationLib.h>
  38 #include <Library/DebugLib.h>
  39 #include <Library/BaseMemoryLib.h>
  40 #include <Library/PcdLib.h>
  41 #include <Library/CacheMaintenanceLib.h>
  42 #include <Library/MtrrLib.h>
  43 #include <Library/SmmCpuPlatformHookLib.h>
  44 #include <Library/SmmServicesTableLib.h>
  45 #include <Library/MemoryAllocationLib.h>
  46 #include <Library/UefiBootServicesTableLib.h>
  47 #include <Library/UefiRuntimeServicesTableLib.h>
  48 #include <Library/DebugAgentLib.h>
  49 #include <Library/UefiLib.h>
  50 #include <Library/HobLib.h>
  51 #include <Library/LocalApicLib.h>
  52 #include <Library/UefiCpuLib.h>
  53 #include <Library/CpuExceptionHandlerLib.h>
  54 #include <Library/ReportStatusCodeLib.h>
  55 #include <Library/SmmCpuFeaturesLib.h>
  56 #include <Library/PeCoffGetEntryPointLib.h>
  57
  58 #include <AcpiCpuData.h>
  59 #include <CpuHotPlugData.h>
  60
  61 #include <Register/Cpuid.h>
  62 #include <Register/Msr.h>
  63
  64 #include "CpuService.h"
  65 #include "SmmProfile.h"
  66
  67 //
  68 // MSRs required for configuration of SMM Code Access Check
  69 //
  70 #define EFI_MSR_SMM_MCA_CAP                    0x17D
  71 #define  SMM_CODE_ACCESS_CHK_BIT               BIT58
  72
  73 #define  SMM_FEATURE_CONTROL_LOCK_BIT          BIT0
  74 #define  SMM_CODE_CHK_EN_BIT                   BIT2
  75
  76 ///
  77 /// Page Table Entry
  78 ///
  79 #define IA32_PG_P                   BIT0
  80 #define IA32_PG_RW                  BIT1
  81 #define IA32_PG_U                   BIT2
  82 #define IA32_PG_WT                  BIT3
  83 #define IA32_PG_CD                  BIT4
  84 #define IA32_PG_A                   BIT5
  85 #define IA32_PG_D                   BIT6
  86 #define IA32_PG_PS                  BIT7
  87 #define IA32_PG_PAT_2M              BIT12
  88 #define IA32_PG_PAT_4K              IA32_PG_PS
  89 #define IA32_PG_PMNT                BIT62
  90 #define IA32_PG_NX                  BIT63
  91
  92 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
  93 //
  94 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
  95 // X64 PAE PDPTE does not have such restriction
  96 //
  97 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
  98
  99 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
 100
 101 #define PAGING_4K_MASK  0xFFF
 102 #define PAGING_2M_MASK  0x1FFFFF
 103 #define PAGING_1G_MASK  0x3FFFFFFF
 104
 105 #define PAGING_PAE_INDEX_MASK  0x1FF
 106
 107 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
 108 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
 109 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
 110
 111 #define SMRR_MAX_ADDRESS       BASE_4GB
 112
 113 typedef enum {
 114   PageNone,
 115   Page4K,
 116   Page2M,
 117   Page1G,
 118 } PAGE_ATTRIBUTE;
 119
 120 typedef struct {
 121   PAGE_ATTRIBUTE   Attribute;
 122   UINT64           Length;
 123   UINT64           AddressMask;
 124 } PAGE_ATTRIBUTE_TABLE;
 125
 126 //
 127 // Size of Task-State Segment defined in IA32 Manual
 128 //
 129 #define TSS_SIZE              104
 130 #define TSS_X64_IST1_OFFSET   36
 131 #define TSS_IA32_CR3_OFFSET   28
 132 #define TSS_IA32_ESP_OFFSET   56
 133
 134 #define CR0_WP                BIT16
 135
 136 //
 137 // Code select value
 138 //
 139 #define PROTECT_MODE_CODE_SEGMENT          0x08
 140 #define LONG_MODE_CODE_SEGMENT             0x38
 141
 142 //
 143 // The size 0x20 must be bigger than
 144 // the size of template code of SmmInit. Currently,
 145 // the size of SmmInit requires the 0x16 Bytes buffer
 146 // at least.
 147 //
 148 #define BACK_BUF_SIZE  0x20
 149
 150 #define EXCEPTION_VECTOR_NUMBER     0x20
 151
 152 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
 153
 154 typedef UINT32                              SMM_CPU_ARRIVAL_EXCEPTIONS;
 155 #define ARRIVAL_EXCEPTION_BLOCKED           0x1
 156 #define ARRIVAL_EXCEPTION_DELAYED           0x2
 157 #define ARRIVAL_EXCEPTION_SMI_DISABLED      0x4
 158
 159 //
 160 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
 161 // Contains the SMM Configuration Protocols that is produced.
 162 // Contains a mix of DXE and SMM contents.  All the fields must be used properly.
 163 //
 164 #define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 165
 166 typedef struct {
 167   UINTN                           Signature;
 168
 169   EFI_HANDLE                      SmmCpuHandle;
 170
 171   EFI_PROCESSOR_INFORMATION       *ProcessorInfo;
 172   SMM_CPU_OPERATION               *Operation;
 173   UINTN                           *CpuSaveStateSize;
 174   VOID                            **CpuSaveState;
 175
 176   EFI_SMM_RESERVED_SMRAM_REGION   SmmReservedSmramRegion[1];
 177   EFI_SMM_ENTRY_CONTEXT           SmmCoreEntryContext;
 178   EFI_SMM_ENTRY_POINT             SmmCoreEntry;
 179
 180   EFI_SMM_CONFIGURATION_PROTOCOL  SmmConfiguration;
 181 } SMM_CPU_PRIVATE_DATA;
 182
 183 extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
 184 extern CPU_HOT_PLUG_DATA      mCpuHotPlugData;
 185 extern UINTN                  mMaxNumberOfCpus;
 186 extern UINTN                  mNumberOfCpus;
 187 extern EFI_SMM_CPU_PROTOCOL   mSmmCpu;
 188
 189 ///
 190 /// The mode of the CPU at the time an SMI occurs
 191 ///
 192 extern UINT8  mSmmSaveStateRegisterLma;
 193
 194 //
 195 // SMM CPU Protocol function prototypes.
 196 //
 197
 198 /**
 199   Read information from the CPU save state.
 200
 201   @param  This      EFI_SMM_CPU_PROTOCOL instance
 202   @param  Width     The number of bytes to read from the CPU save state.
 203   @param  Register  Specifies the CPU register to read form the save state.
 204   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 205   @param  Buffer    Upon return, this holds the CPU register value read from the save state.
 206
 207   @retval EFI_SUCCESS   The register was read from Save State
 208   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 209   @retval EFI_INVALID_PARAMTER   This or Buffer is NULL.
 210
 211 **/
 212 EFI_STATUS
 213 EFIAPI
 214 SmmReadSaveState (
 215   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 216   IN UINTN                              Width,
 217   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 218   IN UINTN                              CpuIndex,
 219   OUT VOID                              *Buffer
 220   );
 221
 222 /**
 223   Write data to the CPU save state.
 224
 225   @param  This      EFI_SMM_CPU_PROTOCOL instance
 226   @param  Width     The number of bytes to read from the CPU save state.
 227   @param  Register  Specifies the CPU register to write to the save state.
 228   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 229   @param  Buffer    Upon entry, this holds the new CPU register value.
 230
 231   @retval EFI_SUCCESS   The register was written from Save State
 232   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 233   @retval EFI_INVALID_PARAMTER   ProcessorIndex or Width is not correct
 234
 235 **/
 236 EFI_STATUS
 237 EFIAPI
 238 SmmWriteSaveState (
 239   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 240   IN UINTN                              Width,
 241   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 242   IN UINTN                              CpuIndex,
 243   IN CONST VOID                         *Buffer
 244   );
 245
 246 /**
 247 Read a CPU Save State register on the target processor.
 248
 249 This function abstracts the differences that whether the CPU Save State register is in the
 250 IA32 CPU Save State Map or X64 CPU Save State Map.
 251
 252 This function supports reading a CPU Save State register in SMBase relocation handler.
 253
 254 @param[in]  CpuIndex       Specifies the zero-based index of the CPU save state.
 255 @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 256 @param[in]  Width          The number of bytes to read from the CPU save state.
 257 @param[out] Buffer         Upon return, this holds the CPU register value read from the save state.
 258
 259 @retval EFI_SUCCESS           The register was read from Save State.
 260 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 261 @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 262
 263 **/
 264 EFI_STATUS
 265 EFIAPI
 266 ReadSaveStateRegister (
 267   IN UINTN                        CpuIndex,
 268   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 269   IN UINTN                        Width,
 270   OUT VOID                        *Buffer
 271   );
 272
 273 /**
 274 Write value to a CPU Save State register on the target processor.
 275
 276 This function abstracts the differences that whether the CPU Save State register is in the
 277 IA32 CPU Save State Map or X64 CPU Save State Map.
 278
 279 This function supports writing a CPU Save State register in SMBase relocation handler.
 280
 281 @param[in] CpuIndex       Specifies the zero-based index of the CPU save state.
 282 @param[in] RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 283 @param[in] Width          The number of bytes to read from the CPU save state.
 284 @param[in] Buffer         Upon entry, this holds the new CPU register value.
 285
 286 @retval EFI_SUCCESS           The register was written to Save State.
 287 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 288 @retval EFI_INVALID_PARAMTER  ProcessorIndex or Width is not correct.
 289
 290 **/
 291 EFI_STATUS
 292 EFIAPI
 293 WriteSaveStateRegister (
 294   IN UINTN                        CpuIndex,
 295   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 296   IN UINTN                        Width,
 297   IN CONST VOID                   *Buffer
 298   );
 299
 300 extern CONST UINT8                  gcSmmInitTemplate[];
 301 extern CONST UINT16                 gcSmmInitSize;
 302 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr0;
 303 extern UINT32                       mSmmCr0;
 304 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr3;
 305 extern UINT32                       mSmmCr4;
 306 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr4;
 307 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmInitStack;
 308
 309 /**
 310   Semaphore operation for all processor relocate SMMBase.
 311 **/
 312 VOID
 313 EFIAPI
 314 SmmRelocationSemaphoreComplete (
 315   VOID
 316   );
 317
 318 ///
 319 /// The type of SMM CPU Information
 320 ///
 321 typedef struct {
 322   SPIN_LOCK                         *Busy;
 323   volatile EFI_AP_PROCEDURE         Procedure;
 324   volatile VOID                     *Parameter;
 325   volatile UINT32                   *Run;
 326   volatile BOOLEAN                  *Present;
 327 } SMM_CPU_DATA_BLOCK;
 328
 329 typedef enum {
 330   SmmCpuSyncModeTradition,
 331   SmmCpuSyncModeRelaxedAp,
 332   SmmCpuSyncModeMax
 333 } SMM_CPU_SYNC_MODE;
 334
 335 typedef struct {
 336   //
 337   // Pointer to an array. The array should be located immediately after this structure
 338   // so that UC cache-ability can be set together.
 339   //
 340   SMM_CPU_DATA_BLOCK            *CpuData;
 341   volatile UINT32               *Counter;
 342   volatile UINT32               BspIndex;
 343   volatile BOOLEAN              *InsideSmm;
 344   volatile BOOLEAN              *AllCpusInSync;
 345   volatile SMM_CPU_SYNC_MODE    EffectiveSyncMode;
 346   volatile BOOLEAN              SwitchBsp;
 347   volatile BOOLEAN              *CandidateBsp;
 348 } SMM_DISPATCHER_MP_SYNC_DATA;
 349
 350 #define MSR_SPIN_LOCK_INIT_NUM 15
 351
 352 typedef struct {
 353   SPIN_LOCK    *SpinLock;
 354   UINT32       MsrIndex;
 355 } MP_MSR_LOCK;
 356
 357 #define SMM_PSD_OFFSET              0xfb00
 358
 359 ///
 360 /// All global semaphores' pointer
 361 ///
 362 typedef struct {
 363   volatile UINT32      *Counter;
 364   volatile BOOLEAN     *InsideSmm;
 365   volatile BOOLEAN     *AllCpusInSync;
 366   SPIN_LOCK            *PFLock;
 367   SPIN_LOCK            *CodeAccessCheckLock;
 368   SPIN_LOCK            *MemoryMappedLock;
 369 } SMM_CPU_SEMAPHORE_GLOBAL;
 370
 371 ///
 372 /// All semaphores for each processor
 373 ///
 374 typedef struct {
 375   SPIN_LOCK                         *Busy;
 376   volatile UINT32                   *Run;
 377   volatile BOOLEAN                  *Present;
 378 } SMM_CPU_SEMAPHORE_CPU;
 379
 380 ///
 381 /// All MSRs semaphores' pointer and counter
 382 ///
 383 typedef struct {
 384   SPIN_LOCK            *Msr;
 385   UINTN                AvailableCounter;
 386 } SMM_CPU_SEMAPHORE_MSR;
 387
 388 ///
 389 /// All semaphores' information
 390 ///
 391 typedef struct {
 392   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;
 393   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;
 394   SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;
 395 } SMM_CPU_SEMAPHORES;
 396
 397 extern IA32_DESCRIPTOR                     gcSmiGdtr;
 398 extern EFI_PHYSICAL_ADDRESS                mGdtBuffer;
 399 extern UINTN                               mGdtBufferSize;
 400 extern IA32_DESCRIPTOR                     gcSmiIdtr;
 401 extern VOID                                *gcSmiIdtrPtr;
 402 extern UINT64                              gPhyMask;
 403 extern SMM_DISPATCHER_MP_SYNC_DATA         *mSmmMpSyncData;
 404 extern UINTN                               mSmmStackArrayBase;
 405 extern UINTN                               mSmmStackArrayEnd;
 406 extern UINTN                               mSmmStackSize;
 407 extern EFI_SMM_CPU_SERVICE_PROTOCOL        mSmmCpuService;
 408 extern IA32_DESCRIPTOR                     gcSmiInitGdtr;
 409 extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 410 extern UINTN                               mSemaphoreSize;
 411 extern SPIN_LOCK                           *mPFLock;
 412 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;
 413 extern SPIN_LOCK                           *mMemoryMappedLock;
 414 extern EFI_SMRAM_DESCRIPTOR                *mSmmCpuSmramRanges;
 415 extern UINTN                               mSmmCpuSmramRangeCount;
 416 extern UINT8                               mPhysicalAddressBits;
 417
 418 //
 419 // Copy of the PcdPteMemoryEncryptionAddressOrMask
 420 //
 421 extern UINT64  mAddressEncMask;
 422
 423 /**
 424   Create 4G PageTable in SMRAM.
 425
 426   @param[in]      Is32BitPageTable Whether the page table is 32-bit PAE
 427   @return         PageTable Address
 428
 429 **/
 430 UINT32
 431 Gen4GPageTable (
 432   IN      BOOLEAN                   Is32BitPageTable
 433   );
 434
 435
 436 /**
 437   Initialize global data for MP synchronization.
 438
 439   @param Stacks       Base address of SMI stack buffer for all processors.
 440   @param StackSize    Stack size for each processor in SMM.
 441
 442 **/
 443 UINT32
 444 InitializeMpServiceData (
 445   IN VOID        *Stacks,
 446   IN UINTN       StackSize
 447   );
 448
 449 /**
 450   Initialize Timer for SMM AP Sync.
 451
 452 **/
 453 VOID
 454 InitializeSmmTimer (
 455   VOID
 456   );
 457
 458 /**
 459   Start Timer for SMM AP Sync.
 460
 461 **/
 462 UINT64
 463 EFIAPI
 464 StartSyncTimer (
 465   VOID
 466   );
 467
 468 /**
 469   Check if the SMM AP Sync timer is timeout.
 470
 471   @param Timer  The start timer from the begin.
 472
 473 **/
 474 BOOLEAN
 475 EFIAPI
 476 IsSyncTimerTimeout (
 477   IN      UINT64                    Timer
 478   );
 479
 480 /**
 481   Initialize IDT for SMM Stack Guard.
 482
 483 **/
 484 VOID
 485 EFIAPI
 486 InitializeIDTSmmStackGuard (
 487   VOID
 488   );
 489
 490 /**
 491   Initialize Gdt for all processors.
 492
 493   @param[in]   Cr3          CR3 value.
 494   @param[out]  GdtStepSize  The step size for GDT table.
 495
 496   @return GdtBase for processor 0.
 497           GdtBase for processor X is: GdtBase + (GdtStepSize * X)
 498 **/
 499 VOID *
 500 InitGdt (
 501   IN  UINTN  Cr3,
 502   OUT UINTN  *GdtStepSize
 503   );
 504
 505 /**
 506
 507   Register the SMM Foundation entry point.
 508
 509   @param          This              Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
 510   @param          SmmEntryPoint     SMM Foundation EntryPoint
 511
 512   @retval         EFI_SUCCESS       Successfully to register SMM foundation entry point
 513
 514 **/
 515 EFI_STATUS
 516 EFIAPI
 517 RegisterSmmEntry (
 518   IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
 519   IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
 520   );
 521
 522 /**
 523   Create PageTable for SMM use.
 524
 525   @return     PageTable Address
 526
 527 **/
 528 UINT32
 529 SmmInitPageTable (
 530   VOID
 531   );
 532
 533 /**
 534   Schedule a procedure to run on the specified CPU.
 535
 536   @param   Procedure        The address of the procedure to run
 537   @param   CpuIndex         Target CPU number
 538   @param   ProcArguments    The parameter to pass to the procedure
 539
 540   @retval   EFI_INVALID_PARAMETER    CpuNumber not valid
 541   @retval   EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 542   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 543   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 544   @retval   EFI_SUCCESS - The procedure has been successfully scheduled
 545
 546 **/
 547 EFI_STATUS
 548 EFIAPI
 549 SmmStartupThisAp (
 550   IN      EFI_AP_PROCEDURE          Procedure,
 551   IN      UINTN                     CpuIndex,
 552   IN OUT  VOID                      *ProcArguments OPTIONAL
 553   );
 554
 555 /**
 556   Schedule a procedure to run on the specified CPU in a blocking fashion.
 557
 558   @param  Procedure                The address of the procedure to run
 559   @param  CpuIndex                 Target CPU Index
 560   @param  ProcArguments            The parameter to pass to the procedure
 561
 562   @retval EFI_INVALID_PARAMETER    CpuNumber not valid
 563   @retval EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 564   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 565   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 566   @retval EFI_SUCCESS              The procedure has been successfully scheduled
 567
 568 **/
 569 EFI_STATUS
 570 EFIAPI
 571 SmmBlockingStartupThisAp (
 572   IN      EFI_AP_PROCEDURE          Procedure,
 573   IN      UINTN                     CpuIndex,
 574   IN OUT  VOID                      *ProcArguments OPTIONAL
 575   );
 576
 577 /**
 578   This function sets the attributes for the memory region specified by BaseAddress and
 579   Length from their current attributes to the attributes specified by Attributes.
 580
 581   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 582   @param[in]  Length           The size in bytes of the memory region.
 583   @param[in]  Attributes       The bit mask of attributes to set for the memory region.
 584
 585   @retval EFI_SUCCESS           The attributes were set for the memory region.
 586   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 587                                 BaseAddress and Length cannot be modified.
 588   @retval EFI_INVALID_PARAMETER Length is zero.
 589                                 Attributes specified an illegal combination of attributes that
 590                                 cannot be set together.
 591   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 592                                 the memory resource range.
 593   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 594                                 resource range specified by BaseAddress and Length.
 595                                 The bit mask of attributes is not support for the memory resource
 596                                 range specified by BaseAddress and Length.
 597
 598 **/
 599 EFI_STATUS
 600 EFIAPI
 601 SmmSetMemoryAttributes (
 602   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 603   IN  UINT64                                     Length,
 604   IN  UINT64                                     Attributes
 605   );
 606
 607 /**
 608   This function clears the attributes for the memory region specified by BaseAddress and
 609   Length from their current attributes to the attributes specified by Attributes.
 610
 611   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 612   @param[in]  Length           The size in bytes of the memory region.
 613   @param[in]  Attributes       The bit mask of attributes to clear for the memory region.
 614
 615   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 616   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 617                                 BaseAddress and Length cannot be modified.
 618   @retval EFI_INVALID_PARAMETER Length is zero.
 619                                 Attributes specified an illegal combination of attributes that
 620                                 cannot be set together.
 621   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 622                                 the memory resource range.
 623   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 624                                 resource range specified by BaseAddress and Length.
 625                                 The bit mask of attributes is not support for the memory resource
 626                                 range specified by BaseAddress and Length.
 627
 628 **/
 629 EFI_STATUS
 630 EFIAPI
 631 SmmClearMemoryAttributes (
 632   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 633   IN  UINT64                                     Length,
 634   IN  UINT64                                     Attributes
 635   );
 636
 637 /**
 638   Initialize MP synchronization data.
 639
 640 **/
 641 VOID
 642 EFIAPI
 643 InitializeMpSyncData (
 644   VOID
 645   );
 646
 647 /**
 648
 649   Find out SMRAM information including SMRR base and SMRR size.
 650
 651   @param          SmrrBase          SMRR base
 652   @param          SmrrSize          SMRR size
 653
 654 **/
 655 VOID
 656 FindSmramInfo (
 657   OUT UINT32   *SmrrBase,
 658   OUT UINT32   *SmrrSize
 659   );
 660
 661 /**
 662   Relocate SmmBases for each processor.
 663
 664   Execute on first boot and all S3 resumes
 665
 666 **/
 667 VOID
 668 EFIAPI
 669 SmmRelocateBases (
 670   VOID
 671   );
 672
 673 /**
 674   Page Fault handler for SMM use.
 675
 676   @param  InterruptType    Defines the type of interrupt or exception that
 677                            occurred on the processor.This parameter is processor architecture specific.
 678   @param  SystemContext    A pointer to the processor context when
 679                            the interrupt occurred on the processor.
 680 **/
 681 VOID
 682 EFIAPI
 683 SmiPFHandler (
 684   IN EFI_EXCEPTION_TYPE   InterruptType,
 685   IN EFI_SYSTEM_CONTEXT   SystemContext
 686   );
 687
 688 /**
 689   Perform the remaining tasks.
 690
 691 **/
 692 VOID
 693 PerformRemainingTasks (
 694   VOID
 695   );
 696
 697 /**
 698   Perform the pre tasks.
 699
 700 **/
 701 VOID
 702 PerformPreTasks (
 703   VOID
 704   );
 705
 706 /**
 707   Initialize MSR spin lock by MSR index.
 708
 709   @param  MsrIndex       MSR index value.
 710
 711 **/
 712 VOID
 713 InitMsrSpinLockByIndex (
 714   IN UINT32      MsrIndex
 715   );
 716
 717 /**
 718   Hook return address of SMM Save State so that semaphore code
 719   can be executed immediately after AP exits SMM to indicate to
 720   the BSP that an AP has exited SMM after SMBASE relocation.
 721
 722   @param[in] CpuIndex     The processor index.
 723   @param[in] RebasedFlag  A pointer to a flag that is set to TRUE
 724                           immediately after AP exits SMM.
 725
 726 **/
 727 VOID
 728 SemaphoreHook (
 729   IN UINTN             CpuIndex,
 730   IN volatile BOOLEAN  *RebasedFlag
 731   );
 732
 733 /**
 734 Configure SMM Code Access Check feature for all processors.
 735 SMM Feature Control MSR will be locked after configuration.
 736 **/
 737 VOID
 738 ConfigSmmCodeAccessCheck (
 739   VOID
 740   );
 741
 742 /**
 743   Hook the code executed immediately after an RSM instruction on the currently
 744   executing CPU.  The mode of code executed immediately after RSM must be
 745   detected, and the appropriate hook must be selected.  Always clear the auto
 746   HALT restart flag if it is set.
 747
 748   @param[in] CpuIndex                 The processor index for the currently
 749                                       executing CPU.
 750   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 751                                       currently executing CPU.
 752   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 753                                       32-bit mode from 64-bit SMM.
 754   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 755                                       same mode as SMM.
 756
 757   @retval The value of the original instruction pointer before it was hooked.
 758
 759 **/
 760 UINT64
 761 EFIAPI
 762 HookReturnFromSmm (
 763   IN UINTN              CpuIndex,
 764   SMRAM_SAVE_STATE_MAP  *CpuState,
 765   UINT64                NewInstructionPointer32,
 766   UINT64                NewInstructionPointer
 767   );
 768
 769 /**
 770   Get the size of the SMI Handler in bytes.
 771
 772   @retval The size, in bytes, of the SMI Handler.
 773
 774 **/
 775 UINTN
 776 EFIAPI
 777 GetSmiHandlerSize (
 778   VOID
 779   );
 780
 781 /**
 782   Install the SMI handler for the CPU specified by CpuIndex.  This function
 783   is called by the CPU that was elected as monarch during System Management
 784   Mode initialization.
 785
 786   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 787                         The value must be between 0 and the NumberOfCpus field
 788                         in the System Management System Table (SMST).
 789   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 790   @param[in] SmiStack   The stack to use when an SMI is processed by the
 791                         the CPU specified by CpuIndex.
 792   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 793                         processed by the CPU specified by CpuIndex.
 794   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 795                         processed by the CPU specified by CpuIndex.
 796   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 797                         processed by the CPU specified by CpuIndex.
 798   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 799                         processed by the CPU specified by CpuIndex.
 800   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 801                         processed by the CPU specified by CpuIndex.
 802   @param[in] Cr3        The base address of the page tables to use when an SMI
 803                         is processed by the CPU specified by CpuIndex.
 804 **/
 805 VOID
 806 EFIAPI
 807 InstallSmiHandler (
 808   IN UINTN   CpuIndex,
 809   IN UINT32  SmBase,
 810   IN VOID    *SmiStack,
 811   IN UINTN   StackSize,
 812   IN UINTN   GdtBase,
 813   IN UINTN   GdtSize,
 814   IN UINTN   IdtBase,
 815   IN UINTN   IdtSize,
 816   IN UINT32  Cr3
 817   );
 818
 819 /**
 820   Search module name by input IP address and output it.
 821
 822   @param CallerIpAddress   Caller instruction pointer.
 823
 824 **/
 825 VOID
 826 DumpModuleInfoByIp (
 827   IN  UINTN              CallerIpAddress
 828   );
 829
 830 /**
 831   This function sets memory attribute according to MemoryAttributesTable.
 832 **/
 833 VOID
 834 SetMemMapAttributes (
 835   VOID
 836   );
 837
 838 /**
 839   This function sets UEFI memory attribute according to UEFI memory map.
 840 **/
 841 VOID
 842 SetUefiMemMapAttributes (
 843   VOID
 844   );
 845
 846 /**
 847   Return if the Address is forbidden as SMM communication buffer.
 848
 849   @param[in] Address the address to be checked
 850
 851   @return TRUE  The address is forbidden as SMM communication buffer.
 852   @return FALSE The address is allowed as SMM communication buffer.
 853 **/
 854 BOOLEAN
 855 IsSmmCommBufferForbiddenAddress (
 856   IN UINT64  Address
 857   );
 858
 859 /**
 860   This function caches the UEFI memory map information.
 861 **/
 862 VOID
 863 GetUefiMemoryMap (
 864   VOID
 865   );
 866
 867 /**
 868   This function sets memory attribute for page table.
 869 **/
 870 VOID
 871 SetPageTableAttributes (
 872   VOID
 873   );
 874
 875 /**
 876   Return page table base.
 877
 878   @return page table base.
 879 **/
 880 UINTN
 881 GetPageTableBase (
 882   VOID
 883   );
 884
 885 /**
 886   This function sets the attributes for the memory region specified by BaseAddress and
 887   Length from their current attributes to the attributes specified by Attributes.
 888
 889   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 890   @param[in]   Length           The size in bytes of the memory region.
 891   @param[in]   Attributes       The bit mask of attributes to set for the memory region.
 892   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 893
 894   @retval EFI_SUCCESS           The attributes were set for the memory region.
 895   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 896                                 BaseAddress and Length cannot be modified.
 897   @retval EFI_INVALID_PARAMETER Length is zero.
 898                                 Attributes specified an illegal combination of attributes that
 899                                 cannot be set together.
 900   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 901                                 the memory resource range.
 902   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 903                                 resource range specified by BaseAddress and Length.
 904                                 The bit mask of attributes is not support for the memory resource
 905                                 range specified by BaseAddress and Length.
 906
 907 **/
 908 EFI_STATUS
 909 EFIAPI
 910 SmmSetMemoryAttributesEx (
 911   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 912   IN  UINT64                                     Length,
 913   IN  UINT64                                     Attributes,
 914   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 915   );
 916
 917 /**
 918   This function clears the attributes for the memory region specified by BaseAddress and
 919   Length from their current attributes to the attributes specified by Attributes.
 920
 921   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 922   @param[in]   Length           The size in bytes of the memory region.
 923   @param[in]   Attributes       The bit mask of attributes to clear for the memory region.
 924   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 925
 926   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 927   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 928                                 BaseAddress and Length cannot be modified.
 929   @retval EFI_INVALID_PARAMETER Length is zero.
 930                                 Attributes specified an illegal combination of attributes that
 931                                 cannot be set together.
 932   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 933                                 the memory resource range.
 934   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 935                                 resource range specified by BaseAddress and Length.
 936                                 The bit mask of attributes is not support for the memory resource
 937                                 range specified by BaseAddress and Length.
 938
 939 **/
 940 EFI_STATUS
 941 EFIAPI
 942 SmmClearMemoryAttributesEx (
 943   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 944   IN  UINT64                                     Length,
 945   IN  UINT64                                     Attributes,
 946   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 947   );
 948
 949 /**
 950   This API provides a way to allocate memory for page table.
 951
 952   This API can be called more once to allocate memory for page tables.
 953
 954   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 955   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 956   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 957   returned.
 958
 959   @param  Pages                 The number of 4 KB pages to allocate.
 960
 961   @return A pointer to the allocated buffer or NULL if allocation fails.
 962
 963 **/
 964 VOID *
 965 AllocatePageTableMemory (
 966   IN UINTN           Pages
 967   );
 968
 969 /**
 970   Allocate pages for code.
 971
 972   @param[in]  Pages Number of pages to be allocated.
 973
 974   @return Allocated memory.
 975 **/
 976 VOID *
 977 AllocateCodePages (
 978   IN UINTN           Pages
 979   );
 980
 981 /**
 982   Allocate aligned pages for code.
 983
 984   @param[in]  Pages                 Number of pages to be allocated.
 985   @param[in]  Alignment             The requested alignment of the allocation.
 986                                     Must be a power of two.
 987                                     If Alignment is zero, then byte alignment is used.
 988
 989   @return Allocated memory.
 990 **/
 991 VOID *
 992 AllocateAlignedCodePages (
 993   IN UINTN            Pages,
 994   IN UINTN            Alignment
 995   );
 996
 997
 998 //
 999 // S3 related global variable and function prototype.
1000 //
1001
1002 extern BOOLEAN                mSmmS3Flag;
1003
1004 /**
1005   Initialize SMM S3 resume state structure used during S3 Resume.
1006
1007   @param[in] Cr3    The base address of the page tables to use in SMM.
1008
1009 **/
1010 VOID
1011 InitSmmS3ResumeState (
1012   IN UINT32  Cr3
1013   );
1014
1015 /**
1016   Get ACPI CPU data.
1017
1018 **/
1019 VOID
1020 GetAcpiCpuData (
1021   VOID
1022   );
1023
1024 /**
1025   Restore SMM Configuration in S3 boot path.
1026
1027 **/
1028 VOID
1029 RestoreSmmConfigurationInS3 (
1030   VOID
1031   );
1032
1033 /**
1034   Get ACPI S3 enable flag.
1035
1036 **/
1037 VOID
1038 GetAcpiS3EnableFlag (
1039   VOID
1040   );
1041
1042 /**
1043   Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1044
1045   @param[in] ApHltLoopCode          The address of the safe hlt-loop function.
1046   @param[in] TopOfStack             A pointer to the new stack to use for the ApHltLoopCode.
1047   @param[in] NumberToFinishAddress  Address of Semaphore of APs finish count.
1048
1049 **/
1050 VOID
1051 TransferApToSafeState (
1052   IN UINTN  ApHltLoopCode,
1053   IN UINTN  TopOfStack,
1054   IN UINTN  NumberToFinishAddress
1055   );
1056
1057 /**
1058   This function set given attributes of the memory region specified by
1059   BaseAddress and Length.
1060
1061   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1062   @param  BaseAddress       The physical address that is the start address of
1063                             a memory region.
1064   @param  Length            The size in bytes of the memory region.
1065   @param  Attributes        The bit mask of attributes to set for the memory
1066                             region.
1067
1068   @retval EFI_SUCCESS           The attributes were set for the memory region.
1069   @retval EFI_INVALID_PARAMETER Length is zero.
1070                                 Attributes specified an illegal combination of
1071                                 attributes that cannot be set together.
1072   @retval EFI_UNSUPPORTED       The processor does not support one or more
1073                                 bytes of the memory resource range specified
1074                                 by BaseAddress and Length.
1075                                 The bit mask of attributes is not supported for
1076                                 the memory resource range specified by
1077                                 BaseAddress and Length.
1078
1079 **/
1080 EFI_STATUS
1081 EFIAPI
1082 EdkiiSmmSetMemoryAttributes (
1083   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1084   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1085   IN  UINT64                                Length,
1086   IN  UINT64                                Attributes
1087   );
1088
1089 /**
1090   This function clears given attributes of the memory region specified by
1091   BaseAddress and Length.
1092
1093   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1094   @param  BaseAddress       The physical address that is the start address of
1095                             a memory region.
1096   @param  Length            The size in bytes of the memory region.
1097   @param  Attributes        The bit mask of attributes to clear for the memory
1098                             region.
1099
1100   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
1101   @retval EFI_INVALID_PARAMETER Length is zero.
1102                                 Attributes specified an illegal combination of
1103                                 attributes that cannot be cleared together.
1104   @retval EFI_UNSUPPORTED       The processor does not support one or more
1105                                 bytes of the memory resource range specified
1106                                 by BaseAddress and Length.
1107                                 The bit mask of attributes is not supported for
1108                                 the memory resource range specified by
1109                                 BaseAddress and Length.
1110
1111 **/
1112 EFI_STATUS
1113 EFIAPI
1114 EdkiiSmmClearMemoryAttributes (
1115   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1116   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1117   IN  UINT64                                Length,
1118   IN  UINT64                                Attributes
1119   );
1120
1121 /**
1122   This function retrieves the attributes of the memory region specified by
1123   BaseAddress and Length. If different attributes are got from different part
1124   of the memory region, EFI_NO_MAPPING will be returned.
1125
1126   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1127   @param  BaseAddress       The physical address that is the start address of
1128                             a memory region.
1129   @param  Length            The size in bytes of the memory region.
1130   @param  Attributes        Pointer to attributes returned.
1131
1132   @retval EFI_SUCCESS           The attributes got for the memory region.
1133   @retval EFI_INVALID_PARAMETER Length is zero.
1134                                 Attributes is NULL.
1135   @retval EFI_NO_MAPPING        Attributes are not consistent cross the memory
1136                                 region.
1137   @retval EFI_UNSUPPORTED       The processor does not support one or more
1138                                 bytes of the memory resource range specified
1139                                 by BaseAddress and Length.
1140
1141 **/
1142 EFI_STATUS
1143 EFIAPI
1144 EdkiiSmmGetMemoryAttributes (
1145   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1146   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1147   IN  UINT64                                Length,
1148   IN  UINT64                                *Attributes
1149   );
1150
1151 /**
1152   This function fixes up the address of the global variable or function
1153   referred in SmmInit assembly files to be the absoute address.
1154 **/
1155 VOID
1156 EFIAPI
1157 PiSmmCpuSmmInitFixupAddress (
1158  );
1159
1160 /**
1161   This function fixes up the address of the global variable or function
1162   referred in SmiEntry assembly files to be the absoute address.
1163 **/
1164 VOID
1165 EFIAPI
1166 PiSmmCpuSmiEntryFixupAddress (
1167  );
1168
1169 #endif