UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h

   1 /** @file
   2 SMM profile internal header file.
   3
   4 Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _SMM_PROFILE_INTERNAL_H_
  16 #define _SMM_PROFILE_INTERNAL_H_
  17
  18 #include <Guid/GlobalVariable.h>
  19 #include <Guid/Acpi.h>
  20 #include <Protocol/SmmReadyToLock.h>
  21 #include <Library/UefiRuntimeServicesTableLib.h>
  22 #include <Library/DxeServicesTableLib.h>
  23 #include <Library/CpuLib.h>
  24 #include <IndustryStandard/Acpi.h>
  25
  26 #include "SmmProfileArch.h"
  27
  28 //
  29 // Configure the SMM_PROFILE DTS region size
  30 //
  31 #define SMM_PROFILE_DTS_SIZE       (4 * 1024 * 1024) // 4M
  32
  33 #define MAX_PF_PAGE_COUNT           0x2
  34
  35 #define PEBS_RECORD_NUMBER          0x2
  36
  37 #define MAX_PF_ENTRY_COUNT          10
  38
  39 //
  40 // This MACRO just enable unit test for the profile
  41 // Please disable it.
  42 //
  43
  44 #define IA32_PF_EC_P                (1u << 0)
  45 #define IA32_PF_EC_WR               (1u << 1)
  46 #define IA32_PF_EC_US               (1u << 2)
  47 #define IA32_PF_EC_RSVD             (1u << 3)
  48 #define IA32_PF_EC_ID               (1u << 4)
  49
  50 #define SMM_PROFILE_NAME            L"SmmProfileData"
  51
  52 //
  53 // CPU generic definition
  54 //
  55 #define   CPUID1_EDX_XD_SUPPORT      0x100000
  56 #define   MSR_EFER                   0xc0000080
  57 #define   MSR_EFER_XD                0x800
  58
  59 #define   CPUID1_EDX_BTS_AVAILABLE   0x200000
  60
  61 #define   DR6_SINGLE_STEP            0x4000
  62 #define   RFLAG_TF                   0x100
  63
  64 #define MSR_DEBUG_CTL                0x1D9
  65 #define   MSR_DEBUG_CTL_LBR          0x1
  66 #define   MSR_DEBUG_CTL_TR           0x40
  67 #define   MSR_DEBUG_CTL_BTS          0x80
  68 #define   MSR_DEBUG_CTL_BTINT        0x100
  69 #define MSR_DS_AREA                  0x600
  70
  71 typedef struct {
  72   EFI_PHYSICAL_ADDRESS   Base;
  73   EFI_PHYSICAL_ADDRESS   Top;
  74 } MEMORY_RANGE;
  75
  76 typedef struct {
  77   MEMORY_RANGE   Range;
  78   BOOLEAN        Present;
  79   BOOLEAN        Nx;
  80 } MEMORY_PROTECTION_RANGE;
  81
  82 typedef struct {
  83   UINT64  HeaderSize;
  84   UINT64  MaxDataEntries;
  85   UINT64  MaxDataSize;
  86   UINT64  CurDataEntries;
  87   UINT64  CurDataSize;
  88   UINT64  TsegStart;
  89   UINT64  TsegSize;
  90   UINT64  NumSmis;
  91   UINT64  NumCpus;
  92 } SMM_PROFILE_HEADER;
  93
  94 typedef struct {
  95   UINT64  SmiNum;
  96   UINT64  CpuNum;
  97   UINT64  ApicId;
  98   UINT64  ErrorCode;
  99   UINT64  Instruction;
 100   UINT64  Address;
 101   UINT64  SmiCmd;
 102 } SMM_PROFILE_ENTRY;
 103
 104 extern SMM_S3_RESUME_STATE       *mSmmS3ResumeState;
 105 extern UINTN                     gSmiExceptionHandlers[];
 106 extern BOOLEAN                   mXdSupported;
 107 extern UINTN                     *mPFEntryCount;
 108 extern UINT64                    (*mLastPFEntryValue)[MAX_PF_ENTRY_COUNT];
 109 extern UINT64                    *(*mLastPFEntryPointer)[MAX_PF_ENTRY_COUNT];
 110
 111 //
 112 // Internal functions
 113 //
 114
 115 /**
 116   Update IDT table to replace page fault handler and INT 1 handler.
 117
 118 **/
 119 VOID
 120 InitIdtr (
 121   VOID
 122   );
 123
 124 /**
 125   Check if the memory address will be mapped by 4KB-page.
 126
 127   @param  Address  The address of Memory.
 128
 129 **/
 130 BOOLEAN
 131 IsAddressSplit (
 132   IN EFI_PHYSICAL_ADDRESS   Address
 133   );
 134
 135 /**
 136   Check if the memory address will be mapped by 4KB-page.
 137
 138   @param  Address  The address of Memory.
 139   @param  Nx       The flag indicates if the memory is execute-disable.
 140
 141 **/
 142 BOOLEAN
 143 IsAddressValid (
 144   IN EFI_PHYSICAL_ADDRESS   Address,
 145   IN BOOLEAN                *Nx
 146   );
 147
 148 /**
 149   Page Fault handler for SMM use.
 150
 151 **/
 152 VOID
 153 SmiDefaultPFHandler (
 154   VOID
 155   );
 156
 157 /**
 158   Clear TF in FLAGS.
 159
 160   @param  SystemContext    A pointer to the processor context when
 161                            the interrupt occurred on the processor.
 162
 163 **/
 164 VOID
 165 ClearTrapFlag (
 166   IN OUT EFI_SYSTEM_CONTEXT   SystemContext
 167   );
 168
 169 #endif // _SMM_PROFILE_H_