UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm

   1 ;------------------------------------------------------------------------------ ;
   2 ; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
   3 ; This program and the accompanying materials
   4 ; are licensed and made available under the terms and conditions of the BSD License
   5 ; which accompanies this distribution.  The full text of the license may be found at
   6 ; http://opensource.org/licenses/bsd-license.php.
   7 ;
   8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  10 ;
  11 ; Module Name:
  12 ;
  13 ;   SmiEntry.asm
  14 ;
  15 ; Abstract:
  16 ;
  17 ;   Code template of the SMI handler for a particular processor
  18 ;
  19 ;-------------------------------------------------------------------------------
  20
  21 ;
  22 ; Variables referenced by C code
  23 ;
  24 EXTERNDEF   SmiRendezvous:PROC
  25 EXTERNDEF   gcSmiHandlerTemplate:BYTE
  26 EXTERNDEF   gcSmiHandlerSize:WORD
  27 EXTERNDEF   gSmiCr3:DWORD
  28 EXTERNDEF   gSmiStack:DWORD
  29 EXTERNDEF   gSmbase:DWORD
  30 EXTERNDEF   FeaturePcdGet (PcdCpuSmmDebug):BYTE
  31 EXTERNDEF   gSmiHandlerIdtr:FWORD
  32
  33
  34 ;
  35 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
  36 ;
  37 DSC_OFFSET    EQU     0fb00h
  38 DSC_GDTPTR    EQU     30h
  39 DSC_GDTSIZ    EQU     38h
  40 DSC_CS        EQU     14
  41 DSC_DS        EQU     16
  42 DSC_SS        EQU     18
  43 DSC_OTHERSEG  EQU     20
  44 ;
  45 ; Constants relating to CPU State Save Area
  46 ;
  47 SSM_DR6         EQU     0ffd0h
  48 SSM_DR7         EQU     0ffc8h
  49
  50 PROTECT_MODE_CS EQU     08h
  51 PROTECT_MODE_DS EQU     20h
  52 LONG_MODE_CS    EQU     38h
  53 TSS_SEGMENT     EQU     40h
  54 GDT_SIZE        EQU     50h
  55
  56     .code
  57
  58 gcSmiHandlerTemplate    LABEL   BYTE
  59
  60 _SmiEntryPoint:
  61     ;
  62     ; The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-
  63     ; bit addressing mode. And that coincidence has been used in the following
  64     ; "64-bit like" 16-bit code. Be aware that once RDI is referenced as a
  65     ; base address register, it is actually BX that is referenced.
  66     ;
  67     DB      0bbh                        ; mov bx, imm16
  68     DW      offset _GdtDesc - _SmiEntryPoint + 8000h  ; bx = GdtDesc offset
  69 ; fix GDT descriptor
  70     DB      2eh, 0a1h                   ; mov ax, cs:[offset16]
  71     DW      DSC_OFFSET + DSC_GDTSIZ
  72     DB      48h                         ; dec ax
  73     DB      2eh
  74     mov     [rdi], eax                  ; mov cs:[bx], ax
  75     DB      66h, 2eh, 0a1h              ; mov eax, cs:[offset16]
  76     DW      DSC_OFFSET + DSC_GDTPTR
  77     DB      2eh
  78     mov     [rdi + 2], ax               ; mov cs:[bx + 2], eax
  79     DB      66h, 2eh
  80     lgdt    fword ptr [rdi]             ; lgdt fword ptr cs:[bx]
  81 ; Patch ProtectedMode Segment
  82     DB      0b8h                        ; mov ax, imm16
  83     DW      PROTECT_MODE_CS             ; set AX for segment directly
  84     DB      2eh
  85     mov     [rdi - 2], eax              ; mov cs:[bx - 2], ax
  86 ; Patch ProtectedMode entry
  87     DB      66h, 0bfh                   ; mov edi, SMBASE
  88 gSmbase    DD    ?
  89     lea     ax, [edi + (@ProtectedMode - _SmiEntryPoint) + 8000h]
  90     DB      2eh
  91     mov     [rdi - 6], ax               ; mov cs:[bx - 6], eax
  92 ; Switch into @ProtectedMode
  93     mov     rbx, cr0
  94     DB      66h
  95     and     ebx, 9ffafff3h
  96     DB      66h
  97     or      ebx, 00000023h
  98
  99     mov     cr0, rbx
 100     DB      66h, 0eah
 101     DD      ?
 102     DW      ?
 103
 104 _GdtDesc    FWORD   ?
 105 @ProtectedMode:
 106     mov     ax, PROTECT_MODE_DS
 107     mov     ds, ax
 108     mov     es, ax
 109     mov     fs, ax
 110     mov     gs, ax
 111     mov     ss, ax
 112     DB      0bch                   ; mov esp, imm32
 113 gSmiStack   DD      ?
 114     jmp     ProtFlatMode
 115
 116 ProtFlatMode:
 117     DB      0b8h                        ; mov eax, offset gSmiCr3
 118 gSmiCr3     DD      ?
 119     mov     cr3, rax
 120     mov     eax, 668h                   ; as cr4.PGE is not set here, refresh cr3
 121     mov     cr4, rax                    ; in PreModifyMtrrs() to flush TLB.
 122 ; Load TSS
 123     sub     esp, 8                      ; reserve room in stack
 124     sgdt    fword ptr [rsp]
 125     mov     eax, [rsp + 2]              ; eax = GDT base
 126     add     esp, 8
 127     mov     edx, eax
 128     add     edx, GDT_SIZE
 129     mov     [rax + TSS_SEGMENT + 2], dl
 130     mov     [rax + TSS_SEGMENT + 3], dh
 131     DB      0c1h, 0eah, 10h             ; shr     edx, 16
 132     mov     [rax + TSS_SEGMENT + 4], dl
 133     mov     [rax + TSS_SEGMENT + 7], dh
 134     mov     edx, eax
 135     mov     dl, 89h
 136     mov     [rax + TSS_SEGMENT + 5], dl ; clear busy flag
 137     mov     eax, TSS_SEGMENT
 138     ltr     ax
 139
 140 ; Switch into @LongMode
 141     push    LONG_MODE_CS                ; push cs hardcore here
 142     call    Base                       ; push return address for retf later
 143 Base:
 144     add     dword ptr [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg
 145     mov     ecx, 0c0000080h
 146     rdmsr
 147     or      ah, 1
 148     wrmsr
 149     mov     rbx, cr0
 150     bts     ebx, 31
 151     mov     cr0, rbx
 152     retf
 153 @LongMode:                              ; long mode (64-bit code) starts here
 154     mov     rax, offset gSmiHandlerIdtr
 155     lidt    fword ptr [rax]
 156     lea     ebx, [rdi + DSC_OFFSET]
 157     mov     ax, [rbx + DSC_DS]
 158     mov     ds, eax
 159     mov     ax, [rbx + DSC_OTHERSEG]
 160     mov     es, eax
 161     mov     fs, eax
 162     mov     gs, eax
 163     mov     ax, [rbx + DSC_SS]
 164     mov     ss, eax
 165 ;   jmp     _SmiHandler                 ; instruction is not needed
 166
 167 _SmiHandler:
 168 ;
 169 ; The following lines restore DR6 & DR7 before running C code. They are useful
 170 ; when you want to enable hardware breakpoints in SMM.
 171 ;
 172 ; NOTE: These lines might not be appreciated in runtime since they might
 173 ;       conflict with OS debugging facilities. Turn them off in RELEASE.
 174 ;
 175     mov     rax, offset FeaturePcdGet (PcdCpuSmmDebug) ;Get absolute address. Avoid RIP relative addressing
 176     cmp     byte ptr [rax], 0
 177     jz      @1
 178
 179     DB      48h, 8bh, 0dh               ; mov rcx, [rip + disp32]
 180     DD      SSM_DR6 - ($ + 4 - _SmiEntryPoint + 8000h)
 181     DB      48h, 8bh, 15h               ; mov rdx, [rip + disp32]
 182     DD      SSM_DR7 - ($ + 4 - _SmiEntryPoint + 8000h)
 183     mov     dr6, rcx
 184     mov     dr7, rdx
 185 @1:
 186     mov     rcx, [rsp]                  ; rcx <- CpuIndex
 187     mov     rax, SmiRendezvous          ; rax <- absolute addr of SmiRedezvous
 188
 189     ;
 190     ; Save FP registers
 191     ;
 192     sub     rsp, 208h
 193     DB      48h                         ; FXSAVE64
 194     fxsave  [rsp]
 195
 196     add     rsp, -20h
 197     call    rax
 198     add     rsp, 20h
 199
 200     ;
 201     ; Restore FP registers
 202     ;
 203     DB      48h                         ; FXRSTOR64
 204     fxrstor [rsp]
 205
 206     mov     rax, offset FeaturePcdGet (PcdCpuSmmDebug) ;Get absolute address. Avoid RIP relative addressing
 207     cmp     byte ptr [rax], 0
 208     jz      @2
 209
 210     mov     rdx, dr7
 211     mov     rcx, dr6
 212     DB      48h, 89h, 15h               ; mov [rip + disp32], rdx
 213     DD      SSM_DR7 - ($ + 4 - _SmiEntryPoint + 8000h)
 214     DB      48h, 89h, 0dh               ; mov [rip + disp32], rcx
 215     DD      SSM_DR6 - ($ + 4 - _SmiEntryPoint + 8000h)
 216 @2:
 217     rsm
 218
 219 gcSmiHandlerSize    DW      $ - _SmiEntryPoint
 220
 221     END