1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 ; Code template of the SMI handler for a particular processor
19 ;-------------------------------------------------------------------------------
22 ; Variables referenced by C code
24 EXTERNDEF SmiRendezvous:PROC
25 EXTERNDEF CpuSmmDebugEntry:PROC
26 EXTERNDEF CpuSmmDebugExit:PROC
27 EXTERNDEF gcSmiHandlerTemplate:BYTE
28 EXTERNDEF gcSmiHandlerSize:WORD
29 EXTERNDEF gSmiCr3:DWORD
30 EXTERNDEF gSmiStack:DWORD
31 EXTERNDEF gSmbase:DWORD
32 EXTERNDEF gSmiHandlerIdtr:FWORD
36 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
46 ; Constants relating to CPU State Save Area
51 PROTECT_MODE_CS EQU 08h
52 PROTECT_MODE_DS EQU 20h
59 gcSmiHandlerTemplate LABEL BYTE
63 ; The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-
64 ; bit addressing mode. And that coincidence has been used in the following
65 ; "64-bit like" 16-bit code. Be aware that once RDI is referenced as a
66 ; base address register, it is actually BX that is referenced.
68 DB 0bbh ; mov bx, imm16
69 DW offset _GdtDesc - _SmiEntryPoint + 8000h ; bx = GdtDesc offset
71 DB 2eh, 0a1h ; mov ax, cs:[offset16]
72 DW DSC_OFFSET + DSC_GDTSIZ
75 mov [rdi], eax ; mov cs:[bx], ax
76 DB 66h, 2eh, 0a1h ; mov eax, cs:[offset16]
77 DW DSC_OFFSET + DSC_GDTPTR
79 mov [rdi + 2], ax ; mov cs:[bx + 2], eax
81 lgdt fword ptr [rdi] ; lgdt fword ptr cs:[bx]
82 ; Patch ProtectedMode Segment
83 DB 0b8h ; mov ax, imm16
84 DW PROTECT_MODE_CS ; set AX for segment directly
86 mov [rdi - 2], eax ; mov cs:[bx - 2], ax
87 ; Patch ProtectedMode entry
88 DB 66h, 0bfh ; mov edi, SMBASE
90 lea ax, [edi + (@ProtectedMode - _SmiEntryPoint) + 8000h]
92 mov [rdi - 6], ax ; mov cs:[bx - 6], eax
93 ; Switch into @ProtectedMode
107 mov ax, PROTECT_MODE_DS
113 DB 0bch ; mov esp, imm32
118 DB 0b8h ; mov eax, offset gSmiCr3
121 mov eax, 668h ; as cr4.PGE is not set here, refresh cr3
122 mov cr4, rax ; in PreModifyMtrrs() to flush TLB.
124 sub esp, 8 ; reserve room in stack
126 mov eax, [rsp + 2] ; eax = GDT base
129 mov [rax + TSS_SEGMENT + 5], dl ; clear busy flag
133 ; Switch into @LongMode
134 push LONG_MODE_CS ; push cs hardcore here
135 call Base ; push return address for retf later
137 add dword ptr [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg
143 or ebx, 080010000h ; enable paging + WP
146 @LongMode: ; long mode (64-bit code) starts here
147 mov rax, offset gSmiHandlerIdtr
149 lea ebx, [rdi + DSC_OFFSET]
150 mov ax, [rbx + DSC_DS]
152 mov ax, [rbx + DSC_OTHERSEG]
156 mov ax, [rbx + DSC_SS]
158 ; jmp _SmiHandler ; instruction is not needed
161 mov rbx, [rsp] ; rbx <- CpuIndex
173 mov rax, CpuSmmDebugEntry
177 mov rax, SmiRendezvous ; rax <- absolute addr of SmiRedezvous
181 mov rax, CpuSmmDebugExit
187 ; Restore FP registers
194 gcSmiHandlerSize DW $ - _SmiEntryPoint