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1 ;------------------------------------------------------------------------------
2 ; @file
3 ; First code executed by processor after resetting.
4 ;
5 ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
6 ; SPDX-License-Identifier: BSD-2-Clause-Patent
7 ;
8 ;------------------------------------------------------------------------------
9
10 BITS 16
11
12 ALIGN 16
13
14 ;
15 ; Pad the image size to 4k when page tables are in VTF0
16 ;
17 ; If the VTF0 image has page tables built in, then we need to make
18 ; sure the end of VTF0 is 4k above where the page tables end.
19 ;
20 ; This is required so the page tables will be 4k aligned when VTF0 is
21 ; located just below 0x100000000 (4GB) in the firmware device.
22 ;
23 %ifdef ALIGN_TOP_TO_4K_FOR_PAGING
24 TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
25 %endif
26
27 applicationProcessorEntryPoint:
28 ;
29 ; Application Processors entry point
30 ;
31 ; GenFv generates code aligned on a 4k boundary which will jump to this
32 ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
33 ; used to wake up the application processors.
34 ;
35 jmp EarlyApInitReal16
36
37 ALIGN 8
38
39 DD 0
40
41 ;
42 ; The VTF signature
43 ;
44 ; VTF-0 means that the VTF (Volume Top File) code does not require
45 ; any fixups.
46 ;
47 vtfSignature:
48 DB 'V', 'T', 'F', 0
49
50 ALIGN 16
51
52 resetVector:
53 ;
54 ; Reset Vector
55 ;
56 ; This is where the processor will begin execution
57 ;
58 nop
59 nop
60 jmp EarlyBspInitReal16
61
62 ALIGN 16
63
64 fourGigabytes:
65