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UefiCpuPkg SecCore: Adjust PeiTemporaryRamBase&Size to be 8byte aligned
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1 /** @file
2 C functions in SEC
3
4 Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "SecMain.h"
16
17 EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {
18 SecTemporaryRamDone
19 };
20
21 EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = { SecPlatformInformation };
22
23 EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
24 {
25 EFI_PEI_PPI_DESCRIPTOR_PPI,
26 &gEfiTemporaryRamDonePpiGuid,
27 &gSecTemporaryRamDonePpi
28 },
29 {
30 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
31 &gEfiSecPlatformInformationPpiGuid,
32 &mSecPlatformInformationPpi
33 }
34 };
35
36 //
37 // These are IDT entries pointing to 10:FFFFFFE4h.
38 //
39 UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;
40
41 /**
42 Caller provided function to be invoked at the end of InitializeDebugAgent().
43
44 Entry point to the C language phase of SEC. After the SEC assembly
45 code has initialized some temporary memory and set up the stack,
46 the control is transferred to this function.
47
48 @param[in] Context The first input parameter of InitializeDebugAgent().
49
50 **/
51 VOID
52 NORETURN
53 EFIAPI
54 SecStartupPhase2(
55 IN VOID *Context
56 );
57
58 /**
59
60 Entry point to the C language phase of SEC. After the SEC assembly
61 code has initialized some temporary memory and set up the stack,
62 the control is transferred to this function.
63
64
65 @param SizeOfRam Size of the temporary memory available for use.
66 @param TempRamBase Base address of temporary ram
67 @param BootFirmwareVolume Base address of the Boot Firmware Volume.
68 **/
69 VOID
70 EFIAPI
71 SecStartup (
72 IN UINT32 SizeOfRam,
73 IN UINT32 TempRamBase,
74 IN VOID *BootFirmwareVolume
75 )
76 {
77 EFI_SEC_PEI_HAND_OFF SecCoreData;
78 IA32_DESCRIPTOR IdtDescriptor;
79 SEC_IDT_TABLE IdtTableInStack;
80 UINT32 Index;
81 UINT32 PeiStackSize;
82 EFI_STATUS Status;
83
84 //
85 // Report Status Code to indicate entering SEC core
86 //
87 REPORT_STATUS_CODE (
88 EFI_PROGRESS_CODE,
89 EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_ENTRY_POINT
90 );
91
92 PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);
93 if (PeiStackSize == 0) {
94 PeiStackSize = (SizeOfRam >> 1);
95 }
96
97 ASSERT (PeiStackSize < SizeOfRam);
98
99 //
100 // Process all libraries constructor function linked to SecCore.
101 //
102 ProcessLibraryConstructorList ();
103
104 //
105 // Initialize floating point operating environment
106 // to be compliant with UEFI spec.
107 //
108 InitializeFloatingPointUnits ();
109
110 // |-------------------|---->
111 // |IDT Table |
112 // |-------------------|
113 // |PeiService Pointer | PeiStackSize
114 // |-------------------|
115 // | |
116 // | Stack |
117 // |-------------------|---->
118 // | |
119 // | |
120 // | Heap | PeiTemporayRamSize
121 // | |
122 // | |
123 // |-------------------|----> TempRamBase
124
125 IdtTableInStack.PeiService = 0;
126 for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {
127 CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));
128 }
129
130 IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;
131 IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);
132
133 AsmWriteIdtr (&IdtDescriptor);
134
135 //
136 // Setup the default exception handlers
137 //
138 Status = InitializeCpuExceptionHandlers (NULL);
139 ASSERT_EFI_ERROR (Status);
140
141 //
142 // Update the base address and length of Pei temporary memory
143 //
144 SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);
145 SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
146 SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);
147 SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;
148 SecCoreData.TemporaryRamSize = SizeOfRam;
149 SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
150 SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;
151 SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);
152 SecCoreData.StackSize = PeiStackSize;
153
154 //
155 // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.
156 //
157 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);
158 }
159
160 /**
161 Caller provided function to be invoked at the end of InitializeDebugAgent().
162
163 Entry point to the C language phase of SEC. After the SEC assembly
164 code has initialized some temporary memory and set up the stack,
165 the control is transferred to this function.
166
167 @param[in] Context The first input parameter of InitializeDebugAgent().
168
169 **/
170 VOID
171 NORETURN
172 EFIAPI
173 SecStartupPhase2(
174 IN VOID *Context
175 )
176 {
177 EFI_SEC_PEI_HAND_OFF *SecCoreData;
178 EFI_PEI_PPI_DESCRIPTOR *PpiList;
179 UINT32 Index;
180 EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;
181 EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;
182
183 SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;
184 AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;
185 //
186 // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug
187 // is enabled.
188 //
189 FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);
190 if (PeiCoreEntryPoint == NULL)
191 {
192 CpuDeadLoop ();
193 }
194
195 //
196 // Perform platform specific initialization before entering PeiCore.
197 //
198 PpiList = SecPlatformMain (SecCoreData);
199 if (PpiList != NULL) {
200 //
201 // Remove the terminal flag from the terminal PPI
202 //
203 CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));
204 Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;
205 AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
206
207 //
208 // Append the platform additional PPI list
209 //
210 Index += 1;
211 while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {
212 CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));
213 Index++;
214 PpiList++;
215 }
216
217 //
218 // Add the terminal PPI
219 //
220 CopyMem (&AllSecPpiList[Index ++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));
221
222 //
223 // Set PpiList to the total PPI
224 //
225 PpiList = AllSecPpiList;
226
227 //
228 // Adjust PEI TEMP RAM Range.
229 //
230 ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));
231 SecCoreData->PeiTemporaryRamBase = (VOID *)((UINTN) SecCoreData->PeiTemporaryRamBase + Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));
232 SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);
233 //
234 // Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement
235 // will be built based on them in PEI phase.
236 //
237 SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);
238 SecCoreData->PeiTemporaryRamSize &= ~0x07;
239 } else {
240 //
241 // No addition PPI, PpiList directly point to the common PPI list.
242 //
243 PpiList = &mPeiSecPlatformInformationPpi[0];
244 }
245
246 DEBUG ((
247 DEBUG_INFO,
248 "%a() Stack Base: 0x%p, Stack Size: 0x%x\n",
249 __FUNCTION__,
250 SecCoreData->StackBase,
251 (UINT32) SecCoreData->StackSize
252 ));
253
254 //
255 // Report Status Code to indicate transferring to PEI core
256 //
257 REPORT_STATUS_CODE (
258 EFI_PROGRESS_CODE,
259 EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_HANDOFF_TO_NEXT
260 );
261
262 //
263 // Transfer the control to the PEI core
264 //
265 ASSERT (PeiCoreEntryPoint != NULL);
266 (*PeiCoreEntryPoint) (SecCoreData, PpiList);
267
268 //
269 // Should not come here.
270 //
271 UNREACHABLE ();
272 }
273
274 /**
275 TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
276 by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.
277
278 @retval EFI_SUCCESS Use of Temporary RAM was disabled.
279 @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
280
281 **/
282 EFI_STATUS
283 EFIAPI
284 SecTemporaryRamDone (
285 VOID
286 )
287 {
288 BOOLEAN State;
289
290 //
291 // Republish Sec Platform Information(2) PPI
292 //
293 RepublishSecPlatformInformationPpi ();
294
295 //
296 // Migrate DebugAgentContext.
297 //
298 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
299
300 //
301 // Disable interrupts and save current interrupt state
302 //
303 State = SaveAndDisableInterrupts();
304
305 //
306 // Disable Temporary RAM after Stack and Heap have been migrated at this point.
307 //
308 SecPlatformDisableTemporaryMemory ();
309
310 //
311 // Restore original interrupt state
312 //
313 SetInterruptState (State);
314
315 return EFI_SUCCESS;
316 }