UefiCpuPkg: Update package version.
[mirror_edk2.git] / UefiCpuPkg / UefiCpuPkg.dec
1 ## @file UefiCpuPkg.dec
2 # This Package provides UEFI compatible CPU modules and libraries.
3 #
4 # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License which accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 ##
15
16 [Defines]
17 DEC_SPECIFICATION = 0x00010005
18 PACKAGE_NAME = UefiCpuPkg
19 PACKAGE_UNI_FILE = UefiCpuPkg.uni
20 PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
21 PACKAGE_VERSION = 0.90
22
23 [Includes]
24 Include
25
26 [LibraryClasses]
27 ## @libraryclass Defines some routines that are generic for IA32 family CPU
28 ## to be UEFI specification compliant.
29 ##
30 UefiCpuLib|Include/Library/UefiCpuLib.h
31
32 ## @libraryclass Defines some routines that are used to register/manage/program
33 ## CPU features.
34 ##
35 RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
36
37 [LibraryClasses.IA32, LibraryClasses.X64]
38 ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
39 ##
40 MtrrLib|Include/Library/MtrrLib.h
41
42 ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
43 ##
44 LocalApicLib|Include/Library/LocalApicLib.h
45
46 ## @libraryclass Provides platform specific initialization functions in the SEC phase.
47 ##
48 PlatformSecLib|Include/Library/PlatformSecLib.h
49
50 ## @libraryclass Public include file for the SMM CPU Platform Hook Library.
51 ##
52 SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
53
54 ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.
55 ##
56 SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
57
58 ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.
59 ##
60 MpInitLib|Include/Library/MpInitLib.h
61
62 [Guids]
63 gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
64 gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
65
66 ## Include/Guid/CpuFeaturesSetDone.h
67 gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
68
69 ## Include/Guid/CpuFeaturesInitDone.h
70 gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
71
72 [Protocols]
73 ## Include/Protocol/SmmCpuService.h
74 gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
75
76 ## Include/Protocol/SmMonitorInit.h
77 gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
78
79 #
80 # [Error.gUefiCpuPkgTokenSpaceGuid]
81 # 0x80000001 | Invalid value provided.
82 #
83
84 [PcdsFeatureFlag]
85 ## Indicates if SMM Profile will be enabled.
86 # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
87 # It could not be enabled at the same time with SMM static page table feature (PcdCpuSmmStaticPageTable).
88 # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
89 # TRUE - SMM Profile will be enabled.<BR>
90 # FALSE - SMM Profile will be disabled.<BR>
91 # @Prompt Enable SMM Profile.
92 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
93
94 ## Indicates if the SMM profile log buffer is a ring buffer.
95 # If disabled, no additional log can be done when the buffer is full.<BR><BR>
96 # TRUE - the SMM profile log buffer is a ring buffer.<BR>
97 # FALSE - the SMM profile log buffer is a normal buffer.<BR>
98 # @Prompt The SMM profile log buffer is a ring buffer.
99 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
100
101 ## Indicates if SMM Startup AP in a blocking fashion.
102 # TRUE - SMM Startup AP in a blocking fashion.<BR>
103 # FALSE - SMM Startup AP in a non-blocking fashion.<BR>
104 # @Prompt SMM Startup AP in a blocking fashion.
105 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
106
107 ## Indicates if SMM Stack Guard will be enabled.
108 # If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
109 # TRUE - SMM Stack Guard will be enabled.<BR>
110 # FALSE - SMM Stack Guard will be disabled.<BR>
111 # @Prompt Enable SMM Stack Guard.
112 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
113
114 ## Indicates if BSP election in SMM will be enabled.
115 # If enabled, a BSP will be dynamically elected among all processors in each SMI.
116 # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
117 # TRUE - BSP election in SMM will be enabled.<BR>
118 # FALSE - BSP election in SMM will be disabled.<BR>
119 # @Prompt Enable BSP election in SMM.
120 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
121
122 ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
123 # TRUE - SMM CPU hot-plug will be enabled.<BR>
124 # FALSE - SMM CPU hot-plug will be disabled.<BR>
125 # @Prompt SMM CPU hot-plug.
126 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
127
128 ## Indicates if SMM Debug will be enabled.
129 # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
130 # TRUE - SMM Debug will be enabled.<BR>
131 # FALSE - SMM Debug will be disabled.<BR>
132 # @Prompt Enable SMM Debug.
133 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
134
135 ## Indicates if lock SMM Feature Control MSR.<BR><BR>
136 # TRUE - SMM Feature Control MSR will be locked.<BR>
137 # FALSE - SMM Feature Control MSR will not be locked.<BR>
138 # @Prompt Lock SMM Feature Control MSR.
139 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
140
141 [PcdsFixedAtBuild]
142 ## List of exception vectors which need switching stack.
143 # This PCD will only take into effect if PcdCpuStackGuard is enabled.
144 # By default exception #DD(8), #PF(14) are supported.
145 # @Prompt Specify exception vectors which need switching stack.
146 gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
147
148 ## Size of good stack for an exception.
149 # This PCD will only take into effect if PcdCpuStackGuard is enabled.
150 # @Prompt Specify size of good stack of exception which need switching stack.
151 gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
152
153 [PcdsFixedAtBuild, PcdsPatchableInModule]
154 ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
155 # @Prompt Configure base address of CPU Local APIC
156 # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
157 gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
158
159 ## Specifies delay value in microseconds after sending out an INIT IPI.
160 # @Prompt Configure delay value after send an INIT IPI
161 gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
162
163 ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
164 ## aligns the address on a 4-KByte boundary.
165 # @Prompt Configure stack size for Application Processor (AP)
166 gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
167
168 ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
169 # @Prompt Stack size in the temporary RAM.
170 gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
171
172 ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
173 # @Prompt SMM profile data buffer size.
174 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
175
176 ## Specifies stack size in bytes for each processor in SMM.
177 # @Prompt Processor stack size in SMM.
178 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
179
180 ## Indicates if SMM Code Access Check is enabled.
181 # If enabled, the SMM handler cannot execute the code outside SMM regions.
182 # This PCD is suggested to TRUE in production image.<BR><BR>
183 # TRUE - SMM Code Access Check will be enabled.<BR>
184 # FALSE - SMM Code Access Check will be disabled.<BR>
185 # @Prompt SMM Code Access Check.
186 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
187
188 ## Specifies the number of variable MTRRs reserved for OS use. The default number of
189 # MTRRs reserved for OS use is 2.
190 # @Prompt Number of reserved variable MTRRs.
191 gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
192
193 ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
194 # @Prompt STM exception stack size.
195 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
196
197 ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
198 # @Prompt MSEG size.
199 gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
200
201 ## Specifies the supported CPU features bit in array.
202 # @Prompt Supported CPU features.
203 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
204
205 ## Specifies if CPU features will be initialized after SMM relocation.
206 # @Prompt If CPU features will be initialized after SMM relocation.
207 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
208
209 ## Specifies if CPU features will be initialized during S3 resume.
210 # @Prompt If CPU features will be initialized during S3 resume.
211 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
212
213 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
214 ## Specifies max supported number of Logical Processors.
215 # @Prompt Configure max supported number of Logical Processors
216 gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
217 ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
218 # @Prompt Timeout for the BSP to detect all APs for the first time.
219 gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
220 ## Specifies the base address of the first microcode Patch in the microcode Region.
221 # @Prompt Microcode Region base address.
222 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
223 ## Specifies the size of the microcode Region.
224 # @Prompt Microcode Region size.
225 gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
226 ## Specifies the AP wait loop state during POST phase.
227 # The value is defined as below.<BR><BR>
228 # 1: Place AP in the Hlt-Loop state.<BR>
229 # 2: Place AP in the Mwait-Loop state.<BR>
230 # 3: Place AP in the Run-Loop state.<BR>
231 # @Prompt The AP wait loop state.
232 # @ValidRange 0x80000001 | 1 - 3
233 gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
234 ## Specifies the AP target C-state for Mwait during POST phase.
235 # The default value 0 means C1 state.
236 # The value is defined as below.<BR><BR>
237 # @Prompt The specified AP target C-state for Mwait.
238 gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
239
240 ## Indicates if SMM uses static page table.
241 # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
242 # This flag only impacts X64 build, because SMM always builds static page table for IA32.
243 # It could not be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
244 # It could not be enabled also at the same time with heap guard feature for SMM
245 # (PcdHeapGuardPropertyMask in MdeModulePkg).<BR><BR>
246 # TRUE - SMM uses static page table for all memory.<BR>
247 # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>
248 # @Prompt Use static page table for all memory in SMM.
249 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D
250
251 ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
252 # @Prompt AP synchronization timeout value in SMM.
253 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
254
255 ## Indicates the CPU synchronization method used when processing an SMI.
256 # 0x00 - Traditional CPU synchronization method.<BR>
257 # 0x01 - Relaxed CPU synchronization method.<BR>
258 # @Prompt SMM CPU Synchronization Method.
259 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
260
261 ## Specifies user's desired settings for enabling/disabling processor features.
262 # @Prompt User settings for enabling/disabling processor features.
263 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017
264
265 ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
266 # @Prompt The encoded values for target duty cycle modulation.
267 # @ValidRange 0x80000001 | 0 - 15
268 gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
269
270 ## Indicates if the current boot is a power-on reset.<BR><BR>
271 # TRUE - Current boot is a power-on reset.<BR>
272 # FALSE - Current boot is not a power-on reset.<BR>
273 # @Prompt Current boot is a power-on reset.
274 gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
275
276 [PcdsDynamic, PcdsDynamicEx]
277 ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
278 # @Prompt The pointer to a CPU S3 data buffer.
279 # @ValidList 0x80000001 | 0
280 gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
281
282 ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
283 # @Prompt The pointer to CPU Hot Plug Data.
284 # @ValidList 0x80000001 | 0
285 gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
286
287 ## Indicates processor feature capabilities, each bit corresponding to a specific feature.
288 # @Prompt Processor feature capabilities.
289 # @ValidList 0x80000001 | 0
290 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
291
292 ## Specifies actual settings for processor features, each bit corresponding to a specific feature.
293 # @Prompt Actual processor feature settings.
294 # @ValidList 0x80000001 | 0
295 gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
296
297 ## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
298 # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
299 # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
300 # Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.<BR>
301 # 0x0 - 4K.<BR>
302 # 0x1 - 8K.<BR>
303 # 0x2 - 16K.<BR>
304 # 0x3 - 32K.<BR>
305 # 0x4 - 64K.<BR>
306 # 0x5 - 128K.<BR>
307 # 0x6 - 256K.<BR>
308 # 0x7 - 512K.<BR>
309 # 0x8 - 1M.<BR>
310 # 0x9 - 2M.<BR>
311 # 0xA - 4M.<BR>
312 # 0xB - 8M.<BR>
313 # 0xC - 16M.<BR>
314 # 0xD - 32M.<BR>
315 # 0xE - 64M.<BR>
316 # 0xF - 128M.<BR>
317 # @Prompt The memory size used for processor trace if processor trace is enabled.
318 # @ValidRange 0x80000001 | 0 - 0xF
319 gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
320
321 ## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
322 # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
323 # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
324 # Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>
325 # 0 - Single Range output scheme.<BR>
326 # 1 - ToPA(Table of physical address) scheme.<BR>
327 # @Prompt The processor trace output scheme used when processor trace is enabled.
328 # @ValidRange 0x80000001 | 0 - 1
329 gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
330
331 [UserExtensions.TianoCore."ExtraFiles"]
332 UefiCpuPkgExtra.uni