UefiCpuPkg/UefiCpuPkg.dec

   1 ## @file  UefiCpuPkg.dec
   2 # This Package provides UEFI compatible CPU modules and libraries.
   3 #
   4 # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
   5 #
   6 # This program and the accompanying materials are licensed and made available under
   7 # the terms and conditions of the BSD License which accompanies this distribution.
   8 # The full text of the license may be found at
   9 # http://opensource.org/licenses/bsd-license.php
  10 #
  11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 [Defines]
  17   DEC_SPECIFICATION              = 0x00010005
  18   PACKAGE_NAME                   = UefiCpuPkg
  19   PACKAGE_UNI_FILE               = UefiCpuPkg.uni
  20   PACKAGE_GUID                   = 2171df9b-0d39-45aa-ac37-2de190010d23
  21   PACKAGE_VERSION                = 0.80
  22
  23 [Includes]
  24   Include
  25
  26 [LibraryClasses]
  27   ##  @libraryclass  Defines some routines that are generic for IA32 family CPU
  28   ##                 to be UEFI specification compliant.
  29   ##
  30   UefiCpuLib|Include/Library/UefiCpuLib.h
  31
  32   ##  @libraryclass  Defines some routines that are used to register/manage/program
  33   ##                 CPU features.
  34   ##
  35   RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
  36
  37 [LibraryClasses.IA32, LibraryClasses.X64]
  38   ##  @libraryclass  Provides functions to manage MTRR settings on IA32 and X64 CPUs.
  39   ##
  40   MtrrLib|Include/Library/MtrrLib.h
  41
  42   ##  @libraryclass  Provides functions to manage the Local APIC on IA32 and X64 CPUs.
  43   ##
  44   LocalApicLib|Include/Library/LocalApicLib.h
  45
  46   ##  @libraryclass  Provides platform specific initialization functions in the SEC phase.
  47   ##
  48   PlatformSecLib|Include/Library/PlatformSecLib.h
  49
  50   ##  @libraryclass  Public include file for the SMM CPU Platform Hook Library.
  51   ##
  52   SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
  53
  54   ##  @libraryclass  Provides the CPU specific programming for PiSmmCpuDxeSmm module.
  55   ##
  56   SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
  57
  58   ##  @libraryclass  Provides functions to support MP services on CpuMpPei and CpuDxe module.
  59   ##
  60   MpInitLib|Include/Library/MpInitLib.h
  61
  62 [Guids]
  63   gUefiCpuPkgTokenSpaceGuid      = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
  64   gMsegSmramGuid                 = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
  65
  66   ## Include/Guid/CpuFeaturesSetDone.h
  67   gEdkiiCpuFeaturesSetDoneGuid   = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
  68
  69   ## Include/Guid/CpuFeaturesInitDone.h
  70   gEdkiiCpuFeaturesInitDoneGuid  = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
  71
  72 [Protocols]
  73   ## Include/Protocol/SmmCpuService.h
  74   gEfiSmmCpuServiceProtocolGuid  = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
  75
  76   ## Include/Protocol/SmMonitorInit.h
  77   gEfiSmMonitorInitProtocolGuid  = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
  78
  79 #
  80 # [Error.gUefiCpuPkgTokenSpaceGuid]
  81 #   0x80000001 | Invalid value provided.
  82 #
  83
  84 [PcdsFeatureFlag]
  85   ## Indicates if SMM Profile will be enabled.
  86   #  If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
  87   #  This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
  88   #   TRUE  - SMM Profile will be enabled.<BR>
  89   #   FALSE - SMM Profile will be disabled.<BR>
  90   # @Prompt Enable SMM Profile.
  91   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
  92
  93   ## Indicates if the SMM profile log buffer is a ring buffer.
  94   #  If disabled, no additional log can be done when the buffer is full.<BR><BR>
  95   #   TRUE  - the SMM profile log buffer is a ring buffer.<BR>
  96   #   FALSE - the SMM profile log buffer is a normal buffer.<BR>
  97   # @Prompt The SMM profile log buffer is a ring buffer.
  98   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
  99
 100   ## Indicates if SMM Startup AP in a blocking fashion.
 101   #   TRUE  - SMM Startup AP in a blocking fashion.<BR>
 102   #   FALSE - SMM Startup AP in a non-blocking fashion.<BR>
 103   # @Prompt SMM Startup AP in a blocking fashion.
 104   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
 105
 106   ## Indicates if SMM Stack Guard will be enabled.
 107   #  If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
 108   #   TRUE  - SMM Stack Guard will be enabled.<BR>
 109   #   FALSE - SMM Stack Guard will be disabled.<BR>
 110   # @Prompt Enable SMM Stack Guard.
 111   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
 112
 113   ## Indicates if BSP election in SMM will be enabled.
 114   #  If enabled, a BSP will be dynamically elected among all processors in each SMI.
 115   #  Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
 116   #   TRUE  - BSP election in SMM will be enabled.<BR>
 117   #   FALSE - BSP election in SMM will be disabled.<BR>
 118   # @Prompt Enable BSP election in SMM.
 119   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
 120
 121   ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
 122   #   TRUE  - SMM CPU hot-plug will be enabled.<BR>
 123   #   FALSE - SMM CPU hot-plug will be disabled.<BR>
 124   # @Prompt SMM CPU hot-plug.
 125   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
 126
 127   ## Indicates if SMM Debug will be enabled.
 128   #  If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
 129   #   TRUE  - SMM Debug will be enabled.<BR>
 130   #   FALSE - SMM Debug will be disabled.<BR>
 131   # @Prompt Enable SMM Debug.
 132   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
 133
 134   ## Indicates if lock SMM Feature Control MSR.<BR><BR>
 135   #   TRUE  - SMM Feature Control MSR will be locked.<BR>
 136   #   FALSE - SMM Feature Control MSR will not be locked.<BR>
 137   # @Prompt Lock SMM Feature Control MSR.
 138   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
 139
 140 [PcdsFixedAtBuild, PcdsPatchableInModule]
 141   ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
 142   # @Prompt Configure base address of CPU Local APIC
 143   # @Expression  0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
 144   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
 145
 146   ## Specifies delay value in microseconds after sending out an INIT IPI.
 147   # @Prompt Configure delay value after send an INIT IPI
 148   gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
 149
 150   ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
 151   ## aligns the address on a 4-KByte boundary.
 152   # @Prompt Configure stack size for Application Processor (AP)
 153   gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
 154
 155   ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
 156   # @Prompt Stack size in the temporary RAM.
 157   gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
 158
 159   ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
 160   # @Prompt SMM profile data buffer size.
 161   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
 162
 163   ## Specifies stack size in bytes for each processor in SMM.
 164   # @Prompt Processor stack size in SMM.
 165   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
 166
 167   ## Indicates if SMM Code Access Check is enabled.
 168   #  If enabled, the SMM handler cannot execute the code outside SMM regions.
 169   #  This PCD is suggested to TRUE in production image.<BR><BR>
 170   #   TRUE  - SMM Code Access Check will be enabled.<BR>
 171   #   FALSE - SMM Code Access Check will be disabled.<BR>
 172   # @Prompt SMM Code Access Check.
 173   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
 174
 175   ## Specifies the number of variable MTRRs reserved for OS use. The default number of
 176   #  MTRRs reserved for OS use is 2.
 177   # @Prompt Number of reserved variable MTRRs.
 178   gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
 179
 180   ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
 181   # @Prompt STM exception stack size.
 182   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
 183
 184   ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
 185   # @Prompt MSEG size.
 186   gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
 187
 188   ## Specifies the supported CPU features bit in array.
 189   # @Prompt Supported CPU features.
 190   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
 191
 192   ## Specifies if CPU features will be initialized after SMM relocation.
 193   # @Prompt If CPU features will be initialized after SMM relocation.
 194   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
 195
 196   ## Specifies if CPU features will be initialized during S3 resume.
 197   # @Prompt If CPU features will be initialized during S3 resume.
 198   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
 199
 200 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
 201   ## Specifies max supported number of Logical Processors.
 202   # @Prompt Configure max supported number of Logical Processors
 203   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
 204   ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
 205   # @Prompt Timeout for the BSP to detect all APs for the first time.
 206   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
 207   ## Specifies the base address of the first microcode Patch in the microcode Region.
 208   # @Prompt Microcode Region base address.
 209   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
 210   ## Specifies the size of the microcode Region.
 211   # @Prompt Microcode Region size.
 212   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
 213   ## Specifies the AP wait loop state during POST phase.
 214   #  The value is defined as below.<BR><BR>
 215   #  1: Place AP in the Hlt-Loop state.<BR>
 216   #  2: Place AP in the Mwait-Loop state.<BR>
 217   #  3: Place AP in the Run-Loop state.<BR>
 218   # @Prompt The AP wait loop state.
 219   # @ValidRange  0x80000001 | 1 - 3
 220   gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
 221   ## Specifies the AP target C-state for Mwait during POST phase.
 222   #  The default value 0 means C1 state.
 223   #  The value is defined as below.<BR><BR>
 224   # @Prompt The specified AP target C-state for Mwait.
 225   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
 226
 227   ## Indicates if SMM uses static page table.
 228   #  If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.<BR><BR>
 229   #  This flag only impacts X64 build, because SMM alway builds static page table for IA32.
 230   #   TRUE  - SMM uses static page table for all memory.<BR>
 231   #   FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>
 232   # @Prompt Use static page table for all memory in SMM.
 233   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D
 234
 235   ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
 236   # @Prompt AP synchronization timeout value in SMM.
 237   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
 238
 239   ## Indicates the CPU synchronization method used when processing an SMI.
 240   #   0x00  - Traditional CPU synchronization method.<BR>
 241   #   0x01  - Relaxed CPU synchronization method.<BR>
 242   # @Prompt SMM CPU Synchronization Method.
 243   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
 244
 245   ## Specifies user's desired settings for enabling/disabling processor features.
 246   # @Prompt User settings for enabling/disabling processor features.
 247   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017
 248
 249   ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
 250   # @Prompt The encoded values for target duty cycle modulation.
 251   # @ValidRange  0x80000001 | 0 - 15
 252   gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
 253
 254   ## Indicates if the current boot is a power-on reset.<BR><BR>
 255   #   TRUE  - Current boot is a power-on reset.<BR>
 256   #   FALSE - Current boot is not a power-on reset.<BR>
 257   # @Prompt Current boot is a power-on reset.
 258   gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
 259
 260 [PcdsDynamic, PcdsDynamicEx]
 261   ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
 262   # @Prompt The pointer to a CPU S3 data buffer.
 263   # @ValidList   0x80000001 | 0
 264   gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
 265
 266   ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
 267   # @Prompt The pointer to CPU Hot Plug Data.
 268   # @ValidList   0x80000001 | 0
 269   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
 270
 271   ## Indicates processor feature capabilities, each bit corresponding to a specific feature.
 272   # @Prompt Processor feature capabilities.
 273   # @ValidList   0x80000001 | 0
 274   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
 275
 276   ## Specifies actual settings for processor features, each bit corresponding to a specific feature.
 277   # @Prompt Actual processor feature settings.
 278   # @ValidList   0x80000001 | 0
 279   gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
 280
 281   ## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
 282   #  Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
 283   #  This PCD is ignored if CPU processor trace is disabled.<BR><BR>
 284   #  Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.<BR>
 285   #  0x0  -  4K.<BR>
 286   #  0x1  -  8K.<BR>
 287   #  0x2  -  16K.<BR>
 288   #  0x3  -  32K.<BR>
 289   #  0x4  -  64K.<BR>
 290   #  0x5  -  128K.<BR>
 291   #  0x6  -  256K.<BR>
 292   #  0x7  -  512K.<BR>
 293   #  0x8  -  1M.<BR>
 294   #  0x9  -  2M.<BR>
 295   #  0xA  -  4M.<BR>
 296   #  0xB  -  8M.<BR>
 297   #  0xC  -  16M.<BR>
 298   #  0xD  -  32M.<BR>
 299   #  0xE  -  64M.<BR>
 300   #  0xF  -  128M.<BR>
 301   # @Prompt The memory size used for processor trace if processor trace is enabled.
 302   # @ValidRange  0x80000001 | 0 - 0xF
 303   gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
 304
 305   ## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
 306   #  Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
 307   #  This PCD is ignored if CPU processor trace is disabled.<BR><BR>
 308   #  Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>
 309   #  0 - Single Range output scheme.<BR>
 310   #  1 - ToPA(Table of physical address) scheme.<BR>
 311   # @Prompt The processor trace output scheme used when processor trace is enabled.
 312   # @ValidRange  0x80000001 | 0 - 1
 313   gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
 314
 315 [UserExtensions.TianoCore."ExtraFiles"]
 316   UefiCpuPkgExtra.uni