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1 /** @file
2 This module produces the EFI_PEI_S3_RESUME2_PPI.
3 This module works with StandAloneBootScriptExecutor to S3 resume to OS.
4 This module will execute the boot script saved during last boot and after that,
5 control is passed to OS waking up handler.
6
7 Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
8 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
9
10 This program and the accompanying materials
11 are licensed and made available under the terms and conditions
12 of the BSD License which accompanies this distribution. The
13 full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 **/
20
21 #include <PiPei.h>
22
23 #include <Guid/AcpiS3Context.h>
24 #include <Guid/BootScriptExecutorVariable.h>
25 #include <Guid/Performance.h>
26 #include <Ppi/ReadOnlyVariable2.h>
27 #include <Ppi/S3Resume2.h>
28 #include <Ppi/SmmAccess.h>
29 #include <Ppi/PostBootScriptTable.h>
30 #include <Ppi/EndOfPeiPhase.h>
31 #include <Ppi/SmmCommunication.h>
32
33 #include <Protocol/SmmEndOfS3Resume.h>
34
35 #include <Library/DebugLib.h>
36 #include <Library/BaseLib.h>
37 #include <Library/TimerLib.h>
38 #include <Library/PeimEntryPoint.h>
39 #include <Library/PeiServicesLib.h>
40 #include <Library/HobLib.h>
41 #include <Library/PerformanceLib.h>
42 #include <Library/PeiServicesTablePointerLib.h>
43 #include <Library/IoLib.h>
44 #include <Library/BaseMemoryLib.h>
45 #include <Library/MemoryAllocationLib.h>
46 #include <Library/PcdLib.h>
47 #include <Library/DebugAgentLib.h>
48 #include <Library/LocalApicLib.h>
49 #include <Library/ReportStatusCodeLib.h>
50 #include <Library/PrintLib.h>
51 #include <Library/HobLib.h>
52 #include <Library/LockBoxLib.h>
53 #include <IndustryStandard/Acpi.h>
54
55 /**
56 This macro aligns the address of a variable with auto storage
57 duration down to CPU_STACK_ALIGNMENT.
58
59 Since the stack grows downward, the result preserves more of the
60 stack than the original address (or the same amount), not less.
61 **/
62 #define STACK_ALIGN_DOWN(Ptr) \
63 ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))
64
65 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
66
67 #pragma pack(1)
68 typedef union {
69 struct {
70 UINT32 LimitLow : 16;
71 UINT32 BaseLow : 16;
72 UINT32 BaseMid : 8;
73 UINT32 Type : 4;
74 UINT32 System : 1;
75 UINT32 Dpl : 2;
76 UINT32 Present : 1;
77 UINT32 LimitHigh : 4;
78 UINT32 Software : 1;
79 UINT32 Reserved : 1;
80 UINT32 DefaultSize : 1;
81 UINT32 Granularity : 1;
82 UINT32 BaseHigh : 8;
83 } Bits;
84 UINT64 Uint64;
85 } IA32_GDT;
86
87 //
88 // Page-Map Level-4 Offset (PML4) and
89 // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
90 //
91 typedef union {
92 struct {
93 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
94 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
95 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
96 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
97 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
98 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
99 UINT64 Reserved:1; // Reserved
100 UINT64 MustBeZero:2; // Must Be Zero
101 UINT64 Available:3; // Available for use by system software
102 UINT64 PageTableBaseAddress:40; // Page Table Base Address
103 UINT64 AvabilableHigh:11; // Available for use by system software
104 UINT64 Nx:1; // No Execute bit
105 } Bits;
106 UINT64 Uint64;
107 } PAGE_MAP_AND_DIRECTORY_POINTER;
108
109 //
110 // Page Table Entry 2MB
111 //
112 typedef union {
113 struct {
114 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
115 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
116 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
117 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
118 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
119 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
120 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
121 UINT64 MustBe1:1; // Must be 1
122 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
123 UINT64 Available:3; // Available for use by system software
124 UINT64 PAT:1; //
125 UINT64 MustBeZero:8; // Must be zero;
126 UINT64 PageTableBaseAddress:31; // Page Table Base Address
127 UINT64 AvabilableHigh:11; // Available for use by system software
128 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
129 } Bits;
130 UINT64 Uint64;
131 } PAGE_TABLE_ENTRY;
132
133 //
134 // Page Table Entry 1GB
135 //
136 typedef union {
137 struct {
138 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
139 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
140 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
141 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
142 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
143 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
144 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
145 UINT64 MustBe1:1; // Must be 1
146 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
147 UINT64 Available:3; // Available for use by system software
148 UINT64 PAT:1; //
149 UINT64 MustBeZero:17; // Must be zero;
150 UINT64 PageTableBaseAddress:22; // Page Table Base Address
151 UINT64 AvabilableHigh:11; // Available for use by system software
152 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
153 } Bits;
154 UINT64 Uint64;
155 } PAGE_TABLE_1G_ENTRY;
156
157 //
158 // Define two type of smm communicate headers.
159 // One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.
160 //
161 typedef struct {
162 EFI_GUID HeaderGuid;
163 UINT32 MessageLength;
164 UINT8 Data[1];
165 } SMM_COMMUNICATE_HEADER_32;
166
167 typedef struct {
168 EFI_GUID HeaderGuid;
169 UINT64 MessageLength;
170 UINT8 Data[1];
171 } SMM_COMMUNICATE_HEADER_64;
172
173 #pragma pack()
174
175 //
176 // Function prototypes
177 //
178 /**
179 a ASM function to transfer control to OS.
180
181 @param S3WakingVector The S3 waking up vector saved in ACPI Facs table
182 @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer
183 **/
184 typedef
185 VOID
186 (EFIAPI *ASM_TRANSFER_CONTROL) (
187 IN UINT32 S3WakingVector,
188 IN UINT32 AcpiLowMemoryBase
189 );
190
191 /**
192 Restores the platform to its preboot configuration for an S3 resume and
193 jumps to the OS waking vector.
194
195 This function will restore the platform to its pre-boot configuration that was
196 pre-stored in the boot script table and transfer control to OS waking vector.
197 Upon invocation, this function is responsible for locating the following
198 information before jumping to OS waking vector:
199 - ACPI tables
200 - boot script table
201 - any other information that it needs
202
203 The S3RestoreConfig() function then executes the pre-stored boot script table
204 and transitions the platform to the pre-boot state. The boot script is recorded
205 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
206 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
207 transfers control to the OS waking vector. If the OS supports only a real-mode
208 waking vector, this function will switch from flat mode to real mode before
209 jumping to the waking vector. If all platform pre-boot configurations are
210 successfully restored and all other necessary information is ready, this
211 function will never return and instead will directly jump to the OS waking
212 vector. If this function returns, it indicates that the attempt to resume
213 from the ACPI S3 sleep state failed.
214
215 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
216
217 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
218 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
219 resume boot path could not be located.
220
221 **/
222 EFI_STATUS
223 EFIAPI
224 S3RestoreConfig2 (
225 IN EFI_PEI_S3_RESUME2_PPI *This
226 );
227
228 /**
229 Set data segment selectors value including DS/ES/FS/GS/SS.
230
231 @param[in] SelectorValue Segment selector value to be set.
232
233 **/
234 VOID
235 EFIAPI
236 AsmSetDataSelectors (
237 IN UINT16 SelectorValue
238 );
239
240 //
241 // Globals
242 //
243 EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };
244
245 EFI_PEI_PPI_DESCRIPTOR mPpiList = {
246 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
247 &gEfiPeiS3Resume2PpiGuid,
248 &mS3ResumePpi
249 };
250
251 EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {
252 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
253 &gPeiPostScriptTablePpiGuid,
254 0
255 };
256
257 EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {
258 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
259 &gEfiEndOfPeiSignalPpiGuid,
260 0
261 };
262
263 //
264 // Global Descriptor Table (GDT)
265 //
266 GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
267 /* selector { Global Segment Descriptor } */
268 /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
269 /* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
270 /* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
271 /* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
272 /* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
273 /* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
274 /* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
275 /* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},
276 /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
277 };
278
279 #define DATA_SEGEMENT_SELECTOR 0x18
280
281 //
282 // IA32 Gdt register
283 //
284 GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {
285 sizeof (mGdtEntries) - 1,
286 (UINTN) mGdtEntries
287 };
288
289 /**
290 Performance measure function to get S3 detailed performance data.
291
292 This function will getS3 detailed performance data and saved in pre-reserved ACPI memory.
293 **/
294 VOID
295 WriteToOsS3PerformanceData (
296 VOID
297 )
298 {
299 EFI_STATUS Status;
300 EFI_PHYSICAL_ADDRESS mAcpiLowMemoryBase;
301 PERF_HEADER *PerfHeader;
302 PERF_DATA *PerfData;
303 UINT64 Ticker;
304 UINTN Index;
305 EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;
306 UINTN VarSize;
307 UINTN LogEntryKey;
308 CONST VOID *Handle;
309 CONST CHAR8 *Token;
310 CONST CHAR8 *Module;
311 UINT64 StartTicker;
312 UINT64 EndTicker;
313 UINT64 StartValue;
314 UINT64 EndValue;
315 BOOLEAN CountUp;
316 UINT64 Freq;
317
318 //
319 // Retrieve time stamp count as early as possible
320 //
321 Ticker = GetPerformanceCounter ();
322
323 Freq = GetPerformanceCounterProperties (&StartValue, &EndValue);
324
325 Freq = DivU64x32 (Freq, 1000);
326
327 Status = PeiServicesLocatePpi (
328 &gEfiPeiReadOnlyVariable2PpiGuid,
329 0,
330 NULL,
331 (VOID **) &VariableServices
332 );
333 if (EFI_ERROR (Status)) {
334 return;
335 }
336
337 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
338 Status = VariableServices->GetVariable (
339 VariableServices,
340 L"PerfDataMemAddr",
341 &gPerformanceProtocolGuid,
342 NULL,
343 &VarSize,
344 &mAcpiLowMemoryBase
345 );
346 if (EFI_ERROR (Status)) {
347 DEBUG ((EFI_D_ERROR, "Fail to retrieve variable to log S3 performance data \n"));
348 return;
349 }
350
351 PerfHeader = (PERF_HEADER *) (UINTN) mAcpiLowMemoryBase;
352
353 if (PerfHeader->Signiture != PERFORMANCE_SIGNATURE) {
354 DEBUG ((EFI_D_ERROR, "Performance data in ACPI memory get corrupted! \n"));
355 return;
356 }
357
358 //
359 // Record total S3 resume time.
360 //
361 if (EndValue >= StartValue) {
362 PerfHeader->S3Resume = Ticker - StartValue;
363 CountUp = TRUE;
364 } else {
365 PerfHeader->S3Resume = StartValue - Ticker;
366 CountUp = FALSE;
367 }
368
369 //
370 // Get S3 detailed performance data
371 //
372 Index = 0;
373 LogEntryKey = 0;
374 while ((LogEntryKey = GetPerformanceMeasurement (
375 LogEntryKey,
376 &Handle,
377 &Token,
378 &Module,
379 &StartTicker,
380 &EndTicker)) != 0) {
381 if (EndTicker != 0) {
382 PerfData = &PerfHeader->S3Entry[Index];
383
384 //
385 // Use File Handle to specify the different performance log for PEIM.
386 // File Handle is the base address of PEIM FFS file.
387 //
388 if ((AsciiStrnCmp (Token, "PEIM", PEI_PERFORMANCE_STRING_SIZE) == 0) && (Handle != NULL)) {
389 AsciiSPrint (PerfData->Token, PERF_TOKEN_LENGTH, "0x%11p", Handle);
390 } else {
391 AsciiStrnCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);
392 }
393 if (StartTicker == 1) {
394 StartTicker = StartValue;
395 }
396 if (EndTicker == 1) {
397 EndTicker = StartValue;
398 }
399 Ticker = CountUp? (EndTicker - StartTicker) : (StartTicker - EndTicker);
400 PerfData->Duration = (UINT32) DivU64x32 (Ticker, (UINT32) Freq);
401
402 //
403 // Only Record > 1ms performance data so that more big performance can be recorded.
404 //
405 if ((Ticker > Freq) && (++Index >= PERF_PEI_ENTRY_MAX_NUM)) {
406 //
407 // Reach the maximum number of PEI performance log entries.
408 //
409 break;
410 }
411 }
412 }
413 PerfHeader->S3EntryNum = (UINT32) Index;
414 }
415
416 /**
417 The function will check if current waking vector is long mode.
418
419 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
420
421 @retval TRUE Current context need long mode waking vector.
422 @retval FALSE Current context need not long mode waking vector.
423 **/
424 BOOLEAN
425 IsLongModeWakingVector (
426 IN ACPI_S3_CONTEXT *AcpiS3Context
427 )
428 {
429 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
430
431 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
432 if ((Facs == NULL) ||
433 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
434 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
435 // Something wrong with FACS
436 return FALSE;
437 }
438 if (Facs->XFirmwareWakingVector != 0) {
439 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
440 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
441 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
442 // Both BIOS and OS wants 64bit vector
443 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
444 return TRUE;
445 }
446 }
447 }
448 return FALSE;
449 }
450
451 /**
452 Send EndOfS3Resume event to SmmCore through communication buffer way.
453
454 @retval EFI_SUCCESS Return send the event success.
455 **/
456 EFI_STATUS
457 SignalEndOfS3Resume (
458 VOID
459 )
460 {
461 EFI_STATUS Status;
462 EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;
463 UINTN CommSize;
464 SMM_COMMUNICATE_HEADER_32 Header32;
465 SMM_COMMUNICATE_HEADER_64 Header64;
466 VOID *CommBuffer;
467
468 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Enter\n"));
469
470 //
471 // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.
472 // Detect whether DXE is 64 bits mode.
473 // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.
474 // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), Dxe will switch to 64 bits.
475 //
476 if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {
477 CommBuffer = &Header64;
478 Header64.MessageLength = 0;
479 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);
480 } else {
481 CommBuffer = &Header32;
482 Header32.MessageLength = 0;
483 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);
484 }
485 CopyGuid (CommBuffer, &gEdkiiSmmEndOfS3ResumeProtocolGuid);
486
487 Status = PeiServicesLocatePpi (
488 &gEfiPeiSmmCommunicationPpiGuid,
489 0,
490 NULL,
491 (VOID **)&SmmCommunicationPpi
492 );
493 if (EFI_ERROR (Status)) {
494 DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));
495 return Status;
496 }
497
498 Status = SmmCommunicationPpi->Communicate (
499 SmmCommunicationPpi,
500 (VOID *)CommBuffer,
501 &CommSize
502 );
503 if (EFI_ERROR (Status)) {
504 DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));
505 }
506
507 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Exit (%r)\n", Status));
508 return Status;
509 }
510
511 /**
512 Jump to OS waking vector.
513 The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.
514
515 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
516 @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE
517 **/
518 VOID
519 EFIAPI
520 S3ResumeBootOs (
521 IN ACPI_S3_CONTEXT *AcpiS3Context,
522 IN PEI_S3_RESUME_STATE *PeiS3ResumeState
523 )
524 {
525 EFI_STATUS Status;
526 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
527 ASM_TRANSFER_CONTROL AsmTransferControl;
528 UINTN TempStackTop;
529 UINTN TempStack[0x10];
530
531 //
532 // Restore IDT
533 //
534 AsmWriteIdtr (&PeiS3ResumeState->Idtr);
535
536 if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {
537 //
538 // Report Status code that boot script execution is failed
539 //
540 REPORT_STATUS_CODE (
541 EFI_ERROR_CODE | EFI_ERROR_MINOR,
542 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
543 );
544 }
545
546 //
547 // NOTE: Because Debug Timer interrupt and system interrupts will be disabled
548 // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted
549 // by soft debugger.
550 //
551
552 PERF_END (NULL, "ScriptExec", NULL, 0);
553
554 //
555 // Install BootScriptDonePpi
556 //
557 Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);
558 ASSERT_EFI_ERROR (Status);
559
560 //
561 // Get ACPI Table Address
562 //
563 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
564
565 if ((Facs == NULL) ||
566 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
567 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
568 //
569 // Report Status code that no valid vector is found
570 //
571 REPORT_STATUS_CODE (
572 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
573 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
574 );
575 CpuDeadLoop ();
576 return ;
577 }
578
579 //
580 // Install EndOfPeiPpi
581 //
582 Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);
583 ASSERT_EFI_ERROR (Status);
584
585 //
586 // Signal EndOfS3Resume event.
587 //
588 SignalEndOfS3Resume ();
589
590 //
591 // report status code on S3 resume
592 //
593 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);
594
595 PERF_CODE (
596 WriteToOsS3PerformanceData ();
597 );
598
599 AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;
600 if (Facs->XFirmwareWakingVector != 0) {
601 //
602 // Switch to native waking vector
603 //
604 TempStackTop = (UINTN)&TempStack + sizeof(TempStack);
605 DEBUG ((
606 DEBUG_INFO,
607 "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",
608 __FUNCTION__,
609 TempStackTop,
610 sizeof (TempStack)
611 ));
612 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
613 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
614 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
615 //
616 // X64 long mode waking vector
617 //
618 DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
619 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
620 AsmEnablePaging64 (
621 0x38,
622 Facs->XFirmwareWakingVector,
623 0,
624 0,
625 (UINT64)(UINTN)TempStackTop
626 );
627 } else {
628 //
629 // Report Status code that no valid waking vector is found
630 //
631 REPORT_STATUS_CODE (
632 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
633 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
634 );
635 DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));
636 ASSERT (FALSE);
637 CpuDeadLoop ();
638 return ;
639 }
640 } else {
641 //
642 // IA32 protected mode waking vector (Page disabled)
643 //
644 DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
645 SwitchStack (
646 (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,
647 NULL,
648 NULL,
649 (VOID *)(UINTN)TempStackTop
650 );
651 }
652 } else {
653 //
654 // 16bit Realmode waking vector
655 //
656 DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
657 AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
658 }
659
660 //
661 // Report Status code the failure of S3Resume
662 //
663 REPORT_STATUS_CODE (
664 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
665 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
666 );
667
668 //
669 // Never run to here
670 //
671 CpuDeadLoop();
672 }
673
674 /**
675 Restore S3 page table because we do not trust ACPINvs content.
676 If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.
677
678 @param S3NvsPageTableAddress PageTableAddress in ACPINvs
679 @param Build4GPageTableOnly If BIOS just build 4G page table only
680 **/
681 VOID
682 RestoreS3PageTables (
683 IN UINTN S3NvsPageTableAddress,
684 IN BOOLEAN Build4GPageTableOnly
685 )
686 {
687 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
688 UINT32 RegEax;
689 UINT32 RegEdx;
690 UINT8 PhysicalAddressBits;
691 EFI_PHYSICAL_ADDRESS PageAddress;
692 UINTN IndexOfPml4Entries;
693 UINTN IndexOfPdpEntries;
694 UINTN IndexOfPageDirectoryEntries;
695 UINT32 NumberOfPml4EntriesNeeded;
696 UINT32 NumberOfPdpEntriesNeeded;
697 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
698 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
699 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
700 PAGE_TABLE_ENTRY *PageDirectoryEntry;
701 VOID *Hob;
702 BOOLEAN Page1GSupport;
703 PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
704 UINT64 AddressEncMask;
705
706 //
707 // Make sure AddressEncMask is contained to smallest supported address field
708 //
709 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
710
711 //
712 // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.
713 // The whole page table is too large to be saved in SMRAM.
714 //
715 // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.
716 //
717 DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));
718
719 //
720 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
721 //
722 PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
723 S3NvsPageTableAddress += SIZE_4KB;
724
725 Page1GSupport = FALSE;
726 if (PcdGetBool(PcdUse1GPageTable)) {
727 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
728 if (RegEax >= 0x80000001) {
729 AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
730 if ((RegEdx & BIT26) != 0) {
731 Page1GSupport = TRUE;
732 }
733 }
734 }
735
736 //
737 // Get physical address bits supported.
738 //
739 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
740 if (Hob != NULL) {
741 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
742 } else {
743 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
744 if (RegEax >= 0x80000008) {
745 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
746 PhysicalAddressBits = (UINT8) RegEax;
747 } else {
748 PhysicalAddressBits = 36;
749 }
750 }
751
752 //
753 // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
754 //
755 ASSERT (PhysicalAddressBits <= 52);
756 if (PhysicalAddressBits > 48) {
757 PhysicalAddressBits = 48;
758 }
759
760 //
761 // NOTE: In order to save time to create full page table, we just create 4G page table by default.
762 // And let PF handler in BootScript driver to create more on request.
763 //
764 if (Build4GPageTableOnly) {
765 PhysicalAddressBits = 32;
766 ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));
767 }
768 //
769 // Calculate the table entries needed.
770 //
771 if (PhysicalAddressBits <= 39) {
772 NumberOfPml4EntriesNeeded = 1;
773 NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
774 } else {
775 NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));
776 NumberOfPdpEntriesNeeded = 512;
777 }
778
779 PageMapLevel4Entry = PageMap;
780 PageAddress = 0;
781 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
782 //
783 // Each PML4 entry points to a page of Page Directory Pointer entires.
784 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
785 //
786 PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
787 S3NvsPageTableAddress += SIZE_4KB;
788
789 //
790 // Make a PML4 Entry
791 //
792 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
793 PageMapLevel4Entry->Bits.ReadWrite = 1;
794 PageMapLevel4Entry->Bits.Present = 1;
795
796 if (Page1GSupport) {
797 PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
798
799 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
800 //
801 // Fill in the Page Directory entries
802 //
803 PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
804 PageDirectory1GEntry->Bits.ReadWrite = 1;
805 PageDirectory1GEntry->Bits.Present = 1;
806 PageDirectory1GEntry->Bits.MustBe1 = 1;
807 }
808 } else {
809 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
810 //
811 // Each Directory Pointer entries points to a page of Page Directory entires.
812 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
813 //
814 PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;
815 S3NvsPageTableAddress += SIZE_4KB;
816
817 //
818 // Fill in a Page Directory Pointer Entries
819 //
820 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
821 PageDirectoryPointerEntry->Bits.ReadWrite = 1;
822 PageDirectoryPointerEntry->Bits.Present = 1;
823
824 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
825 //
826 // Fill in the Page Directory entries
827 //
828 PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
829 PageDirectoryEntry->Bits.ReadWrite = 1;
830 PageDirectoryEntry->Bits.Present = 1;
831 PageDirectoryEntry->Bits.MustBe1 = 1;
832 }
833 }
834 }
835 }
836 return ;
837 } else {
838 //
839 // If DXE is running 32-bit mode, no need to establish page table.
840 //
841 return ;
842 }
843 }
844
845 /**
846 Jump to boot script executor driver.
847
848 The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.
849
850 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
851 @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in
852 boot script execute driver
853 **/
854 VOID
855 EFIAPI
856 S3ResumeExecuteBootScript (
857 IN ACPI_S3_CONTEXT *AcpiS3Context,
858 IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable
859 )
860 {
861 EFI_STATUS Status;
862 PEI_SMM_ACCESS_PPI *SmmAccess;
863 UINTN Index;
864 VOID *GuidHob;
865 IA32_DESCRIPTOR *IdtDescriptor;
866 VOID *IdtBuffer;
867 PEI_S3_RESUME_STATE *PeiS3ResumeState;
868 BOOLEAN InterruptStatus;
869
870 DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));
871
872 //
873 // Attempt to use content from SMRAM first
874 //
875 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
876 if (GuidHob != NULL) {
877 //
878 // Last step for SMM - send SMI for initialization
879 //
880
881 //
882 // Send SMI to APs
883 //
884 SendSmiIpiAllExcludingSelf ();
885 //
886 // Send SMI to BSP
887 //
888 SendSmiIpi (GetApicId ());
889
890 Status = PeiServicesLocatePpi (
891 &gPeiSmmAccessPpiGuid,
892 0,
893 NULL,
894 (VOID **) &SmmAccess
895 );
896 if (!EFI_ERROR (Status)) {
897 DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));
898
899 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
900 Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
901 }
902
903 DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));
904
905 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
906 Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
907 }
908 }
909 }
910
911 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
912 AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);
913 }
914
915 if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
916 //
917 // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices
918 // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)).
919 //
920 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
921 //
922 // Make sure the newly allocated IDT align with 16-bytes
923 //
924 IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));
925 if (IdtBuffer == NULL) {
926 REPORT_STATUS_CODE (
927 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
928 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
929 );
930 ASSERT (FALSE);
931 }
932 //
933 // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer
934 // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code
935 //
936 ZeroMem (IdtBuffer, 16);
937 AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);
938 CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));
939 IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);
940 *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();
941 }
942
943 InterruptStatus = SaveAndDisableInterrupts ();
944 //
945 // Need to make sure the GDT is loaded with values that support long mode and real mode.
946 //
947 AsmWriteGdtr (&mGdt);
948 //
949 // update segment selectors per the new GDT.
950 //
951 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
952 //
953 // Restore interrupt state.
954 //
955 SetInterruptState (InterruptStatus);
956
957 //
958 // Prepare data for return back
959 //
960 PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));
961 if (PeiS3ResumeState == NULL) {
962 REPORT_STATUS_CODE (
963 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
964 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
965 );
966 ASSERT (FALSE);
967 }
968 DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));
969 PeiS3ResumeState->ReturnCs = 0x10;
970 PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;
971 PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
972 //
973 // Save IDT
974 //
975 AsmReadIdtr (&PeiS3ResumeState->Idtr);
976
977 //
978 // Report Status Code to indicate S3 boot script execution
979 //
980 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);
981
982 PERF_START (NULL, "ScriptExec", NULL, 0);
983
984 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
985 //
986 // X64 S3 Resume
987 //
988 DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));
989
990 //
991 // Switch to long mode to complete resume.
992 //
993 AsmEnablePaging64 (
994 0x38,
995 EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
996 (UINT64)(UINTN)AcpiS3Context,
997 (UINT64)(UINTN)PeiS3ResumeState,
998 (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
999 );
1000 } else {
1001 //
1002 // IA32 S3 Resume
1003 //
1004 DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));
1005 SwitchStack (
1006 (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
1007 (VOID *)AcpiS3Context,
1008 (VOID *)PeiS3ResumeState,
1009 (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
1010 );
1011 }
1012
1013 //
1014 // Never run to here
1015 //
1016 CpuDeadLoop();
1017 }
1018 /**
1019 Restores the platform to its preboot configuration for an S3 resume and
1020 jumps to the OS waking vector.
1021
1022 This function will restore the platform to its pre-boot configuration that was
1023 pre-stored in the boot script table and transfer control to OS waking vector.
1024 Upon invocation, this function is responsible for locating the following
1025 information before jumping to OS waking vector:
1026 - ACPI tables
1027 - boot script table
1028 - any other information that it needs
1029
1030 The S3RestoreConfig() function then executes the pre-stored boot script table
1031 and transitions the platform to the pre-boot state. The boot script is recorded
1032 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
1033 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
1034 transfers control to the OS waking vector. If the OS supports only a real-mode
1035 waking vector, this function will switch from flat mode to real mode before
1036 jumping to the waking vector. If all platform pre-boot configurations are
1037 successfully restored and all other necessary information is ready, this
1038 function will never return and instead will directly jump to the OS waking
1039 vector. If this function returns, it indicates that the attempt to resume
1040 from the ACPI S3 sleep state failed.
1041
1042 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
1043
1044 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
1045 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
1046 resume boot path could not be located.
1047
1048 **/
1049 EFI_STATUS
1050 EFIAPI
1051 S3RestoreConfig2 (
1052 IN EFI_PEI_S3_RESUME2_PPI *This
1053 )
1054 {
1055 EFI_STATUS Status;
1056 PEI_SMM_ACCESS_PPI *SmmAccess;
1057 UINTN Index;
1058 ACPI_S3_CONTEXT *AcpiS3Context;
1059 EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;
1060 EFI_PHYSICAL_ADDRESS TempAcpiS3Context;
1061 BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;
1062 UINTN VarSize;
1063 EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
1064 SMM_S3_RESUME_STATE *SmmS3ResumeState;
1065 VOID *GuidHob;
1066 BOOLEAN Build4GPageTableOnly;
1067 BOOLEAN InterruptStatus;
1068
1069 TempAcpiS3Context = 0;
1070 TempEfiBootScriptExecutorVariable = 0;
1071
1072 DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));
1073
1074 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
1075 Status = RestoreLockBox (
1076 &gEfiAcpiVariableGuid,
1077 &TempAcpiS3Context,
1078 &VarSize
1079 );
1080 ASSERT_EFI_ERROR (Status);
1081
1082 Status = RestoreLockBox (
1083 &gEfiAcpiS3ContextGuid,
1084 NULL,
1085 NULL
1086 );
1087 ASSERT_EFI_ERROR (Status);
1088
1089 AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;
1090 ASSERT (AcpiS3Context != NULL);
1091
1092 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
1093 Status = RestoreLockBox (
1094 &gEfiBootScriptExecutorVariableGuid,
1095 &TempEfiBootScriptExecutorVariable,
1096 &VarSize
1097 );
1098 ASSERT_EFI_ERROR (Status);
1099
1100 Status = RestoreLockBox (
1101 &gEfiBootScriptExecutorContextGuid,
1102 NULL,
1103 NULL
1104 );
1105 ASSERT_EFI_ERROR (Status);
1106
1107 EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;
1108 ASSERT (EfiBootScriptExecutorVariable != NULL);
1109
1110 DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));
1111 DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));
1112 DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));
1113 DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));
1114 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));
1115 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));
1116 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));
1117 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));
1118 DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));
1119
1120 //
1121 // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.
1122 // Script dispatch image and context (parameter) are handled by platform.
1123 // We just use restore all lock box in place, no need restore one by one.
1124 //
1125 Status = RestoreAllLockBoxInPlace ();
1126 ASSERT_EFI_ERROR (Status);
1127 if (EFI_ERROR (Status)) {
1128 // Something wrong
1129 CpuDeadLoop ();
1130 }
1131
1132 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
1133 //
1134 // Need reconstruct page table here, since we do not trust ACPINvs.
1135 //
1136 if (IsLongModeWakingVector (AcpiS3Context)) {
1137 Build4GPageTableOnly = FALSE;
1138 } else {
1139 Build4GPageTableOnly = TRUE;
1140 }
1141 RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);
1142 }
1143
1144 //
1145 // Attempt to use content from SMRAM first
1146 //
1147 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
1148 if (GuidHob != NULL) {
1149 Status = PeiServicesLocatePpi (
1150 &gPeiSmmAccessPpiGuid,
1151 0,
1152 NULL,
1153 (VOID **) &SmmAccess
1154 );
1155 for (Index = 0; !EFI_ERROR (Status); Index++) {
1156 Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
1157 }
1158
1159 SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
1160 SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;
1161
1162 SmmS3ResumeState->ReturnCs = AsmReadCs ();
1163 SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;
1164 SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;
1165 SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;
1166 SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
1167
1168 DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));
1169 DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));
1170 DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));
1171 DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));
1172 DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));
1173 DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));
1174 DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));
1175 DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
1176 DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
1177 DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
1178 DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
1179 DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
1180 DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));
1181
1182 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
1183 SwitchStack (
1184 (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,
1185 (VOID *)AcpiS3Context,
1186 0,
1187 (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)
1188 );
1189 }
1190 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
1191 //
1192 // Switch to long mode to complete resume.
1193 //
1194
1195 InterruptStatus = SaveAndDisableInterrupts ();
1196 //
1197 // Need to make sure the GDT is loaded with values that support long mode and real mode.
1198 //
1199 AsmWriteGdtr (&mGdt);
1200 //
1201 // update segment selectors per the new GDT.
1202 //
1203 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
1204 //
1205 // Restore interrupt state.
1206 //
1207 SetInterruptState (InterruptStatus);
1208
1209 AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
1210
1211 //
1212 // Disable interrupt of Debug timer, since IDT table cannot work in long mode.
1213 // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,
1214 // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.
1215 //
1216 SaveAndSetDebugTimerInterrupt (FALSE);
1217
1218 AsmEnablePaging64 (
1219 0x38,
1220 SmmS3ResumeState->SmmS3ResumeEntryPoint,
1221 (UINT64)(UINTN)AcpiS3Context,
1222 0,
1223 SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize
1224 );
1225 }
1226
1227 }
1228
1229 S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );
1230 return EFI_SUCCESS;
1231 }
1232 /**
1233 Main entry for S3 Resume PEIM.
1234
1235 This routine is to install EFI_PEI_S3_RESUME2_PPI.
1236
1237 @param FileHandle Handle of the file being invoked.
1238 @param PeiServices Pointer to PEI Services table.
1239
1240 @retval EFI_SUCCESS S3Resume Ppi is installed successfully.
1241
1242 **/
1243 EFI_STATUS
1244 EFIAPI
1245 PeimS3ResumeEntryPoint (
1246 IN EFI_PEI_FILE_HANDLE FileHandle,
1247 IN CONST EFI_PEI_SERVICES **PeiServices
1248 )
1249 {
1250 EFI_STATUS Status;
1251
1252 //
1253 // Install S3 Resume Ppi
1254 //
1255 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);
1256 ASSERT_EFI_ERROR (Status);
1257
1258 return EFI_SUCCESS;
1259 }
1260