]> git.proxmox.com Git - mirror_edk2.git/blob - UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
UefiCpuPkg S3ResumePei: Signal S3SmmInitDone
[mirror_edk2.git] / UefiCpuPkg / Universal / Acpi / S3Resume2Pei / S3Resume.c
1 /** @file
2 This module produces the EFI_PEI_S3_RESUME2_PPI.
3 This module works with StandAloneBootScriptExecutor to S3 resume to OS.
4 This module will execute the boot script saved during last boot and after that,
5 control is passed to OS waking up handler.
6
7 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
8 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
9
10 This program and the accompanying materials
11 are licensed and made available under the terms and conditions
12 of the BSD License which accompanies this distribution. The
13 full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 **/
20
21 #include <PiPei.h>
22
23 #include <Guid/AcpiS3Context.h>
24 #include <Guid/BootScriptExecutorVariable.h>
25 #include <Guid/ExtendedFirmwarePerformance.h>
26 #include <Guid/EndOfS3Resume.h>
27 #include <Guid/S3SmmInitDone.h>
28 #include <Ppi/ReadOnlyVariable2.h>
29 #include <Ppi/S3Resume2.h>
30 #include <Ppi/SmmAccess.h>
31 #include <Ppi/PostBootScriptTable.h>
32 #include <Ppi/EndOfPeiPhase.h>
33 #include <Ppi/SmmCommunication.h>
34
35 #include <Library/DebugLib.h>
36 #include <Library/BaseLib.h>
37 #include <Library/TimerLib.h>
38 #include <Library/PeimEntryPoint.h>
39 #include <Library/PeiServicesLib.h>
40 #include <Library/HobLib.h>
41 #include <Library/PerformanceLib.h>
42 #include <Library/PeiServicesTablePointerLib.h>
43 #include <Library/IoLib.h>
44 #include <Library/BaseMemoryLib.h>
45 #include <Library/MemoryAllocationLib.h>
46 #include <Library/PcdLib.h>
47 #include <Library/DebugAgentLib.h>
48 #include <Library/LocalApicLib.h>
49 #include <Library/ReportStatusCodeLib.h>
50 #include <Library/PrintLib.h>
51 #include <Library/HobLib.h>
52 #include <Library/LockBoxLib.h>
53 #include <IndustryStandard/Acpi.h>
54
55 /**
56 This macro aligns the address of a variable with auto storage
57 duration down to CPU_STACK_ALIGNMENT.
58
59 Since the stack grows downward, the result preserves more of the
60 stack than the original address (or the same amount), not less.
61 **/
62 #define STACK_ALIGN_DOWN(Ptr) \
63 ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))
64
65 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
66
67 #pragma pack(1)
68 typedef union {
69 struct {
70 UINT32 LimitLow : 16;
71 UINT32 BaseLow : 16;
72 UINT32 BaseMid : 8;
73 UINT32 Type : 4;
74 UINT32 System : 1;
75 UINT32 Dpl : 2;
76 UINT32 Present : 1;
77 UINT32 LimitHigh : 4;
78 UINT32 Software : 1;
79 UINT32 Reserved : 1;
80 UINT32 DefaultSize : 1;
81 UINT32 Granularity : 1;
82 UINT32 BaseHigh : 8;
83 } Bits;
84 UINT64 Uint64;
85 } IA32_GDT;
86
87 //
88 // Page-Map Level-4 Offset (PML4) and
89 // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
90 //
91 typedef union {
92 struct {
93 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
94 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
95 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
96 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
97 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
98 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
99 UINT64 Reserved:1; // Reserved
100 UINT64 MustBeZero:2; // Must Be Zero
101 UINT64 Available:3; // Available for use by system software
102 UINT64 PageTableBaseAddress:40; // Page Table Base Address
103 UINT64 AvabilableHigh:11; // Available for use by system software
104 UINT64 Nx:1; // No Execute bit
105 } Bits;
106 UINT64 Uint64;
107 } PAGE_MAP_AND_DIRECTORY_POINTER;
108
109 //
110 // Page Table Entry 2MB
111 //
112 typedef union {
113 struct {
114 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
115 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
116 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
117 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
118 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
119 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
120 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
121 UINT64 MustBe1:1; // Must be 1
122 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
123 UINT64 Available:3; // Available for use by system software
124 UINT64 PAT:1; //
125 UINT64 MustBeZero:8; // Must be zero;
126 UINT64 PageTableBaseAddress:31; // Page Table Base Address
127 UINT64 AvabilableHigh:11; // Available for use by system software
128 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
129 } Bits;
130 UINT64 Uint64;
131 } PAGE_TABLE_ENTRY;
132
133 //
134 // Page Table Entry 1GB
135 //
136 typedef union {
137 struct {
138 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
139 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
140 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
141 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
142 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
143 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
144 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
145 UINT64 MustBe1:1; // Must be 1
146 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
147 UINT64 Available:3; // Available for use by system software
148 UINT64 PAT:1; //
149 UINT64 MustBeZero:17; // Must be zero;
150 UINT64 PageTableBaseAddress:22; // Page Table Base Address
151 UINT64 AvabilableHigh:11; // Available for use by system software
152 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
153 } Bits;
154 UINT64 Uint64;
155 } PAGE_TABLE_1G_ENTRY;
156
157 //
158 // Define two type of smm communicate headers.
159 // One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.
160 //
161 typedef struct {
162 EFI_GUID HeaderGuid;
163 UINT32 MessageLength;
164 UINT8 Data[1];
165 } SMM_COMMUNICATE_HEADER_32;
166
167 typedef struct {
168 EFI_GUID HeaderGuid;
169 UINT64 MessageLength;
170 UINT8 Data[1];
171 } SMM_COMMUNICATE_HEADER_64;
172
173 #pragma pack()
174
175 //
176 // Function prototypes
177 //
178 /**
179 a ASM function to transfer control to OS.
180
181 @param S3WakingVector The S3 waking up vector saved in ACPI Facs table
182 @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer
183 **/
184 typedef
185 VOID
186 (EFIAPI *ASM_TRANSFER_CONTROL) (
187 IN UINT32 S3WakingVector,
188 IN UINT32 AcpiLowMemoryBase
189 );
190
191 /**
192 Restores the platform to its preboot configuration for an S3 resume and
193 jumps to the OS waking vector.
194
195 This function will restore the platform to its pre-boot configuration that was
196 pre-stored in the boot script table and transfer control to OS waking vector.
197 Upon invocation, this function is responsible for locating the following
198 information before jumping to OS waking vector:
199 - ACPI tables
200 - boot script table
201 - any other information that it needs
202
203 The S3RestoreConfig() function then executes the pre-stored boot script table
204 and transitions the platform to the pre-boot state. The boot script is recorded
205 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
206 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
207 transfers control to the OS waking vector. If the OS supports only a real-mode
208 waking vector, this function will switch from flat mode to real mode before
209 jumping to the waking vector. If all platform pre-boot configurations are
210 successfully restored and all other necessary information is ready, this
211 function will never return and instead will directly jump to the OS waking
212 vector. If this function returns, it indicates that the attempt to resume
213 from the ACPI S3 sleep state failed.
214
215 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
216
217 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
218 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
219 resume boot path could not be located.
220
221 **/
222 EFI_STATUS
223 EFIAPI
224 S3RestoreConfig2 (
225 IN EFI_PEI_S3_RESUME2_PPI *This
226 );
227
228 /**
229 Set data segment selectors value including DS/ES/FS/GS/SS.
230
231 @param[in] SelectorValue Segment selector value to be set.
232
233 **/
234 VOID
235 EFIAPI
236 AsmSetDataSelectors (
237 IN UINT16 SelectorValue
238 );
239
240 //
241 // Globals
242 //
243 EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };
244
245 EFI_PEI_PPI_DESCRIPTOR mPpiList = {
246 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
247 &gEfiPeiS3Resume2PpiGuid,
248 &mS3ResumePpi
249 };
250
251 EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {
252 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
253 &gPeiPostScriptTablePpiGuid,
254 0
255 };
256
257 EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {
258 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
259 &gEfiEndOfPeiSignalPpiGuid,
260 0
261 };
262
263 EFI_PEI_PPI_DESCRIPTOR mPpiListS3SmmInitDoneTable = {
264 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
265 &gEdkiiS3SmmInitDoneGuid,
266 0
267 };
268
269 //
270 // Global Descriptor Table (GDT)
271 //
272 GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
273 /* selector { Global Segment Descriptor } */
274 /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
275 /* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
276 /* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
277 /* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
278 /* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
279 /* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
280 /* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
281 /* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},
282 /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
283 };
284
285 #define DATA_SEGEMENT_SELECTOR 0x18
286
287 //
288 // IA32 Gdt register
289 //
290 GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {
291 sizeof (mGdtEntries) - 1,
292 (UINTN) mGdtEntries
293 };
294
295
296 /**
297 The function will check if current waking vector is long mode.
298
299 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
300
301 @retval TRUE Current context need long mode waking vector.
302 @retval FALSE Current context need not long mode waking vector.
303 **/
304 BOOLEAN
305 IsLongModeWakingVector (
306 IN ACPI_S3_CONTEXT *AcpiS3Context
307 )
308 {
309 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
310
311 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
312 if ((Facs == NULL) ||
313 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
314 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
315 // Something wrong with FACS
316 return FALSE;
317 }
318 if (Facs->XFirmwareWakingVector != 0) {
319 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
320 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
321 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
322 // Both BIOS and OS wants 64bit vector
323 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
324 return TRUE;
325 }
326 }
327 }
328 return FALSE;
329 }
330
331 /**
332 Signal to SMM through communication buffer way.
333
334 @param[in] HandlerType SMI handler type to be signaled.
335
336 **/
337 VOID
338 SignalToSmmByCommunication (
339 IN EFI_GUID *HandlerType
340 )
341 {
342 EFI_STATUS Status;
343 EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;
344 UINTN CommSize;
345 SMM_COMMUNICATE_HEADER_32 Header32;
346 SMM_COMMUNICATE_HEADER_64 Header64;
347 VOID *CommBuffer;
348
349 DEBUG ((DEBUG_INFO, "Signal %g to SMM - Enter\n", HandlerType));
350
351 //
352 // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.
353 // Detect whether DXE is 64 bits mode.
354 // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.
355 // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), DXE will switch to 64 bits.
356 //
357 if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {
358 CommBuffer = &Header64;
359 Header64.MessageLength = 0;
360 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);
361 } else {
362 CommBuffer = &Header32;
363 Header32.MessageLength = 0;
364 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);
365 }
366 CopyGuid (CommBuffer, HandlerType);
367
368 Status = PeiServicesLocatePpi (
369 &gEfiPeiSmmCommunicationPpiGuid,
370 0,
371 NULL,
372 (VOID **)&SmmCommunicationPpi
373 );
374 if (EFI_ERROR (Status)) {
375 DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));
376 return;
377 }
378
379 Status = SmmCommunicationPpi->Communicate (
380 SmmCommunicationPpi,
381 (VOID *)CommBuffer,
382 &CommSize
383 );
384 if (EFI_ERROR (Status)) {
385 DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));
386 }
387
388 DEBUG ((DEBUG_INFO, "Signal %g to SMM - Exit (%r)\n", HandlerType, Status));
389 return;
390 }
391
392 /**
393 Jump to OS waking vector.
394 The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.
395
396 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
397 @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE
398 **/
399 VOID
400 EFIAPI
401 S3ResumeBootOs (
402 IN ACPI_S3_CONTEXT *AcpiS3Context,
403 IN PEI_S3_RESUME_STATE *PeiS3ResumeState
404 )
405 {
406 EFI_STATUS Status;
407 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
408 ASM_TRANSFER_CONTROL AsmTransferControl;
409 UINTN TempStackTop;
410 UINTN TempStack[0x10];
411
412 //
413 // Restore IDT
414 //
415 AsmWriteIdtr (&PeiS3ResumeState->Idtr);
416
417 if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {
418 //
419 // Report Status code that boot script execution is failed
420 //
421 REPORT_STATUS_CODE (
422 EFI_ERROR_CODE | EFI_ERROR_MINOR,
423 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
424 );
425 }
426
427 //
428 // NOTE: Because Debug Timer interrupt and system interrupts will be disabled
429 // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted
430 // by soft debugger.
431 //
432
433 PERF_END (NULL, "ScriptExec", NULL, 0);
434
435 //
436 // Install BootScriptDonePpi
437 //
438 PERF_START_EX (NULL, "BootScriptDonePpi", NULL, 0, PERF_INMODULE_START_ID);
439
440 Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);
441 ASSERT_EFI_ERROR (Status);
442
443 PERF_END_EX (NULL, "BootScriptDonePpi", NULL, 0, PERF_INMODULE_END_ID);
444
445 //
446 // Get ACPI Table Address
447 //
448 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
449
450 if ((Facs == NULL) ||
451 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
452 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
453 //
454 // Report Status code that no valid vector is found
455 //
456 REPORT_STATUS_CODE (
457 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
458 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
459 );
460 CpuDeadLoop ();
461 return ;
462 }
463
464 //
465 // Install EndOfPeiPpi
466 //
467 PERF_START_EX (NULL, "EndOfPeiPpi", NULL, 0, PERF_INMODULE_START_ID);
468
469 Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);
470 ASSERT_EFI_ERROR (Status);
471
472 PERF_END_EX (NULL, "EndOfPeiPpi", NULL, 0, PERF_INMODULE_END_ID);
473
474 PERF_START_EX (NULL, "EndOfS3Resume", NULL, 0, PERF_INMODULE_START_ID);
475
476 DEBUG ((DEBUG_INFO, "Signal EndOfS3Resume\n"));
477 //
478 // Signal EndOfS3Resume to SMM.
479 //
480 SignalToSmmByCommunication (&gEdkiiEndOfS3ResumeGuid);
481
482 PERF_END_EX (NULL, "EndOfS3Resume", NULL, 0, PERF_INMODULE_END_ID);
483
484 //
485 // report status code on S3 resume
486 //
487 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);
488
489 AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;
490 if (Facs->XFirmwareWakingVector != 0) {
491 //
492 // Switch to native waking vector
493 //
494 TempStackTop = (UINTN)&TempStack + sizeof(TempStack);
495 DEBUG ((
496 DEBUG_INFO,
497 "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",
498 __FUNCTION__,
499 TempStackTop,
500 sizeof (TempStack)
501 ));
502 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
503 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
504 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
505 //
506 // X64 long mode waking vector
507 //
508 DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
509 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
510 AsmEnablePaging64 (
511 0x38,
512 Facs->XFirmwareWakingVector,
513 0,
514 0,
515 (UINT64)(UINTN)TempStackTop
516 );
517 } else {
518 //
519 // Report Status code that no valid waking vector is found
520 //
521 REPORT_STATUS_CODE (
522 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
523 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
524 );
525 DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));
526 ASSERT (FALSE);
527 CpuDeadLoop ();
528 return ;
529 }
530 } else {
531 //
532 // IA32 protected mode waking vector (Page disabled)
533 //
534 DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
535 SwitchStack (
536 (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,
537 NULL,
538 NULL,
539 (VOID *)(UINTN)TempStackTop
540 );
541 }
542 } else {
543 //
544 // 16bit Realmode waking vector
545 //
546 DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
547 AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
548 }
549
550 //
551 // Report Status code the failure of S3Resume
552 //
553 REPORT_STATUS_CODE (
554 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
555 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
556 );
557
558 //
559 // Never run to here
560 //
561 CpuDeadLoop();
562 }
563
564 /**
565 Restore S3 page table because we do not trust ACPINvs content.
566 If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.
567
568 @param S3NvsPageTableAddress PageTableAddress in ACPINvs
569 @param Build4GPageTableOnly If BIOS just build 4G page table only
570 **/
571 VOID
572 RestoreS3PageTables (
573 IN UINTN S3NvsPageTableAddress,
574 IN BOOLEAN Build4GPageTableOnly
575 )
576 {
577 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
578 UINT32 RegEax;
579 UINT32 RegEdx;
580 UINT8 PhysicalAddressBits;
581 EFI_PHYSICAL_ADDRESS PageAddress;
582 UINTN IndexOfPml4Entries;
583 UINTN IndexOfPdpEntries;
584 UINTN IndexOfPageDirectoryEntries;
585 UINT32 NumberOfPml4EntriesNeeded;
586 UINT32 NumberOfPdpEntriesNeeded;
587 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
588 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
589 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
590 PAGE_TABLE_ENTRY *PageDirectoryEntry;
591 VOID *Hob;
592 BOOLEAN Page1GSupport;
593 PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
594 UINT64 AddressEncMask;
595
596 //
597 // Make sure AddressEncMask is contained to smallest supported address field
598 //
599 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
600
601 //
602 // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.
603 // The whole page table is too large to be saved in SMRAM.
604 //
605 // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.
606 //
607 DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));
608
609 //
610 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
611 //
612 PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
613 S3NvsPageTableAddress += SIZE_4KB;
614
615 Page1GSupport = FALSE;
616 if (PcdGetBool(PcdUse1GPageTable)) {
617 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
618 if (RegEax >= 0x80000001) {
619 AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
620 if ((RegEdx & BIT26) != 0) {
621 Page1GSupport = TRUE;
622 }
623 }
624 }
625
626 //
627 // Get physical address bits supported.
628 //
629 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
630 if (Hob != NULL) {
631 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
632 } else {
633 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
634 if (RegEax >= 0x80000008) {
635 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
636 PhysicalAddressBits = (UINT8) RegEax;
637 } else {
638 PhysicalAddressBits = 36;
639 }
640 }
641
642 //
643 // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
644 //
645 ASSERT (PhysicalAddressBits <= 52);
646 if (PhysicalAddressBits > 48) {
647 PhysicalAddressBits = 48;
648 }
649
650 //
651 // NOTE: In order to save time to create full page table, we just create 4G page table by default.
652 // And let PF handler in BootScript driver to create more on request.
653 //
654 if (Build4GPageTableOnly) {
655 PhysicalAddressBits = 32;
656 ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));
657 }
658 //
659 // Calculate the table entries needed.
660 //
661 if (PhysicalAddressBits <= 39) {
662 NumberOfPml4EntriesNeeded = 1;
663 NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
664 } else {
665 NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));
666 NumberOfPdpEntriesNeeded = 512;
667 }
668
669 PageMapLevel4Entry = PageMap;
670 PageAddress = 0;
671 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
672 //
673 // Each PML4 entry points to a page of Page Directory Pointer entires.
674 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
675 //
676 PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
677 S3NvsPageTableAddress += SIZE_4KB;
678
679 //
680 // Make a PML4 Entry
681 //
682 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
683 PageMapLevel4Entry->Bits.ReadWrite = 1;
684 PageMapLevel4Entry->Bits.Present = 1;
685
686 if (Page1GSupport) {
687 PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
688
689 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
690 //
691 // Fill in the Page Directory entries
692 //
693 PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
694 PageDirectory1GEntry->Bits.ReadWrite = 1;
695 PageDirectory1GEntry->Bits.Present = 1;
696 PageDirectory1GEntry->Bits.MustBe1 = 1;
697 }
698 } else {
699 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
700 //
701 // Each Directory Pointer entries points to a page of Page Directory entires.
702 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
703 //
704 PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;
705 S3NvsPageTableAddress += SIZE_4KB;
706
707 //
708 // Fill in a Page Directory Pointer Entries
709 //
710 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
711 PageDirectoryPointerEntry->Bits.ReadWrite = 1;
712 PageDirectoryPointerEntry->Bits.Present = 1;
713
714 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
715 //
716 // Fill in the Page Directory entries
717 //
718 PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
719 PageDirectoryEntry->Bits.ReadWrite = 1;
720 PageDirectoryEntry->Bits.Present = 1;
721 PageDirectoryEntry->Bits.MustBe1 = 1;
722 }
723 }
724 }
725 }
726 return ;
727 } else {
728 //
729 // If DXE is running 32-bit mode, no need to establish page table.
730 //
731 return ;
732 }
733 }
734
735 /**
736 Jump to boot script executor driver.
737
738 The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.
739
740 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
741 @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in
742 boot script execute driver
743 **/
744 VOID
745 EFIAPI
746 S3ResumeExecuteBootScript (
747 IN ACPI_S3_CONTEXT *AcpiS3Context,
748 IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable
749 )
750 {
751 EFI_STATUS Status;
752 PEI_SMM_ACCESS_PPI *SmmAccess;
753 UINTN Index;
754 VOID *GuidHob;
755 IA32_DESCRIPTOR *IdtDescriptor;
756 VOID *IdtBuffer;
757 PEI_S3_RESUME_STATE *PeiS3ResumeState;
758 BOOLEAN InterruptStatus;
759
760 DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));
761
762 //
763 // Attempt to use content from SMRAM first
764 //
765 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
766 if (GuidHob != NULL) {
767 //
768 // Last step for SMM - send SMI for initialization
769 //
770
771 //
772 // Send SMI to APs
773 //
774 SendSmiIpiAllExcludingSelf ();
775 //
776 // Send SMI to BSP
777 //
778 SendSmiIpi (GetApicId ());
779
780 Status = PeiServicesLocatePpi (
781 &gPeiSmmAccessPpiGuid,
782 0,
783 NULL,
784 (VOID **) &SmmAccess
785 );
786 if (!EFI_ERROR (Status)) {
787 DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));
788
789 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
790 Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
791 }
792
793 DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));
794
795 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
796 Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
797 }
798 }
799
800 DEBUG ((DEBUG_INFO, "Signal S3SmmInitDone\n"));
801 //
802 // Install S3SmmInitDone PPI.
803 //
804 Status = PeiServicesInstallPpi (&mPpiListS3SmmInitDoneTable);
805 ASSERT_EFI_ERROR (Status);
806 //
807 // Signal S3SmmInitDone to SMM.
808 //
809 SignalToSmmByCommunication (&gEdkiiS3SmmInitDoneGuid);
810 }
811
812 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
813 AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);
814 }
815
816 if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
817 //
818 // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices
819 // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)).
820 //
821 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
822 //
823 // Make sure the newly allocated IDT align with 16-bytes
824 //
825 IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));
826 if (IdtBuffer == NULL) {
827 REPORT_STATUS_CODE (
828 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
829 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
830 );
831 ASSERT (FALSE);
832 }
833 //
834 // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer
835 // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code
836 //
837 ZeroMem (IdtBuffer, 16);
838 AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);
839 CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));
840 IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);
841 *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();
842 }
843
844 InterruptStatus = SaveAndDisableInterrupts ();
845 //
846 // Need to make sure the GDT is loaded with values that support long mode and real mode.
847 //
848 AsmWriteGdtr (&mGdt);
849 //
850 // update segment selectors per the new GDT.
851 //
852 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
853 //
854 // Restore interrupt state.
855 //
856 SetInterruptState (InterruptStatus);
857
858 //
859 // Prepare data for return back
860 //
861 PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));
862 if (PeiS3ResumeState == NULL) {
863 REPORT_STATUS_CODE (
864 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
865 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
866 );
867 ASSERT (FALSE);
868 }
869 DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));
870 PeiS3ResumeState->ReturnCs = 0x10;
871 PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;
872 PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
873 //
874 // Save IDT
875 //
876 AsmReadIdtr (&PeiS3ResumeState->Idtr);
877
878 //
879 // Report Status Code to indicate S3 boot script execution
880 //
881 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);
882
883 PERF_START (NULL, "ScriptExec", NULL, 0);
884
885 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
886 //
887 // X64 S3 Resume
888 //
889 DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));
890
891 //
892 // Switch to long mode to complete resume.
893 //
894 AsmEnablePaging64 (
895 0x38,
896 EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
897 (UINT64)(UINTN)AcpiS3Context,
898 (UINT64)(UINTN)PeiS3ResumeState,
899 (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
900 );
901 } else {
902 //
903 // IA32 S3 Resume
904 //
905 DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));
906 SwitchStack (
907 (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
908 (VOID *)AcpiS3Context,
909 (VOID *)PeiS3ResumeState,
910 (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
911 );
912 }
913
914 //
915 // Never run to here
916 //
917 CpuDeadLoop();
918 }
919 /**
920 Restores the platform to its preboot configuration for an S3 resume and
921 jumps to the OS waking vector.
922
923 This function will restore the platform to its pre-boot configuration that was
924 pre-stored in the boot script table and transfer control to OS waking vector.
925 Upon invocation, this function is responsible for locating the following
926 information before jumping to OS waking vector:
927 - ACPI tables
928 - boot script table
929 - any other information that it needs
930
931 The S3RestoreConfig() function then executes the pre-stored boot script table
932 and transitions the platform to the pre-boot state. The boot script is recorded
933 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
934 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
935 transfers control to the OS waking vector. If the OS supports only a real-mode
936 waking vector, this function will switch from flat mode to real mode before
937 jumping to the waking vector. If all platform pre-boot configurations are
938 successfully restored and all other necessary information is ready, this
939 function will never return and instead will directly jump to the OS waking
940 vector. If this function returns, it indicates that the attempt to resume
941 from the ACPI S3 sleep state failed.
942
943 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
944
945 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
946 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
947 resume boot path could not be located.
948
949 **/
950 EFI_STATUS
951 EFIAPI
952 S3RestoreConfig2 (
953 IN EFI_PEI_S3_RESUME2_PPI *This
954 )
955 {
956 EFI_STATUS Status;
957 PEI_SMM_ACCESS_PPI *SmmAccess;
958 UINTN Index;
959 ACPI_S3_CONTEXT *AcpiS3Context;
960 EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;
961 EFI_PHYSICAL_ADDRESS TempAcpiS3Context;
962 BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;
963 UINTN VarSize;
964 EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
965 SMM_S3_RESUME_STATE *SmmS3ResumeState;
966 VOID *GuidHob;
967 BOOLEAN Build4GPageTableOnly;
968 BOOLEAN InterruptStatus;
969
970 TempAcpiS3Context = 0;
971 TempEfiBootScriptExecutorVariable = 0;
972
973 DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));
974
975 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
976 Status = RestoreLockBox (
977 &gEfiAcpiVariableGuid,
978 &TempAcpiS3Context,
979 &VarSize
980 );
981 ASSERT_EFI_ERROR (Status);
982
983 Status = RestoreLockBox (
984 &gEfiAcpiS3ContextGuid,
985 NULL,
986 NULL
987 );
988 ASSERT_EFI_ERROR (Status);
989
990 AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;
991 ASSERT (AcpiS3Context != NULL);
992
993 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
994 Status = RestoreLockBox (
995 &gEfiBootScriptExecutorVariableGuid,
996 &TempEfiBootScriptExecutorVariable,
997 &VarSize
998 );
999 ASSERT_EFI_ERROR (Status);
1000
1001 Status = RestoreLockBox (
1002 &gEfiBootScriptExecutorContextGuid,
1003 NULL,
1004 NULL
1005 );
1006 ASSERT_EFI_ERROR (Status);
1007
1008 EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;
1009 ASSERT (EfiBootScriptExecutorVariable != NULL);
1010
1011 DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));
1012 DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));
1013 DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));
1014 DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));
1015 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));
1016 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));
1017 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));
1018 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));
1019 DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));
1020
1021 //
1022 // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.
1023 // Script dispatch image and context (parameter) are handled by platform.
1024 // We just use restore all lock box in place, no need restore one by one.
1025 //
1026 Status = RestoreAllLockBoxInPlace ();
1027 ASSERT_EFI_ERROR (Status);
1028 if (EFI_ERROR (Status)) {
1029 // Something wrong
1030 CpuDeadLoop ();
1031 }
1032
1033 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
1034 //
1035 // Need reconstruct page table here, since we do not trust ACPINvs.
1036 //
1037 if (IsLongModeWakingVector (AcpiS3Context)) {
1038 Build4GPageTableOnly = FALSE;
1039 } else {
1040 Build4GPageTableOnly = TRUE;
1041 }
1042 RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);
1043 }
1044
1045 //
1046 // Attempt to use content from SMRAM first
1047 //
1048 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
1049 if (GuidHob != NULL) {
1050 Status = PeiServicesLocatePpi (
1051 &gPeiSmmAccessPpiGuid,
1052 0,
1053 NULL,
1054 (VOID **) &SmmAccess
1055 );
1056 for (Index = 0; !EFI_ERROR (Status); Index++) {
1057 Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
1058 }
1059
1060 SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
1061 SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;
1062
1063 SmmS3ResumeState->ReturnCs = AsmReadCs ();
1064 SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;
1065 SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;
1066 SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;
1067 SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
1068
1069 DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));
1070 DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));
1071 DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));
1072 DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));
1073 DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));
1074 DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));
1075 DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));
1076 DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
1077 DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
1078 DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
1079 DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
1080 DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
1081 DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));
1082
1083 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
1084 SwitchStack (
1085 (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,
1086 (VOID *)AcpiS3Context,
1087 0,
1088 (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)
1089 );
1090 }
1091 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
1092 //
1093 // Switch to long mode to complete resume.
1094 //
1095
1096 InterruptStatus = SaveAndDisableInterrupts ();
1097 //
1098 // Need to make sure the GDT is loaded with values that support long mode and real mode.
1099 //
1100 AsmWriteGdtr (&mGdt);
1101 //
1102 // update segment selectors per the new GDT.
1103 //
1104 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
1105 //
1106 // Restore interrupt state.
1107 //
1108 SetInterruptState (InterruptStatus);
1109
1110 AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
1111
1112 //
1113 // Disable interrupt of Debug timer, since IDT table cannot work in long mode.
1114 // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,
1115 // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.
1116 //
1117 SaveAndSetDebugTimerInterrupt (FALSE);
1118
1119 AsmEnablePaging64 (
1120 0x38,
1121 SmmS3ResumeState->SmmS3ResumeEntryPoint,
1122 (UINT64)(UINTN)AcpiS3Context,
1123 0,
1124 SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize
1125 );
1126 }
1127
1128 }
1129
1130 S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );
1131 return EFI_SUCCESS;
1132 }
1133 /**
1134 Main entry for S3 Resume PEIM.
1135
1136 This routine is to install EFI_PEI_S3_RESUME2_PPI.
1137
1138 @param FileHandle Handle of the file being invoked.
1139 @param PeiServices Pointer to PEI Services table.
1140
1141 @retval EFI_SUCCESS S3Resume Ppi is installed successfully.
1142
1143 **/
1144 EFI_STATUS
1145 EFIAPI
1146 PeimS3ResumeEntryPoint (
1147 IN EFI_PEI_FILE_HANDLE FileHandle,
1148 IN CONST EFI_PEI_SERVICES **PeiServices
1149 )
1150 {
1151 EFI_STATUS Status;
1152
1153 //
1154 // Install S3 Resume Ppi
1155 //
1156 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);
1157 ASSERT_EFI_ERROR (Status);
1158
1159 return EFI_SUCCESS;
1160 }
1161