]> git.proxmox.com Git - mirror_edk2.git/blob - UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
MdeModulePkg: Rename SmmEndOfS3ResumeProtocolGuid to EndOfS3ResumeGuid
[mirror_edk2.git] / UefiCpuPkg / Universal / Acpi / S3Resume2Pei / S3Resume.c
1 /** @file
2 This module produces the EFI_PEI_S3_RESUME2_PPI.
3 This module works with StandAloneBootScriptExecutor to S3 resume to OS.
4 This module will execute the boot script saved during last boot and after that,
5 control is passed to OS waking up handler.
6
7 Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
8 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
9
10 This program and the accompanying materials
11 are licensed and made available under the terms and conditions
12 of the BSD License which accompanies this distribution. The
13 full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 **/
20
21 #include <PiPei.h>
22
23 #include <Guid/AcpiS3Context.h>
24 #include <Guid/BootScriptExecutorVariable.h>
25 #include <Guid/Performance.h>
26 #include <Guid/EndOfS3Resume.h>
27 #include <Ppi/ReadOnlyVariable2.h>
28 #include <Ppi/S3Resume2.h>
29 #include <Ppi/SmmAccess.h>
30 #include <Ppi/PostBootScriptTable.h>
31 #include <Ppi/EndOfPeiPhase.h>
32 #include <Ppi/SmmCommunication.h>
33
34 #include <Library/DebugLib.h>
35 #include <Library/BaseLib.h>
36 #include <Library/TimerLib.h>
37 #include <Library/PeimEntryPoint.h>
38 #include <Library/PeiServicesLib.h>
39 #include <Library/HobLib.h>
40 #include <Library/PerformanceLib.h>
41 #include <Library/PeiServicesTablePointerLib.h>
42 #include <Library/IoLib.h>
43 #include <Library/BaseMemoryLib.h>
44 #include <Library/MemoryAllocationLib.h>
45 #include <Library/PcdLib.h>
46 #include <Library/DebugAgentLib.h>
47 #include <Library/LocalApicLib.h>
48 #include <Library/ReportStatusCodeLib.h>
49 #include <Library/PrintLib.h>
50 #include <Library/HobLib.h>
51 #include <Library/LockBoxLib.h>
52 #include <IndustryStandard/Acpi.h>
53
54 /**
55 This macro aligns the address of a variable with auto storage
56 duration down to CPU_STACK_ALIGNMENT.
57
58 Since the stack grows downward, the result preserves more of the
59 stack than the original address (or the same amount), not less.
60 **/
61 #define STACK_ALIGN_DOWN(Ptr) \
62 ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))
63
64 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
65
66 #pragma pack(1)
67 typedef union {
68 struct {
69 UINT32 LimitLow : 16;
70 UINT32 BaseLow : 16;
71 UINT32 BaseMid : 8;
72 UINT32 Type : 4;
73 UINT32 System : 1;
74 UINT32 Dpl : 2;
75 UINT32 Present : 1;
76 UINT32 LimitHigh : 4;
77 UINT32 Software : 1;
78 UINT32 Reserved : 1;
79 UINT32 DefaultSize : 1;
80 UINT32 Granularity : 1;
81 UINT32 BaseHigh : 8;
82 } Bits;
83 UINT64 Uint64;
84 } IA32_GDT;
85
86 //
87 // Page-Map Level-4 Offset (PML4) and
88 // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
89 //
90 typedef union {
91 struct {
92 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
93 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
94 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
95 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
96 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
97 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
98 UINT64 Reserved:1; // Reserved
99 UINT64 MustBeZero:2; // Must Be Zero
100 UINT64 Available:3; // Available for use by system software
101 UINT64 PageTableBaseAddress:40; // Page Table Base Address
102 UINT64 AvabilableHigh:11; // Available for use by system software
103 UINT64 Nx:1; // No Execute bit
104 } Bits;
105 UINT64 Uint64;
106 } PAGE_MAP_AND_DIRECTORY_POINTER;
107
108 //
109 // Page Table Entry 2MB
110 //
111 typedef union {
112 struct {
113 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
114 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
115 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
116 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
117 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
118 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
119 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
120 UINT64 MustBe1:1; // Must be 1
121 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
122 UINT64 Available:3; // Available for use by system software
123 UINT64 PAT:1; //
124 UINT64 MustBeZero:8; // Must be zero;
125 UINT64 PageTableBaseAddress:31; // Page Table Base Address
126 UINT64 AvabilableHigh:11; // Available for use by system software
127 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
128 } Bits;
129 UINT64 Uint64;
130 } PAGE_TABLE_ENTRY;
131
132 //
133 // Page Table Entry 1GB
134 //
135 typedef union {
136 struct {
137 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
138 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
139 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
140 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
141 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
142 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
143 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
144 UINT64 MustBe1:1; // Must be 1
145 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
146 UINT64 Available:3; // Available for use by system software
147 UINT64 PAT:1; //
148 UINT64 MustBeZero:17; // Must be zero;
149 UINT64 PageTableBaseAddress:22; // Page Table Base Address
150 UINT64 AvabilableHigh:11; // Available for use by system software
151 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
152 } Bits;
153 UINT64 Uint64;
154 } PAGE_TABLE_1G_ENTRY;
155
156 //
157 // Define two type of smm communicate headers.
158 // One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.
159 //
160 typedef struct {
161 EFI_GUID HeaderGuid;
162 UINT32 MessageLength;
163 UINT8 Data[1];
164 } SMM_COMMUNICATE_HEADER_32;
165
166 typedef struct {
167 EFI_GUID HeaderGuid;
168 UINT64 MessageLength;
169 UINT8 Data[1];
170 } SMM_COMMUNICATE_HEADER_64;
171
172 #pragma pack()
173
174 //
175 // Function prototypes
176 //
177 /**
178 a ASM function to transfer control to OS.
179
180 @param S3WakingVector The S3 waking up vector saved in ACPI Facs table
181 @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer
182 **/
183 typedef
184 VOID
185 (EFIAPI *ASM_TRANSFER_CONTROL) (
186 IN UINT32 S3WakingVector,
187 IN UINT32 AcpiLowMemoryBase
188 );
189
190 /**
191 Restores the platform to its preboot configuration for an S3 resume and
192 jumps to the OS waking vector.
193
194 This function will restore the platform to its pre-boot configuration that was
195 pre-stored in the boot script table and transfer control to OS waking vector.
196 Upon invocation, this function is responsible for locating the following
197 information before jumping to OS waking vector:
198 - ACPI tables
199 - boot script table
200 - any other information that it needs
201
202 The S3RestoreConfig() function then executes the pre-stored boot script table
203 and transitions the platform to the pre-boot state. The boot script is recorded
204 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
205 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
206 transfers control to the OS waking vector. If the OS supports only a real-mode
207 waking vector, this function will switch from flat mode to real mode before
208 jumping to the waking vector. If all platform pre-boot configurations are
209 successfully restored and all other necessary information is ready, this
210 function will never return and instead will directly jump to the OS waking
211 vector. If this function returns, it indicates that the attempt to resume
212 from the ACPI S3 sleep state failed.
213
214 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
215
216 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
217 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
218 resume boot path could not be located.
219
220 **/
221 EFI_STATUS
222 EFIAPI
223 S3RestoreConfig2 (
224 IN EFI_PEI_S3_RESUME2_PPI *This
225 );
226
227 /**
228 Set data segment selectors value including DS/ES/FS/GS/SS.
229
230 @param[in] SelectorValue Segment selector value to be set.
231
232 **/
233 VOID
234 EFIAPI
235 AsmSetDataSelectors (
236 IN UINT16 SelectorValue
237 );
238
239 //
240 // Globals
241 //
242 EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };
243
244 EFI_PEI_PPI_DESCRIPTOR mPpiList = {
245 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
246 &gEfiPeiS3Resume2PpiGuid,
247 &mS3ResumePpi
248 };
249
250 EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {
251 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
252 &gPeiPostScriptTablePpiGuid,
253 0
254 };
255
256 EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {
257 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
258 &gEfiEndOfPeiSignalPpiGuid,
259 0
260 };
261
262 //
263 // Global Descriptor Table (GDT)
264 //
265 GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
266 /* selector { Global Segment Descriptor } */
267 /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
268 /* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
269 /* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
270 /* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
271 /* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
272 /* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
273 /* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
274 /* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},
275 /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
276 };
277
278 #define DATA_SEGEMENT_SELECTOR 0x18
279
280 //
281 // IA32 Gdt register
282 //
283 GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {
284 sizeof (mGdtEntries) - 1,
285 (UINTN) mGdtEntries
286 };
287
288 /**
289 Performance measure function to get S3 detailed performance data.
290
291 This function will getS3 detailed performance data and saved in pre-reserved ACPI memory.
292 **/
293 VOID
294 WriteToOsS3PerformanceData (
295 VOID
296 )
297 {
298 EFI_STATUS Status;
299 EFI_PHYSICAL_ADDRESS mAcpiLowMemoryBase;
300 PERF_HEADER *PerfHeader;
301 PERF_DATA *PerfData;
302 UINT64 Ticker;
303 UINTN Index;
304 EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;
305 UINTN VarSize;
306 UINTN LogEntryKey;
307 CONST VOID *Handle;
308 CONST CHAR8 *Token;
309 CONST CHAR8 *Module;
310 UINT64 StartTicker;
311 UINT64 EndTicker;
312 UINT64 StartValue;
313 UINT64 EndValue;
314 BOOLEAN CountUp;
315 UINT64 Freq;
316
317 //
318 // Retrieve time stamp count as early as possible
319 //
320 Ticker = GetPerformanceCounter ();
321
322 Freq = GetPerformanceCounterProperties (&StartValue, &EndValue);
323
324 Freq = DivU64x32 (Freq, 1000);
325
326 Status = PeiServicesLocatePpi (
327 &gEfiPeiReadOnlyVariable2PpiGuid,
328 0,
329 NULL,
330 (VOID **) &VariableServices
331 );
332 if (EFI_ERROR (Status)) {
333 return;
334 }
335
336 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
337 Status = VariableServices->GetVariable (
338 VariableServices,
339 L"PerfDataMemAddr",
340 &gPerformanceProtocolGuid,
341 NULL,
342 &VarSize,
343 &mAcpiLowMemoryBase
344 );
345 if (EFI_ERROR (Status)) {
346 DEBUG ((EFI_D_ERROR, "Fail to retrieve variable to log S3 performance data \n"));
347 return;
348 }
349
350 PerfHeader = (PERF_HEADER *) (UINTN) mAcpiLowMemoryBase;
351
352 if (PerfHeader->Signiture != PERFORMANCE_SIGNATURE) {
353 DEBUG ((EFI_D_ERROR, "Performance data in ACPI memory get corrupted! \n"));
354 return;
355 }
356
357 //
358 // Record total S3 resume time.
359 //
360 if (EndValue >= StartValue) {
361 PerfHeader->S3Resume = Ticker - StartValue;
362 CountUp = TRUE;
363 } else {
364 PerfHeader->S3Resume = StartValue - Ticker;
365 CountUp = FALSE;
366 }
367
368 //
369 // Get S3 detailed performance data
370 //
371 Index = 0;
372 LogEntryKey = 0;
373 while ((LogEntryKey = GetPerformanceMeasurement (
374 LogEntryKey,
375 &Handle,
376 &Token,
377 &Module,
378 &StartTicker,
379 &EndTicker)) != 0) {
380 if (EndTicker != 0) {
381 PerfData = &PerfHeader->S3Entry[Index];
382
383 //
384 // Use File Handle to specify the different performance log for PEIM.
385 // File Handle is the base address of PEIM FFS file.
386 //
387 if ((AsciiStrnCmp (Token, "PEIM", PEI_PERFORMANCE_STRING_SIZE) == 0) && (Handle != NULL)) {
388 AsciiSPrint (PerfData->Token, PERF_TOKEN_LENGTH, "0x%11p", Handle);
389 } else {
390 AsciiStrnCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);
391 }
392 if (StartTicker == 1) {
393 StartTicker = StartValue;
394 }
395 if (EndTicker == 1) {
396 EndTicker = StartValue;
397 }
398 Ticker = CountUp? (EndTicker - StartTicker) : (StartTicker - EndTicker);
399 PerfData->Duration = (UINT32) DivU64x32 (Ticker, (UINT32) Freq);
400
401 //
402 // Only Record > 1ms performance data so that more big performance can be recorded.
403 //
404 if ((Ticker > Freq) && (++Index >= PERF_PEI_ENTRY_MAX_NUM)) {
405 //
406 // Reach the maximum number of PEI performance log entries.
407 //
408 break;
409 }
410 }
411 }
412 PerfHeader->S3EntryNum = (UINT32) Index;
413 }
414
415 /**
416 The function will check if current waking vector is long mode.
417
418 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
419
420 @retval TRUE Current context need long mode waking vector.
421 @retval FALSE Current context need not long mode waking vector.
422 **/
423 BOOLEAN
424 IsLongModeWakingVector (
425 IN ACPI_S3_CONTEXT *AcpiS3Context
426 )
427 {
428 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
429
430 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
431 if ((Facs == NULL) ||
432 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
433 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
434 // Something wrong with FACS
435 return FALSE;
436 }
437 if (Facs->XFirmwareWakingVector != 0) {
438 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
439 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
440 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
441 // Both BIOS and OS wants 64bit vector
442 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
443 return TRUE;
444 }
445 }
446 }
447 return FALSE;
448 }
449
450 /**
451 Send EndOfS3Resume event to SmmCore through communication buffer way.
452
453 @retval EFI_SUCCESS Return send the event success.
454 **/
455 EFI_STATUS
456 SignalEndOfS3Resume (
457 VOID
458 )
459 {
460 EFI_STATUS Status;
461 EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;
462 UINTN CommSize;
463 SMM_COMMUNICATE_HEADER_32 Header32;
464 SMM_COMMUNICATE_HEADER_64 Header64;
465 VOID *CommBuffer;
466
467 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Enter\n"));
468
469 //
470 // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.
471 // Detect whether DXE is 64 bits mode.
472 // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.
473 // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), DXE will switch to 64 bits.
474 //
475 if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {
476 CommBuffer = &Header64;
477 Header64.MessageLength = 0;
478 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);
479 } else {
480 CommBuffer = &Header32;
481 Header32.MessageLength = 0;
482 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);
483 }
484 CopyGuid (CommBuffer, &gEdkiiEndOfS3ResumeGuid);
485
486 Status = PeiServicesLocatePpi (
487 &gEfiPeiSmmCommunicationPpiGuid,
488 0,
489 NULL,
490 (VOID **)&SmmCommunicationPpi
491 );
492 if (EFI_ERROR (Status)) {
493 DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));
494 return Status;
495 }
496
497 Status = SmmCommunicationPpi->Communicate (
498 SmmCommunicationPpi,
499 (VOID *)CommBuffer,
500 &CommSize
501 );
502 if (EFI_ERROR (Status)) {
503 DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));
504 }
505
506 DEBUG ((DEBUG_INFO, "SignalEndOfS3Resume - Exit (%r)\n", Status));
507 return Status;
508 }
509
510 /**
511 Jump to OS waking vector.
512 The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.
513
514 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
515 @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE
516 **/
517 VOID
518 EFIAPI
519 S3ResumeBootOs (
520 IN ACPI_S3_CONTEXT *AcpiS3Context,
521 IN PEI_S3_RESUME_STATE *PeiS3ResumeState
522 )
523 {
524 EFI_STATUS Status;
525 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
526 ASM_TRANSFER_CONTROL AsmTransferControl;
527 UINTN TempStackTop;
528 UINTN TempStack[0x10];
529
530 //
531 // Restore IDT
532 //
533 AsmWriteIdtr (&PeiS3ResumeState->Idtr);
534
535 if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {
536 //
537 // Report Status code that boot script execution is failed
538 //
539 REPORT_STATUS_CODE (
540 EFI_ERROR_CODE | EFI_ERROR_MINOR,
541 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
542 );
543 }
544
545 //
546 // NOTE: Because Debug Timer interrupt and system interrupts will be disabled
547 // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted
548 // by soft debugger.
549 //
550
551 PERF_END (NULL, "ScriptExec", NULL, 0);
552
553 //
554 // Install BootScriptDonePpi
555 //
556 Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);
557 ASSERT_EFI_ERROR (Status);
558
559 //
560 // Get ACPI Table Address
561 //
562 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
563
564 if ((Facs == NULL) ||
565 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
566 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
567 //
568 // Report Status code that no valid vector is found
569 //
570 REPORT_STATUS_CODE (
571 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
572 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
573 );
574 CpuDeadLoop ();
575 return ;
576 }
577
578 //
579 // Install EndOfPeiPpi
580 //
581 Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);
582 ASSERT_EFI_ERROR (Status);
583
584 //
585 // Signal EndOfS3Resume event.
586 //
587 SignalEndOfS3Resume ();
588
589 //
590 // report status code on S3 resume
591 //
592 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);
593
594 PERF_CODE (
595 WriteToOsS3PerformanceData ();
596 );
597
598 AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;
599 if (Facs->XFirmwareWakingVector != 0) {
600 //
601 // Switch to native waking vector
602 //
603 TempStackTop = (UINTN)&TempStack + sizeof(TempStack);
604 DEBUG ((
605 DEBUG_INFO,
606 "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",
607 __FUNCTION__,
608 TempStackTop,
609 sizeof (TempStack)
610 ));
611 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
612 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
613 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
614 //
615 // X64 long mode waking vector
616 //
617 DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
618 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
619 AsmEnablePaging64 (
620 0x38,
621 Facs->XFirmwareWakingVector,
622 0,
623 0,
624 (UINT64)(UINTN)TempStackTop
625 );
626 } else {
627 //
628 // Report Status code that no valid waking vector is found
629 //
630 REPORT_STATUS_CODE (
631 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
632 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
633 );
634 DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));
635 ASSERT (FALSE);
636 CpuDeadLoop ();
637 return ;
638 }
639 } else {
640 //
641 // IA32 protected mode waking vector (Page disabled)
642 //
643 DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
644 SwitchStack (
645 (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,
646 NULL,
647 NULL,
648 (VOID *)(UINTN)TempStackTop
649 );
650 }
651 } else {
652 //
653 // 16bit Realmode waking vector
654 //
655 DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
656 AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
657 }
658
659 //
660 // Report Status code the failure of S3Resume
661 //
662 REPORT_STATUS_CODE (
663 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
664 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
665 );
666
667 //
668 // Never run to here
669 //
670 CpuDeadLoop();
671 }
672
673 /**
674 Restore S3 page table because we do not trust ACPINvs content.
675 If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.
676
677 @param S3NvsPageTableAddress PageTableAddress in ACPINvs
678 @param Build4GPageTableOnly If BIOS just build 4G page table only
679 **/
680 VOID
681 RestoreS3PageTables (
682 IN UINTN S3NvsPageTableAddress,
683 IN BOOLEAN Build4GPageTableOnly
684 )
685 {
686 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
687 UINT32 RegEax;
688 UINT32 RegEdx;
689 UINT8 PhysicalAddressBits;
690 EFI_PHYSICAL_ADDRESS PageAddress;
691 UINTN IndexOfPml4Entries;
692 UINTN IndexOfPdpEntries;
693 UINTN IndexOfPageDirectoryEntries;
694 UINT32 NumberOfPml4EntriesNeeded;
695 UINT32 NumberOfPdpEntriesNeeded;
696 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
697 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
698 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
699 PAGE_TABLE_ENTRY *PageDirectoryEntry;
700 VOID *Hob;
701 BOOLEAN Page1GSupport;
702 PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
703 UINT64 AddressEncMask;
704
705 //
706 // Make sure AddressEncMask is contained to smallest supported address field
707 //
708 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
709
710 //
711 // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.
712 // The whole page table is too large to be saved in SMRAM.
713 //
714 // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.
715 //
716 DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));
717
718 //
719 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
720 //
721 PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
722 S3NvsPageTableAddress += SIZE_4KB;
723
724 Page1GSupport = FALSE;
725 if (PcdGetBool(PcdUse1GPageTable)) {
726 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
727 if (RegEax >= 0x80000001) {
728 AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
729 if ((RegEdx & BIT26) != 0) {
730 Page1GSupport = TRUE;
731 }
732 }
733 }
734
735 //
736 // Get physical address bits supported.
737 //
738 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
739 if (Hob != NULL) {
740 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
741 } else {
742 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
743 if (RegEax >= 0x80000008) {
744 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
745 PhysicalAddressBits = (UINT8) RegEax;
746 } else {
747 PhysicalAddressBits = 36;
748 }
749 }
750
751 //
752 // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
753 //
754 ASSERT (PhysicalAddressBits <= 52);
755 if (PhysicalAddressBits > 48) {
756 PhysicalAddressBits = 48;
757 }
758
759 //
760 // NOTE: In order to save time to create full page table, we just create 4G page table by default.
761 // And let PF handler in BootScript driver to create more on request.
762 //
763 if (Build4GPageTableOnly) {
764 PhysicalAddressBits = 32;
765 ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));
766 }
767 //
768 // Calculate the table entries needed.
769 //
770 if (PhysicalAddressBits <= 39) {
771 NumberOfPml4EntriesNeeded = 1;
772 NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
773 } else {
774 NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));
775 NumberOfPdpEntriesNeeded = 512;
776 }
777
778 PageMapLevel4Entry = PageMap;
779 PageAddress = 0;
780 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
781 //
782 // Each PML4 entry points to a page of Page Directory Pointer entires.
783 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
784 //
785 PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
786 S3NvsPageTableAddress += SIZE_4KB;
787
788 //
789 // Make a PML4 Entry
790 //
791 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
792 PageMapLevel4Entry->Bits.ReadWrite = 1;
793 PageMapLevel4Entry->Bits.Present = 1;
794
795 if (Page1GSupport) {
796 PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
797
798 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
799 //
800 // Fill in the Page Directory entries
801 //
802 PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
803 PageDirectory1GEntry->Bits.ReadWrite = 1;
804 PageDirectory1GEntry->Bits.Present = 1;
805 PageDirectory1GEntry->Bits.MustBe1 = 1;
806 }
807 } else {
808 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
809 //
810 // Each Directory Pointer entries points to a page of Page Directory entires.
811 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
812 //
813 PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;
814 S3NvsPageTableAddress += SIZE_4KB;
815
816 //
817 // Fill in a Page Directory Pointer Entries
818 //
819 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
820 PageDirectoryPointerEntry->Bits.ReadWrite = 1;
821 PageDirectoryPointerEntry->Bits.Present = 1;
822
823 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
824 //
825 // Fill in the Page Directory entries
826 //
827 PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
828 PageDirectoryEntry->Bits.ReadWrite = 1;
829 PageDirectoryEntry->Bits.Present = 1;
830 PageDirectoryEntry->Bits.MustBe1 = 1;
831 }
832 }
833 }
834 }
835 return ;
836 } else {
837 //
838 // If DXE is running 32-bit mode, no need to establish page table.
839 //
840 return ;
841 }
842 }
843
844 /**
845 Jump to boot script executor driver.
846
847 The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.
848
849 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
850 @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in
851 boot script execute driver
852 **/
853 VOID
854 EFIAPI
855 S3ResumeExecuteBootScript (
856 IN ACPI_S3_CONTEXT *AcpiS3Context,
857 IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable
858 )
859 {
860 EFI_STATUS Status;
861 PEI_SMM_ACCESS_PPI *SmmAccess;
862 UINTN Index;
863 VOID *GuidHob;
864 IA32_DESCRIPTOR *IdtDescriptor;
865 VOID *IdtBuffer;
866 PEI_S3_RESUME_STATE *PeiS3ResumeState;
867 BOOLEAN InterruptStatus;
868
869 DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));
870
871 //
872 // Attempt to use content from SMRAM first
873 //
874 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
875 if (GuidHob != NULL) {
876 //
877 // Last step for SMM - send SMI for initialization
878 //
879
880 //
881 // Send SMI to APs
882 //
883 SendSmiIpiAllExcludingSelf ();
884 //
885 // Send SMI to BSP
886 //
887 SendSmiIpi (GetApicId ());
888
889 Status = PeiServicesLocatePpi (
890 &gPeiSmmAccessPpiGuid,
891 0,
892 NULL,
893 (VOID **) &SmmAccess
894 );
895 if (!EFI_ERROR (Status)) {
896 DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));
897
898 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
899 Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
900 }
901
902 DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));
903
904 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
905 Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
906 }
907 }
908 }
909
910 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
911 AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);
912 }
913
914 if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
915 //
916 // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices
917 // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)).
918 //
919 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
920 //
921 // Make sure the newly allocated IDT align with 16-bytes
922 //
923 IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));
924 if (IdtBuffer == NULL) {
925 REPORT_STATUS_CODE (
926 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
927 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
928 );
929 ASSERT (FALSE);
930 }
931 //
932 // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer
933 // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code
934 //
935 ZeroMem (IdtBuffer, 16);
936 AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);
937 CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));
938 IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);
939 *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();
940 }
941
942 InterruptStatus = SaveAndDisableInterrupts ();
943 //
944 // Need to make sure the GDT is loaded with values that support long mode and real mode.
945 //
946 AsmWriteGdtr (&mGdt);
947 //
948 // update segment selectors per the new GDT.
949 //
950 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
951 //
952 // Restore interrupt state.
953 //
954 SetInterruptState (InterruptStatus);
955
956 //
957 // Prepare data for return back
958 //
959 PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));
960 if (PeiS3ResumeState == NULL) {
961 REPORT_STATUS_CODE (
962 EFI_ERROR_CODE | EFI_ERROR_MAJOR,
963 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
964 );
965 ASSERT (FALSE);
966 }
967 DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));
968 PeiS3ResumeState->ReturnCs = 0x10;
969 PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;
970 PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
971 //
972 // Save IDT
973 //
974 AsmReadIdtr (&PeiS3ResumeState->Idtr);
975
976 //
977 // Report Status Code to indicate S3 boot script execution
978 //
979 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);
980
981 PERF_START (NULL, "ScriptExec", NULL, 0);
982
983 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
984 //
985 // X64 S3 Resume
986 //
987 DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));
988
989 //
990 // Switch to long mode to complete resume.
991 //
992 AsmEnablePaging64 (
993 0x38,
994 EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
995 (UINT64)(UINTN)AcpiS3Context,
996 (UINT64)(UINTN)PeiS3ResumeState,
997 (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
998 );
999 } else {
1000 //
1001 // IA32 S3 Resume
1002 //
1003 DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));
1004 SwitchStack (
1005 (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
1006 (VOID *)AcpiS3Context,
1007 (VOID *)PeiS3ResumeState,
1008 (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
1009 );
1010 }
1011
1012 //
1013 // Never run to here
1014 //
1015 CpuDeadLoop();
1016 }
1017 /**
1018 Restores the platform to its preboot configuration for an S3 resume and
1019 jumps to the OS waking vector.
1020
1021 This function will restore the platform to its pre-boot configuration that was
1022 pre-stored in the boot script table and transfer control to OS waking vector.
1023 Upon invocation, this function is responsible for locating the following
1024 information before jumping to OS waking vector:
1025 - ACPI tables
1026 - boot script table
1027 - any other information that it needs
1028
1029 The S3RestoreConfig() function then executes the pre-stored boot script table
1030 and transitions the platform to the pre-boot state. The boot script is recorded
1031 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
1032 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
1033 transfers control to the OS waking vector. If the OS supports only a real-mode
1034 waking vector, this function will switch from flat mode to real mode before
1035 jumping to the waking vector. If all platform pre-boot configurations are
1036 successfully restored and all other necessary information is ready, this
1037 function will never return and instead will directly jump to the OS waking
1038 vector. If this function returns, it indicates that the attempt to resume
1039 from the ACPI S3 sleep state failed.
1040
1041 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
1042
1043 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
1044 @retval EFI_NOT_FOUND Some necessary information that is used for the S3
1045 resume boot path could not be located.
1046
1047 **/
1048 EFI_STATUS
1049 EFIAPI
1050 S3RestoreConfig2 (
1051 IN EFI_PEI_S3_RESUME2_PPI *This
1052 )
1053 {
1054 EFI_STATUS Status;
1055 PEI_SMM_ACCESS_PPI *SmmAccess;
1056 UINTN Index;
1057 ACPI_S3_CONTEXT *AcpiS3Context;
1058 EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;
1059 EFI_PHYSICAL_ADDRESS TempAcpiS3Context;
1060 BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;
1061 UINTN VarSize;
1062 EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
1063 SMM_S3_RESUME_STATE *SmmS3ResumeState;
1064 VOID *GuidHob;
1065 BOOLEAN Build4GPageTableOnly;
1066 BOOLEAN InterruptStatus;
1067
1068 TempAcpiS3Context = 0;
1069 TempEfiBootScriptExecutorVariable = 0;
1070
1071 DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));
1072
1073 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
1074 Status = RestoreLockBox (
1075 &gEfiAcpiVariableGuid,
1076 &TempAcpiS3Context,
1077 &VarSize
1078 );
1079 ASSERT_EFI_ERROR (Status);
1080
1081 Status = RestoreLockBox (
1082 &gEfiAcpiS3ContextGuid,
1083 NULL,
1084 NULL
1085 );
1086 ASSERT_EFI_ERROR (Status);
1087
1088 AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;
1089 ASSERT (AcpiS3Context != NULL);
1090
1091 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
1092 Status = RestoreLockBox (
1093 &gEfiBootScriptExecutorVariableGuid,
1094 &TempEfiBootScriptExecutorVariable,
1095 &VarSize
1096 );
1097 ASSERT_EFI_ERROR (Status);
1098
1099 Status = RestoreLockBox (
1100 &gEfiBootScriptExecutorContextGuid,
1101 NULL,
1102 NULL
1103 );
1104 ASSERT_EFI_ERROR (Status);
1105
1106 EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;
1107 ASSERT (EfiBootScriptExecutorVariable != NULL);
1108
1109 DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));
1110 DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));
1111 DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));
1112 DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));
1113 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));
1114 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));
1115 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));
1116 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));
1117 DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));
1118
1119 //
1120 // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.
1121 // Script dispatch image and context (parameter) are handled by platform.
1122 // We just use restore all lock box in place, no need restore one by one.
1123 //
1124 Status = RestoreAllLockBoxInPlace ();
1125 ASSERT_EFI_ERROR (Status);
1126 if (EFI_ERROR (Status)) {
1127 // Something wrong
1128 CpuDeadLoop ();
1129 }
1130
1131 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
1132 //
1133 // Need reconstruct page table here, since we do not trust ACPINvs.
1134 //
1135 if (IsLongModeWakingVector (AcpiS3Context)) {
1136 Build4GPageTableOnly = FALSE;
1137 } else {
1138 Build4GPageTableOnly = TRUE;
1139 }
1140 RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);
1141 }
1142
1143 //
1144 // Attempt to use content from SMRAM first
1145 //
1146 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
1147 if (GuidHob != NULL) {
1148 Status = PeiServicesLocatePpi (
1149 &gPeiSmmAccessPpiGuid,
1150 0,
1151 NULL,
1152 (VOID **) &SmmAccess
1153 );
1154 for (Index = 0; !EFI_ERROR (Status); Index++) {
1155 Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
1156 }
1157
1158 SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
1159 SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;
1160
1161 SmmS3ResumeState->ReturnCs = AsmReadCs ();
1162 SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;
1163 SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;
1164 SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;
1165 SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
1166
1167 DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));
1168 DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));
1169 DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));
1170 DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));
1171 DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));
1172 DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));
1173 DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));
1174 DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
1175 DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
1176 DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
1177 DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
1178 DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
1179 DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));
1180
1181 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
1182 SwitchStack (
1183 (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,
1184 (VOID *)AcpiS3Context,
1185 0,
1186 (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)
1187 );
1188 }
1189 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
1190 //
1191 // Switch to long mode to complete resume.
1192 //
1193
1194 InterruptStatus = SaveAndDisableInterrupts ();
1195 //
1196 // Need to make sure the GDT is loaded with values that support long mode and real mode.
1197 //
1198 AsmWriteGdtr (&mGdt);
1199 //
1200 // update segment selectors per the new GDT.
1201 //
1202 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
1203 //
1204 // Restore interrupt state.
1205 //
1206 SetInterruptState (InterruptStatus);
1207
1208 AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
1209
1210 //
1211 // Disable interrupt of Debug timer, since IDT table cannot work in long mode.
1212 // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,
1213 // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.
1214 //
1215 SaveAndSetDebugTimerInterrupt (FALSE);
1216
1217 AsmEnablePaging64 (
1218 0x38,
1219 SmmS3ResumeState->SmmS3ResumeEntryPoint,
1220 (UINT64)(UINTN)AcpiS3Context,
1221 0,
1222 SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize
1223 );
1224 }
1225
1226 }
1227
1228 S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );
1229 return EFI_SUCCESS;
1230 }
1231 /**
1232 Main entry for S3 Resume PEIM.
1233
1234 This routine is to install EFI_PEI_S3_RESUME2_PPI.
1235
1236 @param FileHandle Handle of the file being invoked.
1237 @param PeiServices Pointer to PEI Services table.
1238
1239 @retval EFI_SUCCESS S3Resume Ppi is installed successfully.
1240
1241 **/
1242 EFI_STATUS
1243 EFIAPI
1244 PeimS3ResumeEntryPoint (
1245 IN EFI_PEI_FILE_HANDLE FileHandle,
1246 IN CONST EFI_PEI_SERVICES **PeiServices
1247 )
1248 {
1249 EFI_STATUS Status;
1250
1251 //
1252 // Install S3 Resume Ppi
1253 //
1254 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);
1255 ASSERT_EFI_ERROR (Status);
1256
1257 return EFI_SUCCESS;
1258 }
1259