UefiPayloadPkg: Enhance UEFI payload for coreboot and Slim Bootloader
[mirror_edk2.git] / UefiPayloadPkg / BlSupportPei / BlSupportPei.c
1 /** @file
2 This PEIM will parse bootloader information and report resource information into pei core.
3 This file contains the main entrypoint of the PEIM.
4
5 Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9 #include "BlSupportPei.h"
10
11 #define LEGACY_8259_MASK_REGISTER_MASTER 0x21
12 #define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
13
14 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
15 { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) },
16 { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },
17 { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) },
18 { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) },
19 { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) },
20 { EfiMaxMemoryType, 0 }
21 };
22
23 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
24 {
25 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
26 &gEfiPeiMasterBootModePpiGuid,
27 NULL
28 }
29 };
30
31 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {
32 MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT8, MAX_UINT8
33 };
34
35 /**
36 Create memory mapped io resource hob.
37
38 @param MmioBase Base address of the memory mapped io range
39 @param MmioSize Length of the memory mapped io range
40
41 **/
42 VOID
43 BuildMemoryMappedIoRangeHob (
44 EFI_PHYSICAL_ADDRESS MmioBase,
45 UINT64 MmioSize
46 )
47 {
48 BuildResourceDescriptorHob (
49 EFI_RESOURCE_MEMORY_MAPPED_IO,
50 (EFI_RESOURCE_ATTRIBUTE_PRESENT |
51 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
52 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
53 EFI_RESOURCE_ATTRIBUTE_TESTED),
54 MmioBase,
55 MmioSize
56 );
57
58 BuildMemoryAllocationHob (
59 MmioBase,
60 MmioSize,
61 EfiMemoryMappedIO
62 );
63 }
64
65 /**
66 Check the integrity of firmware volume header
67
68 @param[in] FwVolHeader A pointer to a firmware volume header
69
70 @retval TRUE The firmware volume is consistent
71 @retval FALSE The firmware volume has corrupted.
72
73 **/
74 STATIC
75 BOOLEAN
76 IsFvHeaderValid (
77 IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
78 )
79 {
80 UINT16 Checksum;
81
82 // Skip nv storage fv
83 if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
84 return FALSE;
85 }
86
87 if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
88 (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
89 (FwVolHeader->FvLength == ((UINTN) -1)) ||
90 ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
91 return FALSE;
92 }
93
94 Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
95 if (Checksum != 0) {
96 DEBUG (( DEBUG_ERROR,
97 "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
98 FwVolHeader->Checksum,
99 (UINT16)( Checksum + FwVolHeader->Checksum )));
100 return TRUE; //FALSE; Need update UEFI build tool when patching entrypoin @start of fd.
101 }
102
103 return TRUE;
104 }
105
106 /**
107 Install FvInfo PPI and create fv hobs for remained fvs
108
109 **/
110 VOID
111 PeiReportRemainedFvs (
112 VOID
113 )
114 {
115 UINT8* TempPtr;
116 UINT8* EndPtr;
117
118 TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
119 EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
120
121 for (;TempPtr < EndPtr;) {
122 if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
123 if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {
124 // Skip the PEI FV
125 DEBUG((DEBUG_INFO, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
126
127 PeiServicesInstallFvInfoPpi (
128 NULL,
129 (VOID *) (UINTN) TempPtr,
130 (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
131 NULL,
132 NULL
133 );
134 BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
135 }
136 }
137 TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
138 }
139 }
140
141
142 /**
143 Find the board related info from ACPI table
144
145 @param AcpiTableBase ACPI table start address in memory
146 @param AcpiBoardInfo Pointer to the acpi board info strucutre
147
148 @retval RETURN_SUCCESS Successfully find out all the required information.
149 @retval RETURN_NOT_FOUND Failed to find the required info.
150
151 **/
152 RETURN_STATUS
153 ParseAcpiInfo (
154 IN UINT64 AcpiTableBase,
155 OUT ACPI_BOARD_INFO *AcpiBoardInfo
156 )
157 {
158 EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
159 EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
160 UINT32 *Entry32;
161 UINTN Entry32Num;
162 EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
163 EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
164 UINT64 *Entry64;
165 UINTN Entry64Num;
166 UINTN Idx;
167 EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
168 EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
169
170 Rsdp = (EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)(UINTN)AcpiTableBase;
171 DEBUG ((DEBUG_INFO, "Rsdp at 0x%p\n", Rsdp));
172 DEBUG ((DEBUG_INFO, "Rsdt at 0x%x, Xsdt at 0x%lx\n", Rsdp->RsdtAddress, Rsdp->XsdtAddress));
173
174 //
175 // Search Rsdt First
176 //
177 Fadt = NULL;
178 MmCfgHdr = NULL;
179 Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);
180 if (Rsdt != NULL) {
181 Entry32 = (UINT32 *)(Rsdt + 1);
182 Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
183 for (Idx = 0; Idx < Entry32Num; Idx++) {
184 if (*(UINT32 *)(UINTN)(Entry32[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
185 Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry32[Idx]);
186 DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
187 }
188
189 if (*(UINT32 *)(UINTN)(Entry32[Idx]) == EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE) {
190 MmCfgHdr = (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *)(UINTN)(Entry32[Idx]);
191 DEBUG ((DEBUG_INFO, "Found MM config address in Rsdt\n"));
192 }
193
194 if ((Fadt != NULL) && (MmCfgHdr != NULL)) {
195 goto Done;
196 }
197 }
198 }
199
200 //
201 // Search Xsdt Second
202 //
203 Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
204 if (Xsdt != NULL) {
205 Entry64 = (UINT64 *)(Xsdt + 1);
206 Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
207 for (Idx = 0; Idx < Entry64Num; Idx++) {
208 if (*(UINT32 *)(UINTN)(Entry64[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
209 Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry64[Idx]);
210 DEBUG ((DEBUG_INFO, "Found Fadt in Xsdt\n"));
211 }
212
213 if (*(UINT32 *)(UINTN)(Entry64[Idx]) == EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE) {
214 MmCfgHdr = (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *)(UINTN)(Entry32[Idx]);
215 DEBUG ((DEBUG_INFO, "Found MM config address in Xsdt\n"));
216 }
217
218 if ((Fadt != NULL) && (MmCfgHdr != NULL)) {
219 goto Done;
220 }
221 }
222 }
223
224 if (Fadt == NULL) {
225 return RETURN_NOT_FOUND;
226 }
227
228 Done:
229
230 AcpiBoardInfo->PmCtrlRegBase = Fadt->Pm1aCntBlk;
231 AcpiBoardInfo->PmTimerRegBase = Fadt->PmTmrBlk;
232 AcpiBoardInfo->ResetRegAddress = Fadt->ResetReg.Address;
233 AcpiBoardInfo->ResetValue = Fadt->ResetValue;
234 AcpiBoardInfo->PmEvtBase = Fadt->Pm1aEvtBlk;
235 AcpiBoardInfo->PmGpeEnBase = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
236
237 if (MmCfgHdr != NULL) {
238 MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8*) MmCfgHdr + sizeof (*MmCfgHdr));
239 AcpiBoardInfo->PcieBaseAddress = MmCfgBase->BaseAddress;
240 } else {
241 AcpiBoardInfo->PcieBaseAddress = 0;
242 }
243 DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
244 DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
245 DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
246 DEBUG ((DEBUG_INFO, "Reset Value 0x%x\n", AcpiBoardInfo->ResetValue));
247 DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
248 DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
249 DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));
250
251 //
252 // Verify values for proper operation
253 //
254 ASSERT(Fadt->Pm1aCntBlk != 0);
255 ASSERT(Fadt->PmTmrBlk != 0);
256 ASSERT(Fadt->ResetReg.Address != 0);
257 ASSERT(Fadt->Pm1aEvtBlk != 0);
258 ASSERT(Fadt->Gpe0Blk != 0);
259
260 DEBUG_CODE_BEGIN ();
261 BOOLEAN SciEnabled;
262
263 //
264 // Check the consistency of SCI enabling
265 //
266
267 //
268 // Get SCI_EN value
269 //
270 if (Fadt->Pm1CntLen == 4) {
271 SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
272 } else {
273 //
274 // if (Pm1CntLen == 2), use 16 bit IO read;
275 // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
276 //
277 SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
278 }
279
280 if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
281 (Fadt->SmiCmd == 0) &&
282 !SciEnabled) {
283 //
284 // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
285 // table does not provide a means to enable it through FADT->SmiCmd
286 //
287 DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
288 " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
289 " This may cause issues in OS.\n"));
290 }
291 DEBUG_CODE_END ();
292
293 return RETURN_SUCCESS;
294 }
295
296 EFI_STATUS
297 MemInfoCallback (
298 IN MEMROY_MAP_ENTRY *MemoryMapEntry,
299 IN VOID *Params
300 )
301 {
302 PAYLOAD_MEM_INFO *MemInfo;
303 UINTN Attribue;
304 EFI_PHYSICAL_ADDRESS Base;
305 EFI_RESOURCE_TYPE Type;
306 UINT64 Size;
307 UINT32 SystemLowMemTop;
308
309 Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
310 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
311 EFI_RESOURCE_ATTRIBUTE_TESTED |
312 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
313 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
314 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
315 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
316
317 MemInfo = (PAYLOAD_MEM_INFO *)Params;
318 Type = (MemoryMapEntry->Type == 1) ? EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED;
319 Base = MemoryMapEntry->Base;
320 Size = MemoryMapEntry->Size;
321
322 if ((Base < 0x100000) && ((Base + Size) > 0x100000)) {
323 Size -= (0x100000 - Base);
324 Base = 0x100000;
325 }
326
327 if (Base >= 0x100000) {
328 if (Type == EFI_RESOURCE_SYSTEM_MEMORY) {
329 if (Base < 0x100000000ULL) {
330 MemInfo->UsableLowMemTop = (UINT32)(Base + Size);
331 } else {
332 Attribue &= ~EFI_RESOURCE_ATTRIBUTE_TESTED;
333 }
334 BuildResourceDescriptorHob (
335 EFI_RESOURCE_SYSTEM_MEMORY,
336 Attribue,
337 (EFI_PHYSICAL_ADDRESS)Base,
338 Size
339 );
340 } else if (Type == EFI_RESOURCE_MEMORY_RESERVED) {
341 BuildResourceDescriptorHob (
342 EFI_RESOURCE_MEMORY_RESERVED,
343 Attribue,
344 (EFI_PHYSICAL_ADDRESS)Base,
345 Size
346 );
347 if (Base < 0x100000000ULL) {
348 SystemLowMemTop = ((UINT32)(Base + Size) + 0x0FFFFFFF) & 0xF0000000;
349 if (SystemLowMemTop > MemInfo->SystemLowMemTop) {
350 MemInfo->SystemLowMemTop = SystemLowMemTop;
351 }
352 }
353 }
354 }
355
356 return EFI_SUCCESS;
357 }
358
359 /**
360 This is the entrypoint of PEIM
361
362 @param FileHandle Handle of the file being invoked.
363 @param PeiServices Describes the list of possible PEI Services.
364
365 @retval EFI_SUCCESS if it completed successfully.
366 **/
367 EFI_STATUS
368 EFIAPI
369 BlPeiEntryPoint (
370 IN EFI_PEI_FILE_HANDLE FileHandle,
371 IN CONST EFI_PEI_SERVICES **PeiServices
372 )
373 {
374 EFI_STATUS Status;
375 UINT64 LowMemorySize;
376 UINT64 PeiMemSize = SIZE_64MB;
377 EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
378 UINT32 RegEax;
379 UINT8 PhysicalAddressBits;
380 PAYLOAD_MEM_INFO PldMemInfo;
381 SYSTEM_TABLE_INFO SysTableInfo;
382 SYSTEM_TABLE_INFO *NewSysTableInfo;
383 ACPI_BOARD_INFO AcpiBoardInfo;
384 ACPI_BOARD_INFO *NewAcpiBoardInfo;
385 EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
386 EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
387 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
388 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
389
390
391 //
392 // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED
393 // is intentionally omitted to prevent erasing of the coreboot header
394 // record before it is processed by ParseMemoryInfo.
395 //
396 BuildResourceDescriptorHob (
397 EFI_RESOURCE_SYSTEM_MEMORY,
398 (
399 EFI_RESOURCE_ATTRIBUTE_PRESENT |
400 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
401 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
402 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
403 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
404 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
405 ),
406 (EFI_PHYSICAL_ADDRESS)(0),
407 (UINT64)(0xA0000)
408 );
409
410 BuildResourceDescriptorHob (
411 EFI_RESOURCE_MEMORY_RESERVED,
412 (
413 EFI_RESOURCE_ATTRIBUTE_PRESENT |
414 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
415 EFI_RESOURCE_ATTRIBUTE_TESTED |
416 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
417 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
418 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
419 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
420 ),
421 (EFI_PHYSICAL_ADDRESS)(0xA0000),
422 (UINT64)(0x60000)
423 );
424
425
426 //
427 // Parse memory info
428 //
429 ZeroMem (&PldMemInfo, sizeof(PldMemInfo));
430 Status = ParseMemoryInfo (MemInfoCallback, &PldMemInfo);
431 if (EFI_ERROR(Status)) {
432 return Status;
433 }
434
435 //
436 // Install memory
437 //
438 LowMemorySize = PldMemInfo.UsableLowMemTop;
439 PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
440 DEBUG ((DEBUG_INFO, "Low memory 0x%lx\n", LowMemorySize));
441 DEBUG ((DEBUG_INFO, "SystemLowMemTop 0x%x\n", PldMemInfo.SystemLowMemTop));
442 DEBUG ((DEBUG_INFO, "PeiMemBase: 0x%lx.\n", PeiMemBase));
443 DEBUG ((DEBUG_INFO, "PeiMemSize: 0x%lx.\n", PeiMemSize));
444 Status = PeiServicesInstallPeiMemory (PeiMemBase, PeiMemSize);
445 ASSERT_EFI_ERROR (Status);
446
447 //
448 // Set cache on the physical memory
449 //
450 MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
451 MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
452
453 //
454 // Create Memory Type Information HOB
455 //
456 BuildGuidDataHob (
457 &gEfiMemoryTypeInformationGuid,
458 mDefaultMemoryTypeInformation,
459 sizeof(mDefaultMemoryTypeInformation)
460 );
461
462 //
463 // Create Fv hob
464 //
465 PeiReportRemainedFvs ();
466
467 BuildMemoryAllocationHob (
468 PcdGet32 (PcdPayloadFdMemBase),
469 PcdGet32 (PcdPayloadFdMemSize),
470 EfiBootServicesData
471 );
472
473 //
474 // Build CPU memory space and IO space hob
475 //
476 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
477 if (RegEax >= 0x80000008) {
478 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
479 PhysicalAddressBits = (UINT8) RegEax;
480 } else {
481 PhysicalAddressBits = 36;
482 }
483
484 //
485 // Create a CPU hand-off information
486 //
487 BuildCpuHob (PhysicalAddressBits, 16);
488
489 //
490 // Report Local APIC range
491 //
492 BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
493
494 //
495 // Boot mode
496 //
497 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
498 ASSERT_EFI_ERROR (Status);
499
500 Status = PeiServicesInstallPpi (mPpiBootMode);
501 ASSERT_EFI_ERROR (Status);
502
503 //
504 // Create guid hob for frame buffer information
505 //
506 Status = ParseGfxInfo (&GfxInfo);
507 if (!EFI_ERROR (Status)) {
508 NewGfxInfo = BuildGuidHob (&gEfiGraphicsInfoHobGuid, sizeof (GfxInfo));
509 ASSERT (NewGfxInfo != NULL);
510 CopyMem (NewGfxInfo, &GfxInfo, sizeof (GfxInfo));
511 DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));
512 }
513
514
515 Status = ParseGfxDeviceInfo (&GfxDeviceInfo);
516 if (!EFI_ERROR (Status)) {
517 NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));
518 ASSERT (NewGfxDeviceInfo != NULL);
519 CopyMem (NewGfxDeviceInfo, &GfxDeviceInfo, sizeof (GfxDeviceInfo));
520 DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));
521 }
522
523
524 //
525 // Create guid hob for system tables like acpi table and smbios table
526 //
527 Status = ParseSystemTable(&SysTableInfo);
528 ASSERT_EFI_ERROR (Status);
529 if (!EFI_ERROR (Status)) {
530 NewSysTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
531 ASSERT (NewSysTableInfo != NULL);
532 CopyMem (NewSysTableInfo, &SysTableInfo, sizeof (SYSTEM_TABLE_INFO));
533 DEBUG ((DEBUG_INFO, "Detected Acpi Table at 0x%lx, length 0x%x\n", SysTableInfo.AcpiTableBase, SysTableInfo.AcpiTableSize));
534 DEBUG ((DEBUG_INFO, "Detected Smbios Table at 0x%lx, length 0x%x\n", SysTableInfo.SmbiosTableBase, SysTableInfo.SmbiosTableSize));
535 }
536
537 //
538 // Create guid hob for acpi board information
539 //
540 Status = ParseAcpiInfo (SysTableInfo.AcpiTableBase, &AcpiBoardInfo);
541 ASSERT_EFI_ERROR (Status);
542 if (!EFI_ERROR (Status)) {
543 NewAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
544 ASSERT (NewAcpiBoardInfo != NULL);
545 CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));
546 DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));
547 }
548
549 //
550 // Parse platform specific information.
551 //
552 Status = ParsePlatformInfo ();
553 if (EFI_ERROR (Status)) {
554 DEBUG ((DEBUG_ERROR, "Error when parsing platform info, Status = %r\n", Status));
555 return Status;
556 }
557
558 //
559 // Mask off all legacy 8259 interrupt sources
560 //
561 IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
562 IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
563
564 return EFI_SUCCESS;
565 }
566