UefiPayloadPkg/Include/Coreboot.h

   1 /** @file
   2   Coreboot PEI module include file.
   3
   4   Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 /*
  10  * This file is part of the libpayload project.
  11  *
  12  * Copyright (C) 2008 Advanced Micro Devices, Inc.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions
  16  * are met:
  17  * 1. Redistributions of source code must retain the above copyright
  18  *    notice, this list of conditions and the following disclaimer.
  19  * 2. Redistributions in binary form must reproduce the above copyright
  20  *    notice, this list of conditions and the following disclaimer in the
  21  *    documentation and/or other materials provided with the distribution.
  22  * 3. The name of the author may not be used to endorse or promote products
  23  *    derived from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  35  * SUCH DAMAGE.
  36  */
  37
  38
  39 #ifndef _COREBOOT_PEI_H_INCLUDED_
  40 #define _COREBOOT_PEI_H_INCLUDED_
  41
  42 #if defined(_MSC_VER)
  43 #pragma warning( disable : 4200 )
  44 #endif
  45
  46 #define DYN_CBMEM_ALIGN_SIZE (4096)
  47
  48 #define IMD_ENTRY_MAGIC      (~0xC0389481)
  49 #define CBMEM_ENTRY_MAGIC    (~0xC0389479)
  50
  51 struct cbmem_entry {
  52   UINT32 magic;
  53   UINT32 start;
  54   UINT32 size;
  55   UINT32 id;
  56 };
  57
  58 struct cbmem_root {
  59   UINT32 max_entries;
  60   UINT32 num_entries;
  61   UINT32 locked;
  62   UINT32 size;
  63   struct cbmem_entry entries[0];
  64 };
  65
  66 struct imd_entry {
  67   UINT32 magic;
  68   UINT32 start_offset;
  69   UINT32 size;
  70   UINT32 id;
  71 };
  72
  73 struct imd_root {
  74   UINT32 max_entries;
  75   UINT32 num_entries;
  76   UINT32 flags;
  77   UINT32 entry_align;
  78   UINT32 max_offset;
  79   struct imd_entry entries[0];
  80 };
  81
  82 struct cbuint64 {
  83   UINT32 lo;
  84   UINT32 hi;
  85 };
  86
  87 #define CB_HEADER_SIGNATURE 0x4F49424C
  88
  89 struct cb_header {
  90   UINT32 signature;
  91   UINT32 header_bytes;
  92   UINT32 header_checksum;
  93   UINT32 table_bytes;
  94   UINT32 table_checksum;
  95   UINT32 table_entries;
  96 };
  97
  98 struct cb_record {
  99   UINT32 tag;
 100   UINT32 size;
 101 };
 102
 103 #define CB_TAG_UNUSED     0x0000
 104 #define CB_TAG_MEMORY     0x0001
 105
 106 struct cb_memory_range {
 107   struct cbuint64 start;
 108   struct cbuint64 size;
 109   UINT32 type;
 110 };
 111
 112 #define CB_MEM_RAM    1
 113 #define CB_MEM_RESERVED     2
 114 #define CB_MEM_ACPI   3
 115 #define CB_MEM_NVS    4
 116 #define CB_MEM_UNUSABLE     5
 117 #define CB_MEM_VENDOR_RSVD  6
 118 #define CB_MEM_TABLE       16
 119
 120 struct cb_memory {
 121   UINT32 tag;
 122   UINT32 size;
 123   struct cb_memory_range map[0];
 124 };
 125
 126 #define CB_TAG_MAINBOARD  0x0003
 127
 128 struct cb_mainboard {
 129   UINT32 tag;
 130   UINT32 size;
 131   UINT8 vendor_idx;
 132   UINT8 part_number_idx;
 133   UINT8 strings[0];
 134 };
 135 #define CB_TAG_VERSION  0x0004
 136 #define CB_TAG_EXTRA_VERSION  0x0005
 137 #define CB_TAG_BUILD    0x0006
 138 #define CB_TAG_COMPILE_TIME   0x0007
 139 #define CB_TAG_COMPILE_BY     0x0008
 140 #define CB_TAG_COMPILE_HOST   0x0009
 141 #define CB_TAG_COMPILE_DOMAIN 0x000a
 142 #define CB_TAG_COMPILER       0x000b
 143 #define CB_TAG_LINKER   0x000c
 144 #define CB_TAG_ASSEMBLER      0x000d
 145
 146 struct cb_string {
 147   UINT32 tag;
 148   UINT32 size;
 149   UINT8 string[0];
 150 };
 151
 152 #define CB_TAG_SERIAL   0x000f
 153
 154 struct cb_serial {
 155   UINT32 tag;
 156   UINT32 size;
 157 #define CB_SERIAL_TYPE_IO_MAPPED     1
 158 #define CB_SERIAL_TYPE_MEMORY_MAPPED 2
 159   UINT32 type;
 160   UINT32 baseaddr;
 161   UINT32 baud;
 162   UINT32 regwidth;
 163
 164   // Crystal or input frequency to the chip containing the UART.
 165   // Provide the board specific details to allow the payload to
 166   // initialize the chip containing the UART and make independent
 167   // decisions as to which dividers to select and their values
 168   // to eventually arrive at the desired console baud-rate.
 169   UINT32 input_hertz;
 170
 171   // UART PCI address: bus, device, function
 172   // 1 << 31 - Valid bit, PCI UART in use
 173   // Bus << 20
 174   // Device << 15
 175   // Function << 12
 176   UINT32 uart_pci_addr;
 177 };
 178
 179 #define CB_TAG_CONSOLE       0x00010
 180
 181 struct cb_console {
 182   UINT32 tag;
 183   UINT32 size;
 184   UINT16 type;
 185 };
 186
 187 #define CB_TAG_CONSOLE_SERIAL8250 0
 188 #define CB_TAG_CONSOLE_VGA  1 // OBSOLETE
 189 #define CB_TAG_CONSOLE_BTEXT      2 // OBSOLETE
 190 #define CB_TAG_CONSOLE_LOGBUF     3
 191 #define CB_TAG_CONSOLE_SROM       4 // OBSOLETE
 192 #define CB_TAG_CONSOLE_EHCI       5
 193
 194 #define CB_TAG_FORWARD       0x00011
 195
 196 struct cb_forward {
 197   UINT32 tag;
 198   UINT32 size;
 199   UINT64 forward;
 200 };
 201
 202 #define CB_TAG_FRAMEBUFFER      0x0012
 203 struct cb_framebuffer {
 204   UINT32 tag;
 205   UINT32 size;
 206
 207   UINT64 physical_address;
 208   UINT32 x_resolution;
 209   UINT32 y_resolution;
 210   UINT32 bytes_per_line;
 211   UINT8 bits_per_pixel;
 212   UINT8 red_mask_pos;
 213   UINT8 red_mask_size;
 214   UINT8 green_mask_pos;
 215   UINT8 green_mask_size;
 216   UINT8 blue_mask_pos;
 217   UINT8 blue_mask_size;
 218   UINT8 reserved_mask_pos;
 219   UINT8 reserved_mask_size;
 220 };
 221
 222 #define CB_TAG_VDAT     0x0015
 223 struct cb_vdat {
 224   UINT32 tag;
 225   UINT32 size;  /* size of the entire entry */
 226   UINT64 vdat_addr;
 227   UINT32 vdat_size;
 228 };
 229
 230 #define CB_TAG_TIMESTAMPS       0x0016
 231 #define CB_TAG_CBMEM_CONSOLE    0x0017
 232 #define CB_TAG_MRC_CACHE  0x0018
 233 struct cb_cbmem_tab {
 234   UINT32 tag;
 235   UINT32 size;
 236   UINT64 cbmem_tab;
 237 };
 238
 239 /* Helpful macros */
 240
 241 #define MEM_RANGE_COUNT(_rec) \
 242   (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
 243
 244 #define MEM_RANGE_PTR(_rec, _idx) \
 245   (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
 246     + (sizeof((_rec)->map[0]) * (_idx)))
 247
 248
 249 #endif // _COREBOOT_PEI_H_INCLUDED_