ArmPkg: only attempt buildin MmCommunicationDxe for AArch64
[mirror_edk2.git] / UefiPayloadPkg / SecCore / Ia32 / SecEntry.nasm
1 ;------------------------------------------------------------------------------
2 ;
3 ; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
5 ;
6 ; Abstract:
7 ;
8 ; Entry point for the coreboot UEFI payload.
9 ;
10 ;------------------------------------------------------------------------------
11
12 SECTION .text
13
14 ; C Functions
15 extern ASM_PFX(SecStartup)
16
17 ; Pcds
18 extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))
19 extern ASM_PFX(PcdGet32 (PcdPayloadStackTop))
20
21 ;
22 ; SecCore Entry Point
23 ;
24 ; Processor is in flat protected mode
25 ;
26 ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
27 ; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
28 ; @param[in] EBP Pointer to the start of the Boot Firmware Volume
29 ;
30 ; @return None This routine does not return
31 ;
32 global ASM_PFX(_ModuleEntryPoint)
33 ASM_PFX(_ModuleEntryPoint):
34 ;
35 ; Disable all the interrupts
36 ;
37 cli
38
39 ;
40 ; Save the Payload HOB base address before switching the stack
41 ;
42 mov eax, [esp + 4]
43
44 ;
45 ; Construct the temporary memory at 0x80000, length 0x10000
46 ;
47 mov esp, DWORD [ASM_PFX(PcdGet32 (PcdPayloadStackTop))]
48
49 ;
50 ; Push the Payload HOB base address onto new stack
51 ;
52 push eax
53
54 ;
55 ; Pass BFV into the PEI Core
56 ;
57 push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]
58
59 ;
60 ; Pass stack base into the PEI Core
61 ;
62 push BASE_512KB
63
64 ;
65 ; Pass stack size into the PEI Core
66 ;
67 push SIZE_64KB
68
69 ;
70 ; Pass Control into the PEI Core
71 ;
72 call ASM_PFX(SecStartup)
73
74 ;
75 ; Should never return
76 ;
77 jmp $
78