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1 /** @file
2 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
3 This program and the accompanying materials
4 are licensed and made available under the terms and conditions of the BSD License
5 which accompanies this distribution. The full text of the license may be found at
6 http://opensource.org/licenses/bsd-license.php
7
8 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
10
11 **/
12
13 Device(IOTD) {
14 Name(_HID, "MSFT8000")
15 Name(_CID, "MSFT8000")
16
17 Name(_CRS, ResourceTemplate() {
18 // Index 0
19 SPISerialBus( // Pin 5, 7, 9 , 11 of JP1 for SIO_SPI
20 1, // Device selection
21 PolarityLow, // Device selection polarity
22 FourWireMode, // wiremode
23 8, // databit len
24 ControllerInitiated, // slave mode
25 8000000, // Connection speed
26 ClockPolarityLow, // Clock polarity
27 ClockPhaseSecond, // clock phase
28 "\\_SB.SPI1", // ResourceSource: SPI bus controller name
29 0, // ResourceSourceIndex
30 ResourceConsumer, // Resource usage
31 JSPI, // DescriptorName: creates name for offset of resource descriptor
32 ) // Vendor Data
33
34 // Index 1
35 I2CSerialBus( // Pin 13, 15 of JP1, for SIO_I2C5 (signal)
36 0x00, // SlaveAddress: bus address (TBD)
37 , // SlaveMode: default to ControllerInitiated
38 400000, // ConnectionSpeed: in Hz
39 , // Addressing Mode: default to 7 bit
40 "\\_SB.I2C6", // ResourceSource: I2C bus controller name (For MinnowBoard Max, hardware I2C5(0-based) is reported as ACPI I2C6(1-based))
41 ,
42 ,
43 JI2C, // Descriptor Name: creates name for offset of resource descriptor
44 ) // VendorData
45
46 // Index 2
47 UARTSerialBus( // Pin 17, 19 of JP1, for SIO_UART2
48 115200, // InitialBaudRate: in bits ber second
49 , // BitsPerByte: default to 8 bits
50 , // StopBits: Defaults to one bit
51 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled
52 , // IsBigEndian: default to LittleEndian
53 , // Parity: Defaults to no parity
54 , // FlowControl: Defaults to no flow control
55 32, // ReceiveBufferSize
56 32, // TransmitBufferSize
57 "\\_SB.URT2", // ResourceSource: UART bus controller name
58 ,
59 ,
60 UAR2, // DescriptorName: creates name for offset of resource descriptor
61 )
62
63 // Index 3
64 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {0} // Pin 21 of JP1 (GPIO_S5[00])
65 // Index 4
66 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {0}
67
68 // Index 5
69 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {1} // Pin 23 of JP1 (GPIO_S5[01])
70 // Index 6
71 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {1}
72
73 // Index 7
74 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO2",) {2} // Pin 25 of JP1 (GPIO_S5[02])
75 // Index 8
76 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO2",) {2}
77
78 // Index 9
79 UARTSerialBus( // Pin 6, 8, 10, 12 of JP1, for SIO_UART1
80 115200, // InitialBaudRate: in bits ber second
81 , // BitsPerByte: default to 8 bits
82 , // StopBits: Defaults to one bit
83 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled
84 , // IsBigEndian: default to LittleEndian
85 , // Parity: Defaults to no parity
86 FlowControlHardware, // FlowControl: Defaults to no flow control
87 32, // ReceiveBufferSize
88 32, // TransmitBufferSize
89 "\\_SB.URT1", // ResourceSource: UART bus controller name
90 ,
91 ,
92 UAR1, // DescriptorName: creates name for offset of resource descriptor
93 )
94
95 // Index 10
96 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {62} // Pin 14 of JP1 (GPIO_SC[62])
97 // Index 11
98 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {62}
99
100 // Index 12
101 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {63} // Pin 16 of JP1 (GPIO_SC[63])
102 // Index 13
103 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {63}
104
105 // Index 14
106 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {65} // Pin 18 of JP1 (GPIO_SC[65])
107 // Index 15
108 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {65}
109
110 // Index 16
111 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {64} // Pin 20 of JP1 (GPIO_SC[64])
112 // Index 17
113 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {64}
114
115 // Index 18
116 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {94} // Pin 22 of JP1 (GPIO_SC[94])
117 // Index 19
118 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {94}
119
120 // Index 20
121 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {95} // Pin 24 of JP1 (GPIO_SC[95])
122 // Index 21
123 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {95}
124
125 // Index 22
126 GpioIo (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPO0",) {54} // Pin 26 of JP1 (GPIO_SC[54])
127 // Index 23
128 GpioInt(Edge, ActiveBoth, SharedAndWake, PullNone, 0,"\\_SB.GPO0",) {54}
129 })
130
131 Name(_DSD, Package() {
132 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
133 Package(1) { // Just one Property for IOT (at this time)
134 Package(2) { //The \93symbolic-identifiers\94 property
135 "symbolic-identifiers",
136 Package() { //Contains all the <resource index, symbolic-identifier> pairs
137 0, "SPI0",
138 1, "I2C5",
139 2, "UART2",
140 3, 21, // Pin 21 of JP1 (GPIO_S5[00])
141 4, 21, // Pin 21 for separate resource.
142 5, 23, // Pin 23 of JP1 (GPIO_S5[01])
143 6, 23,
144 7, 25, // Pin 25 of JP1 (GPIO_S5[02])
145 8, 25,
146 9, "UART1",
147 10, 14, // Pin 14 of JP1 (GPIO_SC[62])
148 11, 14,
149 12, 16, // Pin 16 of JP1 (GPIO_SC[63])
150 13, 16,
151 14, 18, // Pin 18 of JP1 (GPIO_SC[65])
152 15, 18,
153 16, 20, // Pin 20 of JP1 (GPIO_SC[64])
154 17, 20,
155 18, 22, // Pin 22 of JP1 (GPIO_SC[94])
156 19, 22,
157 20, 24, // Pin 24 of JP1 (GPIO_SC[95])
158 21, 24,
159 22, 26, // Pin 26 of JP1 (GPIO_SC[54])
160 23, 26
161 }
162 }
163 }
164 })
165
166 Method(_STA,0,Serialized) {
167
168 //
169 // Only report IoT virtual device when all pins' configuration follows MSFT's datasheet.
170 //
171 If (LEqual(IOT, 1)) {
172 Return (0xF)
173 }
174
175 Return (0x0)
176 }
177 }