Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Ppi/PlatformMemoryRange.h

   1 /*++
   2
   3 Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
   4
   5   This program and the accompanying materials are licensed and made available under
   6   the terms and conditions of the BSD License that accompanies this distribution.
   7   The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13
  14
  15 Module Name:
  16
  17   PlatformMemoryRange.h
  18
  19 Abstract:
  20
  21   Platform Memory Range PPI as defined in EFI 2.0
  22
  23   PPI for reserving special purpose memory ranges.
  24
  25 --*/
  26 //
  27 //
  28 #ifndef _PEI_PLATFORM_MEMORY_RANGE_H_
  29 #define _PEI_PLATFORM_MEMORY_RANGE_H_
  30
  31 #define PEI_PLATFORM_MEMORY_RANGE_PPI_GUID \
  32   { \
  33     0x30eb2979, 0xb0f7, 0x4d60, 0xb2, 0xdc, 0x1a, 0x2c, 0x96, 0xce, 0xb1, 0xf4 \
  34   }
  35
  36 typedef struct _PEI_PLATFORM_MEMORY_RANGE_PPI  PEI_PLATFORM_MEMORY_RANGE_PPI ;
  37
  38 #define PEI_MEMORY_RANGE_OPTION_ROM UINT32
  39
  40 #define PEI_MR_OPTION_ROM_ALL       0xFFFFFFFF
  41 #define PEI_MR_OPTION_ROM_NONE      0x00000000
  42 #define PEI_MR_OPTION_ROM_C0000_16K 0x00000001
  43 #define PEI_MR_OPTION_ROM_C4000_16K 0x00000002
  44 #define PEI_MR_OPTION_ROM_C8000_16K 0x00000004
  45 #define PEI_MR_OPTION_ROM_CC000_16K 0x00000008
  46 #define PEI_MR_OPTION_ROM_D0000_16K 0x00000010
  47 #define PEI_MR_OPTION_ROM_D4000_16K 0x00000020
  48 #define PEI_MR_OPTION_ROM_D8000_16K 0x00000040
  49 #define PEI_MR_OPTION_ROM_DC000_16K 0x00000080
  50 #define PEI_MR_OPTION_ROM_E0000_16K 0x00000100
  51 #define PEI_MR_OPTION_ROM_E4000_16K 0x00000200
  52 #define PEI_MR_OPTION_ROM_E8000_16K 0x00000400
  53 #define PEI_MR_OPTION_ROM_EC000_16K 0x00000800
  54 #define PEI_MR_OPTION_ROM_F0000_16K 0x00001000
  55 #define PEI_MR_OPTION_ROM_F4000_16K 0x00002000
  56 #define PEI_MR_OPTION_ROM_F8000_16K 0x00004000
  57 #define PEI_MR_OPTION_ROM_FC000_16K 0x00008000
  58
  59 //
  60 // SMRAM Memory Range
  61 //
  62 #define PEI_MEMORY_RANGE_SMRAM      UINT32
  63 #define PEI_MR_SMRAM_ALL            0xFFFFFFFF
  64 #define PEI_MR_SMRAM_NONE           0x00000000
  65 #define PEI_MR_SMRAM_CACHEABLE_MASK 0x80000000
  66 #define PEI_MR_SMRAM_SEGTYPE_MASK   0x00FF0000
  67 #define PEI_MR_SMRAM_ABSEG_MASK     0x00010000
  68 #define PEI_MR_SMRAM_HSEG_MASK      0x00020000
  69 #define PEI_MR_SMRAM_TSEG_MASK      0x00040000
  70 //
  71 // If adding additional entries, SMRAM Size
  72 // is a multiple of 128KB.
  73 //
  74 #define PEI_MR_SMRAM_SIZE_MASK          0x0000FFFF
  75 #define PEI_MR_SMRAM_SIZE_128K_MASK     0x00000001
  76 #define PEI_MR_SMRAM_SIZE_256K_MASK     0x00000002
  77 #define PEI_MR_SMRAM_SIZE_512K_MASK     0x00000004
  78 #define PEI_MR_SMRAM_SIZE_1024K_MASK    0x00000008
  79 #define PEI_MR_SMRAM_SIZE_2048K_MASK    0x00000010
  80 #define PEI_MR_SMRAM_SIZE_4096K_MASK    0x00000020
  81 #define PEI_MR_SMRAM_SIZE_8192K_MASK    0x00000040
  82
  83 #define PEI_MR_SMRAM_ABSEG_128K_NOCACHE 0x00010001
  84 #define PEI_MR_SMRAM_HSEG_128K_CACHE    0x80020001
  85 #define PEI_MR_SMRAM_HSEG_128K_NOCACHE  0x00020001
  86 #define PEI_MR_SMRAM_TSEG_128K_CACHE    0x80040001
  87 #define PEI_MR_SMRAM_TSEG_128K_NOCACHE  0x00040001
  88 #define PEI_MR_SMRAM_TSEG_256K_CACHE    0x80040002
  89 #define PEI_MR_SMRAM_TSEG_256K_NOCACHE  0x00040002
  90 #define PEI_MR_SMRAM_TSEG_512K_CACHE    0x80040004
  91 #define PEI_MR_SMRAM_TSEG_512K_NOCACHE  0x00040004
  92 #define PEI_MR_SMRAM_TSEG_1024K_CACHE   0x80040008
  93 #define PEI_MR_SMRAM_TSEG_1024K_NOCACHE 0x00040008
  94
  95 //
  96 // Graphics Memory Range
  97 //
  98 #define PEI_MEMORY_RANGE_GRAPHICS_MEMORY  UINT32
  99 #define PEI_MR_GRAPHICS_MEMORY_ALL        0xFFFFFFFF
 100 #define PEI_MR_GRAPHICS_MEMORY_NONE       0x00000000
 101 #define PEI_MR_GRAPHICS_MEMORY_CACHEABLE  0x80000000
 102 //
 103 // If adding additional entries, Graphics Memory Size
 104 // is a multiple of 512KB.
 105 //
 106 #define PEI_MR_GRAPHICS_MEMORY_SIZE_MASK    0x0000FFFF
 107 #define PEI_MR_GRAPHICS_MEMORY_512K_NOCACHE 0x00000001
 108 #define PEI_MR_GRAPHICS_MEMORY_512K_CACHE   0x80000001
 109 #define PEI_MR_GRAPHICS_MEMORY_1M_NOCACHE   0x00000002
 110 #define PEI_MR_GRAPHICS_MEMORY_1M_CACHE     0x80000002
 111 #define PEI_MR_GRAPHICS_MEMORY_4M_NOCACHE   0x00000008
 112 #define PEI_MR_GRAPHICS_MEMORY_4M_CACHE     0x80000008
 113 #define PEI_MR_GRAPHICS_MEMORY_8M_NOCACHE   0x00000010
 114 #define PEI_MR_GRAPHICS_MEMORY_8M_CACHE     0x80000010
 115 #define PEI_MR_GRAPHICS_MEMORY_16M_NOCACHE  0x00000020
 116 #define PEI_MR_GRAPHICS_MEMORY_16M_CACHE    0x80000020
 117 #define PEI_MR_GRAPHICS_MEMORY_32M_NOCACHE  0x00000040
 118 #define PEI_MR_GRAPHICS_MEMORY_32M_CACHE    0x80000040
 119 #define PEI_MR_GRAPHICS_MEMORY_48M_NOCACHE  0x00000060
 120 #define PEI_MR_GRAPHICS_MEMORY_48M_CACHE    0x80000060
 121 #define PEI_MR_GRAPHICS_MEMORY_64M_NOCACHE  0x00000080
 122 #define PEI_MR_GRAPHICS_MEMORY_64M_CACHE    0x80000080
 123 #define PEI_MR_GRAPHICS_MEMORY_128M_NOCACHE 0x00000100
 124 #define PEI_MR_GRAPHICS_MEMORY_128M_CACHE   0x80000100
 125 #define PEI_MR_GRAPHICS_MEMORY_256M_NOCACHE 0x00000200
 126 #define PEI_MR_GRAPHICS_MEMORY_256M_CACHE   0x80000200
 127 //
 128 // Pci Memory Hole
 129 //
 130 #define PEI_MEMORY_RANGE_PCI_MEMORY       UINT32
 131 #define PEI_MR_PCI_MEMORY_SIZE_512M_MASK  0x00000001
 132
 133 typedef
 134 EFI_STATUS
 135 (EFIAPI *PEI_CHOOSE_RANGES) (
 136   IN      EFI_PEI_SERVICES                      **PeiServices,
 137   IN PEI_PLATFORM_MEMORY_RANGE_PPI              * This,
 138   IN OUT  PEI_MEMORY_RANGE_OPTION_ROM           * OptionRomMask,
 139   IN OUT  PEI_MEMORY_RANGE_SMRAM                * SmramMask,
 140   IN OUT  PEI_MEMORY_RANGE_GRAPHICS_MEMORY      * GraphicsMemoryMask,
 141   IN OUT  PEI_MEMORY_RANGE_PCI_MEMORY           * PciMemoryMask
 142   );
 143
 144 struct _PEI_PLATFORM_MEMORY_RANGE_PPI {
 145   PEI_CHOOSE_RANGES ChooseRanges;
 146 };
 147
 148 extern EFI_GUID gPeiPlatformMemoryRangePpiGuid;
 149
 150 #endif