Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs.h

   1 /**
   2
   3 Copyright (c) 2011  - 2014, Intel Corporation. All rights reserved
   4
   5   This program and the accompanying materials are licensed and made available under
   6   the terms and conditions of the BSD License that accompanies this distribution.
   7   The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13
  14
  15   @file
  16   PchRegs.h
  17
  18   @brief
  19   Register names for VLV SC.
  20
  21   Conventions:
  22
  23   - Prefixes:
  24     Definitions beginning with "R_" are registers
  25     Definitions beginning with "B_" are bits within registers
  26     Definitions beginning with "V_" are meaningful values of bits within the registers
  27     Definitions beginning with "S_" are register sizes
  28     Definitions beginning with "N_" are the bit position
  29   - In general, PCH registers are denoted by "_PCH_" in register names
  30   - Registers / bits that are different between PCH generations are denoted by
  31     "_PCH_<generation_name>_" in register/bit names. e.g., "_PCH_VLV_"
  32   - Registers / bits that are different between SKUs are denoted by "_<SKU_name>"
  33     at the end of the register/bit names
  34   - Registers / bits of new devices introduced in a PCH generation will be just named
  35     as "_PCH_" without <generation_name> inserted.
  36
  37 **/
  38 #ifndef _PCH_REGS_H_
  39 #define _PCH_REGS_H_
  40
  41 ///
  42 /// Bit Definitions. BUGBUG: drive these definitions to code base. Should not need
  43 /// to be part of chipset modules
  44 ///
  45 #ifndef BIT0
  46 #define BIT0  0x0001
  47 #define BIT1  0x0002
  48 #define BIT2  0x0004
  49 #define BIT3  0x0008
  50 #define BIT4  0x0010
  51 #define BIT5  0x0020
  52 #define BIT6  0x0040
  53 #define BIT7  0x0080
  54 #define BIT8  0x0100
  55 #define BIT9  0x0200
  56 #define BIT10 0x0400
  57 #define BIT11 0x0800
  58 #define BIT12 0x1000
  59 #define BIT13 0x2000
  60 #define BIT14 0x4000
  61 #define BIT15 0x8000
  62 #define BIT16 0x00010000
  63 #define BIT17 0x00020000
  64 #define BIT18 0x00040000
  65 #define BIT19 0x00080000
  66 #define BIT20 0x00100000
  67 #define BIT21 0x00200000
  68 #define BIT22 0x00400000
  69 #define BIT23 0x00800000
  70 #define BIT24 0x01000000
  71 #define BIT25 0x02000000
  72 #define BIT26 0x04000000
  73 #define BIT27 0x08000000
  74 #define BIT28 0x10000000
  75 #define BIT29 0x20000000
  76 #define BIT30 0x40000000
  77 #define BIT31 0x80000000
  78 #define BIT32 0x100000000
  79 #define BIT33 0x200000000
  80 #define BIT34 0x400000000
  81 #define BIT35 0x800000000
  82 #define BIT36 0x1000000000
  83 #define BIT37 0x2000000000
  84 #define BIT38 0x4000000000
  85 #define BIT39 0x8000000000
  86 #define BIT40 0x10000000000
  87 #define BIT41 0x20000000000
  88 #define BIT42 0x40000000000
  89 #define BIT43 0x80000000000
  90 #define BIT44 0x100000000000
  91 #define BIT45 0x200000000000
  92 #define BIT46 0x400000000000
  93 #define BIT47 0x800000000000
  94 #define BIT48 0x1000000000000
  95 #define BIT49 0x2000000000000
  96 #define BIT50 0x4000000000000
  97 #define BIT51 0x8000000000000
  98 #define BIT52 0x10000000000000
  99 #define BIT53 0x20000000000000
 100 #define BIT54 0x40000000000000
 101 #define BIT55 0x80000000000000
 102 #define BIT56 0x100000000000000
 103 #define BIT57 0x200000000000000
 104 #define BIT58 0x400000000000000
 105 #define BIT59 0x800000000000000
 106 #define BIT60 0x1000000000000000
 107 #define BIT61 0x2000000000000000
 108 #define BIT62 0x4000000000000000
 109 #define BIT63 0x8000000000000000
 110 #endif
 111 ///
 112 /// The default PCH PCI bus number
 113 ///
 114 #define DEFAULT_PCI_BUS_NUMBER_PCH  0
 115
 116 ///
 117 /// Default Vendor ID and Subsystem ID
 118 ///
 119 #define V_PCH_INTEL_VENDOR_ID   0x8086
 120 #define V_PCH_DEFAULT_SID       0x7270
 121 #define V_PCH_DEFAULT_SVID_SID  (V_PCH_INTEL_VENDOR_ID + (V_PCH_DEFAULT_SID << 16))
 122
 123 ///
 124 /// Include device register definitions
 125 ///
 126 #include "PchRegs/PchRegsHda.h"
 127 #include "PchRegs/PchRegsLpss.h"
 128 #include "PchRegs/PchRegsPcie.h"
 129 #include "PchRegs/PchRegsPcu.h"
 130 #include "PchRegs/PchRegsRcrb.h"
 131 #include "PchRegs/PchRegsSata.h"
 132 #include "PchRegs/PchRegsScc.h"
 133 #include "PchRegs/PchRegsSmbus.h"
 134 #include "PchRegs/PchRegsSpi.h"
 135 #include "PchRegs/PchRegsUsb.h"
 136 //#include "PchRegs/PchRegsLpe.h"
 137
 138 ///
 139 /// Device IDS that are PCH Server specific
 140 ///
 141 #define IS_PCH_DEVICE_ID(DeviceId) \
 142     ( \
 143       (DeviceId == V_PCH_LPC_DEVICE_ID_0) || \
 144       (DeviceId == V_PCH_LPC_DEVICE_ID_1) || \
 145       (DeviceId == V_PCH_LPC_DEVICE_ID_2) || \
 146       (DeviceId == V_PCH_LPC_DEVICE_ID_3) \
 147     )
 148
 149 #define IS_PCH_VLV_LPC_DEVICE_ID(DeviceId) \
 150     ( \
 151       IS_PCH_DEVICE_ID (DeviceId) \
 152     )
 153
 154 #define IS_PCH_VLV_SATA_DEVICE_ID(DeviceId) \
 155     ( \
 156       IS_PCH_VLV_SATA_AHCI_DEVICE_ID (DeviceId) || \
 157       IS_PCH_VLV_SATA_MODE_DEVICE_ID (DeviceId) || \
 158       IS_PCH_VLV_SATA_RAID_DEVICE_ID (DeviceId) \
 159     )
 160
 161 #define IS_PCH_VLV_SATA_AHCI_DEVICE_ID(DeviceId) \
 162     ( \
 163       (DeviceId == V_PCH_SATA_DEVICE_ID_D_AHCI) || \
 164       (DeviceId == V_PCH_SATA_DEVICE_ID_M_AHCI) \
 165     )
 166
 167 #define IS_PCH_VLV_SATA_RAID_DEVICE_ID(DeviceId) \
 168     ( \
 169       (DeviceId == V_PCH_SATA_DEVICE_ID_D_RAID) || \
 170       (DeviceId == V_PCH_SATA_DEVICE_ID_M_RAID) \
 171     )
 172
 173 #define IS_PCH_VLV_SATA_MODE_DEVICE_ID(DeviceId) \
 174     ( \
 175       (DeviceId == V_PCH_SATA_DEVICE_ID_D_IDE) || \
 176       (DeviceId == V_PCH_SATA_DEVICE_ID_M_IDE) \
 177     )
 178 #define IS_PCH_VLV_USB_DEVICE_ID(DeviceId) \
 179     ( \
 180       (DeviceId == V_PCH_USB_DEVICE_ID_0) || \
 181       (DeviceId == V_PCH_USB_DEVICE_ID_1) \
 182     )
 183 #define IS_PCH_VLV_PCIE_DEVICE_ID(DeviceId) \
 184     ( \
 185       (DeviceId == V_PCH_PCIE_DEVICE_ID_0) || \
 186       (DeviceId == V_PCH_PCIE_DEVICE_ID_1) || \
 187       (DeviceId == V_PCH_PCIE_DEVICE_ID_2) || \
 188       (DeviceId == V_PCH_PCIE_DEVICE_ID_3) || \
 189       (DeviceId == V_PCH_PCIE_DEVICE_ID_4) || \
 190       (DeviceId == V_PCH_PCIE_DEVICE_ID_5) || \
 191       (DeviceId == V_PCH_PCIE_DEVICE_ID_6) || \
 192       (DeviceId == V_PCH_PCIE_DEVICE_ID_7) \
 193     )
 194
 195 ///
 196 /// Any device ID that is Valleyview SC
 197 ///
 198 #define IS_PCH_VLV_DEVICE_ID(DeviceId) \
 199     ( \
 200       IS_PCH_VLV_LPC_DEVICE_ID (DeviceId) || \
 201       IS_PCH_VLV_SATA_DEVICE_ID (DeviceId) || \
 202       IS_PCH_VLV_USB_DEVICE_ID (DeviceId) || \
 203       IS_PCH_VLV_PCIE_DEVICE_ID (DeviceId) || \
 204       (DeviceId) == V_PCH_SMBUS_DEVICE_ID || \
 205       (DeviceId) == V_PCH_HDA_DEVICE_ID_0 || \
 206       (DeviceId) == V_PCH_HDA_DEVICE_ID_1 \
 207     )
 208
 209 #define IS_SUPPORTED_DEVICE_ID(DeviceId)  IS_PCH_VLV_DEVICE_ID (DeviceId)
 210
 211 #endif