Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Ppi/PchUsbPolicy.h

   1 /**
   2 **/
   3 /**
   4
   5 Copyright (c) 2012  - 2014, Intel Corporation. All rights reserved
   6
   7   This program and the accompanying materials are licensed and made available under
   8   the terms and conditions of the BSD License that accompanies this distribution.
   9   The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php.
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15
  16
  17   @file
  18   PchUsbPolicy.h
  19
  20   @brief
  21   PCH Usb policy PPI produced by a platform driver specifying
  22   various expected PCH Usb settings. This PPI is consumed by the
  23   PCH PEI drivers.
  24
  25 **/
  26 #ifndef _PCH_USB_POLICY_H_
  27 #define _PCH_USB_POLICY_H_
  28
  29 //
  30 // PCH Usb policy provided by platform for PEI phase
  31 //
  32
  33 #ifndef ECP_FLAG
  34 #include <PiPei.h>
  35 #endif
  36
  37 #include "PchRegs.h"
  38 #include <Protocol/PchPlatformPolicy.h>
  39
  40 #define PCH_USB_POLICY_PPI_GUID \
  41   { \
  42     0xc02b0573, 0x2b4e, 0x4a31, 0xa3, 0x1a, 0x94, 0x56, 0x7b, 0x50, 0x44, 0x2c \
  43   }
  44
  45 extern EFI_GUID                     gPchUsbPolicyPpiGuid;
  46
  47 typedef struct _PCH_USB_POLICY_PPI  PCH_USB_POLICY_PPI;
  48
  49 ///
  50 /// PPI revision number
  51 /// Any backwards compatible changes to this PPI will result in an update in the revision number
  52 /// Major changes will require publication of a new PPI
  53 ///
  54 /// Revision 1: Original version
  55 ///
  56 #define PCH_USB_POLICY_PPI_REVISION_1 1
  57
  58 ///
  59 /// Generic definitions for device enabling/disabling used by PCH code.
  60 ///
  61 #define PCH_DEVICE_ENABLE   1
  62 #define PCH_DEVICE_DISABLE  0
  63
  64 #define EHCI_MODE           1
  65
  66 struct _PCH_USB_POLICY_PPI {
  67   UINT8           Revision;
  68   PCH_USB_CONFIG  *UsbConfig;
  69   UINT8           Mode;
  70   UINTN           EhciMemBaseAddr;
  71   UINT32          EhciMemLength;
  72   UINTN           XhciMemBaseAddr;
  73 };
  74
  75 #endif