2 Platform Flash Access library.
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Library/BaseLib.h>
19 #include <Library/BaseMemoryLib.h>
20 #include <Library/DebugLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/PlatformFlashAccessLib.h>
23 //#include <Library/FlashDeviceLib.h>
24 #include <Library/MemoryAllocationLib.h>
25 #include <Protocol/Spi.h>
26 #include <Library/CacheMaintenanceLib.h>
27 #include "PchAccess.h"
28 #include <Library/IoLib.h>
29 #include <Library/UefiLib.h>
30 #include <Library/UefiBootServicesTableLib.h>
31 #include <Library/PrintLib.h>
33 //#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
34 //#define ALINGED_SIZE SECTOR_SIZE_64KB
36 #define BLOCK_SIZE 0x1000
37 #define ALINGED_SIZE BLOCK_SIZE
39 #define R_PCH_LPC_BIOS_CNTL 0xDC
40 #define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20 ///< SMM BIOS write protect disable
43 // Prefix Opcode Index on the host SPI controller
46 SPI_WREN
, // Prefix Opcode 0: Write Enable
47 SPI_EWSR
, // Prefix Opcode 1: Enable Write Status Register
48 } PREFIX_OPCODE_INDEX
;
50 // Opcode Menu Index on the host SPI controller
53 SPI_READ_ID
, // Opcode 0: READ ID, Read cycle with address
54 SPI_READ
, // Opcode 1: READ, Read cycle with address
55 SPI_RDSR
, // Opcode 2: Read Status Register, No address
56 SPI_WRDI_SFDP
, // Opcode 3: Write Disable or Discovery Parameters, No address
57 SPI_SERASE
, // Opcode 4: Sector Erase (4KB), Write cycle with address
58 SPI_BERASE
, // Opcode 5: Block Erase (32KB), Write cycle with address
59 SPI_PROG
, // Opcode 6: Byte Program, Write cycle with address
60 SPI_WRSR
, // Opcode 7: Write Status Register, No address
63 STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress
;
65 EFI_SPI_PROTOCOL
*mSpiProtocol
;
68 Read NumBytes bytes of data from the address specified by
71 @param[in] Address The starting physical address of the read.
72 @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
73 of bytes actually read.
74 @param[out] Buffer The destination data buffer for the read.
76 @retval EFI_SUCCESS Opertion is successful.
77 @retval EFI_DEVICE_ERROR If there is any device errors.
84 IN OUT UINT32
*NumBytes
,
88 EFI_STATUS Status
= EFI_SUCCESS
;
91 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
94 //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) {
95 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
97 Status
= mSpiProtocol
->Execute (
113 Write NumBytes bytes of data from Buffer to the address specified by
116 @param[in] Address The starting physical address of the write.
117 @param[in,out] NumBytes On input, the number of bytes to write. On output,
118 the actual number of bytes written.
119 @param[in] Buffer The source data buffer for the write.
121 @retval EFI_SUCCESS Opertion is successful.
122 @retval EFI_DEVICE_ERROR If there is any device errors.
129 IN OUT UINT32
*NumBytes
,
136 UINT32 RemainingBytes
;
138 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
139 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
141 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
143 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
145 Status
= EFI_SUCCESS
;
146 RemainingBytes
= *NumBytes
;
148 while (RemainingBytes
> 0) {
149 if (RemainingBytes
> SIZE_4KB
) {
152 Length
= RemainingBytes
;
154 Status
= mSpiProtocol
->Execute (
166 if (EFI_ERROR (Status
)) {
169 RemainingBytes
-= Length
;
175 // Actual number of bytes written
177 *NumBytes
-= RemainingBytes
;
185 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
192 BlockSize
= BLOCK_SIZE
;
194 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &BlockSize
, ReadBuffer
);
200 Erase the block starting at Address.
202 @param[in] Address The starting physical address of the block to be erased.
203 This library assume that caller garantee that the PAddress
204 is at the starting address of this block.
205 @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
206 On output, the actual number of bytes erased.
208 @retval EFI_SUCCESS. Opertion is successful.
209 @retval EFI_DEVICE_ERROR If there is any device errors.
221 UINTN RemainingBytes
;
223 ASSERT (NumBytes
!= NULL
);
224 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
226 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
228 ASSERT ((*NumBytes
% SIZE_4KB
) == 0);
229 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
231 Status
= EFI_SUCCESS
;
232 RemainingBytes
= *NumBytes
;
235 // To adjust the Offset with Bios/Gbe
237 // if (Address >= (UINTN)PcdGet32 (PcdFlashChipBase)) {
238 // Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
240 while (RemainingBytes
> 0) {
241 Status
= mSpiProtocol
->Execute (
253 if (EFI_ERROR (Status
)) {
256 RemainingBytes
-= SIZE_4KB
;
262 // Actual number of bytes erased
264 *NumBytes
-= RemainingBytes
;
273 Erase the whole block.
277 BaseAddress - Base address of the block to be erased.
281 EFI_SUCCESS - The command completed successfully.
282 Other - Device error or wirte-locked, operation failed.
287 IN EFI_PHYSICAL_ADDRESS BaseAddress
293 NumBytes
= BLOCK_SIZE
;
295 Status
= SpiFlashBlockErase ((UINTN
) BaseAddress
, &NumBytes
);
301 InternalCompareBlock (
302 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
311 NumBytes
= BLOCK_SIZE
;
312 CompareBuffer
= AllocatePool (NumBytes
);
313 if (CompareBuffer
== NULL
) {
314 Status
= EFI_OUT_OF_RESOURCES
;
318 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &NumBytes
, CompareBuffer
);
319 if (EFI_ERROR (Status
)) {
322 CompareResult
= CompareMem (CompareBuffer
, Buffer
, BLOCK_SIZE
);
323 if (CompareResult
!= 0) {
324 Status
= EFI_VOLUME_CORRUPTED
;
328 if (CompareBuffer
!= NULL
) {
329 FreePool (CompareBuffer
);
339 Write a block of data.
343 BaseAddress - Base address of the block.
344 Buffer - Data buffer.
345 BufferSize - Size of the buffer.
349 EFI_SUCCESS - The command completed successfully.
350 EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.
351 Other - Device error or wirte-locked, operation failed.
356 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
363 Status
= SpiFlashWrite ((UINTN
) BaseAddress
, &BufferSize
, Buffer
);
365 if (EFI_ERROR (Status
)) {
366 DEBUG((DEBUG_ERROR
, "\nFlash write error."));
370 WriteBackInvalidateDataCacheRange ((VOID
*) (UINTN
) BaseAddress
, BLOCK_SIZE
);
372 Status
= InternalCompareBlock (BaseAddress
, Buffer
);
373 if (EFI_ERROR (Status
)) {
374 DEBUG((DEBUG_ERROR
, "\nError when writing to BaseAddress %x with different at offset %x.", BaseAddress
, Status
));
376 DEBUG((DEBUG_INFO
, "\nVerified data written to Block at %x is correct.", BaseAddress
));
384 Perform flash write opreation.
386 @param[in] FirmwareType The type of firmware.
387 @param[in] FlashAddress The address of flash device to be accessed.
388 @param[in] FlashAddressType The type of flash device address.
389 @param[in] Buffer The pointer to the data buffer.
390 @param[in] Length The length of data buffer in bytes.
392 @retval EFI_SUCCESS The operation returns successfully.
393 @retval EFI_WRITE_PROTECTED The flash device is read only.
394 @retval EFI_UNSUPPORTED The flash device access is unsupported.
395 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
400 IN PLATFORM_FIRMWARE_TYPE FirmwareType
,
401 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
402 IN FLASH_ADDRESS_TYPE FlashAddressType
,
407 EFI_STATUS Status
= EFI_SUCCESS
;
409 EFI_PHYSICAL_ADDRESS Address
;
414 UINTN LpcBaseAddress
;
425 DEBUG((DEBUG_INFO
| DEBUG_ERROR
, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN
)FlashAddress
, (UINTN
)FlashAddressType
, Length
));
426 if (FlashAddressType
== FlashAddressTypeRelativeAddress
) {
427 FlashAddress
= FlashAddress
+ mInternalFdAddress
;
430 CountOfBlocks
= (UINTN
) (Length
/ BLOCK_SIZE
);
431 Address
= FlashAddress
;
433 LpcBaseAddress
= MmPciAddress (0,
434 DEFAULT_PCI_BUS_NUMBER_PCH
,
435 PCI_DEVICE_NUMBER_PCH_LPC
,
436 PCI_FUNCTION_NUMBER_PCH_LPC
,
439 BiosCntl
= MmioRead8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
);
440 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
442 /// Clear SMM_BWP bit (D31:F0:RegDCh[5])
444 Data8And
= (UINT8
) ~B_PCH_LPC_BIOS_CNTL_SMM_BWP
;
448 LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
,
452 DEBUG((DEBUG_INFO
, "PerformFlashWrite Clear SMM_BWP bit\n"));
456 // Raise TPL to TPL_NOTIFY to block any event handler,
457 // while still allowing RaiseTPL(TPL_NOTIFY) within
458 // output driver during Print()
460 OldTpl
= gBS
->RaiseTPL (TPL_NOTIFY
);
461 for (Index
= 0; Index
< CountOfBlocks
; Index
++) {
463 // Handle block based on address and contents.
465 if (!EFI_ERROR (InternalCompareBlock (Address
, Buf
))) {
466 DEBUG((DEBUG_INFO
, "Skipping block at 0x%lx (already programmed)\n", Address
));
469 // Display a dot for each block being updated.
474 // Make updating process uninterruptable,
475 // so that the flash memory area is not accessed by other entities
476 // which may interfere with the updating process
478 Status
= InternalEraseBlock (Address
);
479 if (EFI_ERROR(Status
)) {
480 gBS
->RestoreTPL (OldTpl
);
484 Status
= InternalWriteBlock (
487 (UINT32
)(Length
> BLOCK_SIZE
? BLOCK_SIZE
: Length
)
489 if (EFI_ERROR(Status
)) {
490 gBS
->RestoreTPL (OldTpl
);
497 // Move to next block to update.
499 Address
+= BLOCK_SIZE
;
501 if (Length
> BLOCK_SIZE
) {
502 Length
-= BLOCK_SIZE
;
507 gBS
->RestoreTPL (OldTpl
);
510 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
512 // Restore original control setting
514 MmioWrite8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
, BiosCntl
);
518 // Print flash update failure message if error detected.
521 Print (L
"No %r\n", Status
);
528 Perform microcode write opreation.
530 @param[in] FlashAddress The address of flash device to be accessed.
531 @param[in] Buffer The pointer to the data buffer.
532 @param[in] Length The length of data buffer in bytes.
534 @retval EFI_SUCCESS The operation returns successfully.
535 @retval EFI_WRITE_PROTECTED The flash device is read only.
536 @retval EFI_UNSUPPORTED The flash device access is unsupported.
537 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
541 MicrocodeFlashWrite (
542 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
547 EFI_PHYSICAL_ADDRESS AlignedFlashAddress
;
554 DEBUG((DEBUG_INFO
, "MicrocodeFlashWrite - 0x%x - 0x%x\n", (UINTN
)FlashAddress
, Length
));
557 // Need make buffer 64K aligned to support ERASE
559 // [Aligned] FlashAddress [Aligned]
562 // +--------------+========+------------+
563 // | OffsetHeader | Length | OffsetTail |
564 // +--------------+========+------------+
566 // |<-----------AlignedLength----------->
568 // AlignedFlashAddress
570 OffsetHead
= FlashAddress
& (ALINGED_SIZE
- 1);
571 OffsetTail
= (FlashAddress
+ Length
) & (ALINGED_SIZE
- 1);
572 if (OffsetTail
!= 0) {
573 OffsetTail
= ALINGED_SIZE
- OffsetTail
;
576 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
577 AlignedFlashAddress
= FlashAddress
- OffsetHead
;
578 AlignedLength
= Length
+ OffsetHead
+ OffsetTail
;
580 AlignedBuffer
= AllocatePool(AlignedLength
);
581 if (AlignedBuffer
== NULL
) {
582 return EFI_OUT_OF_RESOURCES
;
585 // Save original buffer
587 if (OffsetHead
!= 0) {
588 CopyMem((UINT8
*)AlignedBuffer
, (VOID
*)(UINTN
)AlignedFlashAddress
, OffsetHead
);
590 if (OffsetTail
!= 0) {
591 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
+ Length
, (VOID
*)(UINTN
)(AlignedFlashAddress
+ OffsetHead
+ Length
), OffsetTail
);
594 // Override new buffer
596 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
, Buffer
, Length
);
598 AlignedFlashAddress
= FlashAddress
;
599 AlignedBuffer
= Buffer
;
600 AlignedLength
= Length
;
603 Status
= PerformFlashWrite(
604 PlatformFirmwareTypeSystemFirmware
,
606 FlashAddressTypeAbsoluteAddress
,
610 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
611 FreePool (AlignedBuffer
);
617 Platform Flash Access Lib Constructor.
621 PerformFlashAccessLibConstructor (
626 mInternalFdAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)PcdGet32(PcdFlashAreaBaseAddress
);
627 DEBUG((DEBUG_INFO
, "PcdFlashAreaBaseAddress - 0x%x\n", mInternalFdAddress
));
629 Status
= gBS
->LocateProtocol (
630 &gEfiSpiProtocolGuid
,
632 (VOID
**) &mSpiProtocol
634 ASSERT_EFI_ERROR(Status
);