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1 /*++
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5 This program and the accompanying materials are licensed and made available under
6 the terms and conditions of the BSD License that accompanies this distribution.
7 The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13
14
15
16 Module Name:
17
18 Fd.h
19
20 Abstract:
21
22 EFI Intel82802AB/82802AC Firmware Hub.
23
24
25 --*/
26
27
28 //
29 // Supported SPI devices
30 //
31
32 //
33 // MFG and Device code
34 //
35 #define SST_25LF040A 0x0044BF
36 #define SST_25LF040 0x0040BF
37 #define SST_25LF080A 0x0080BF
38 #define SST_25VF080B 0x008EBF
39 #define SST_25VF016B 0x0041BF
40 #define SST_25VF032B 0x004ABF
41
42 #define PMC_25LV040 0x007E9D
43
44 #define ATMEL_26DF041 0x00441F
45 #define Atmel_AT26F004 0x00041F
46 #define Atmel_AT26DF081A 0x01451F
47 #define Atmel_AT25DF161 0x02461F
48 #define Atmel_AT26DF161 0x00461F
49 #define Atmel_AT25DF641 0x00481F
50 #define Atmel_AT26DF321 0x00471F
51
52 #define Macronix_MX25L8005 0x1420C2
53 #define Macronix_MX25L1605A 0x1520C2
54 #define Macronix_MX25L3205D 0x1620C2
55
56 #define STMicro_M25PE80 0x148020
57
58 #define Winbond_W25X40 0x1330EF
59 #define Winbond_W25X80 0x1430EF
60 #define Winbond_W25Q80 0x1440EF
61
62 #define Winbond_W25X16 0x1540EF // W25Q16
63 #define Winbond_W25X32 0x1630EF
64
65 //
66 // NOTE: Assuming that 8Mbit flash will only contain a 4Mbit binary.
67 // Treating 4Mbit and 8Mbit devices the same.
68 //
69
70 //
71 // BIOS Base Address
72 //
73 #define BIOS_BASE_ADDRESS_4M 0xFFF80000
74 #define BIOS_BASE_ADDRESS_8M 0xFFF00000
75 #define BIOS_BASE_ADDRESS_16M 0xFFE00000
76
77 //
78 // block and sector sizes
79 //
80 #define SECTOR_SIZE_256BYTE 0x100 // 256byte page size
81 #define SECTOR_SIZE_4KB 0x1000 // 4kBytes sector size
82 #define BLOCK_SIZE_32KB 0x00008000 // 32Kbytes block size
83 #define MAX_FLASH_SIZE 0x00400000 // 32Mbit (Note that this can also be used for the 4Mbit & 8Mbit)
84
85 //
86 // Flash commands
87 //
88 #define SPI_SST25LF_COMMAND_WRITE 0x02
89 #define SPI_SST25LF_COMMAND_READ 0x03
90 #define SPI_SST25LF_COMMAND_ERASE 0x20
91 #define SPI_SST25LF_COMMAND_WRITE_DISABLE 0x04
92 #define SPI_SST25LF_COMMAND_READ_STATUS 0x05
93 #define SPI_SST25LF_COMMAND_WRITE_ENABLE 0x06
94 #define SPI_SST25LF_COMMAND_READ_ID 0xAB
95 #define SPI_SST25LF_COMMAND_WRITE_S_EN 0x50
96 #define SPI_SST25LF_COMMAND_WRITE_S 0x01
97
98 #define SPI_PMC25LV_COMMAND_WRITE 0x02
99 #define SPI_PMC25LV_COMMAND_READ 0x03
100 #define SPI_PMC25LV_COMMAND_ERASE 0xD7
101 #define SPI_PMC25LV_COMMAND_WRITE_DISABLE 0x04
102 #define SPI_PMC25LV_COMMAND_READ_STATUS 0x05
103 #define SPI_PMC25LV_COMMAND_WRITE_ENABLE 0x06
104 #define SPI_PMC25LV_COMMAND_READ_ID 0xAB
105 #define SPI_PMC25LV_COMMAND_WRITE_S_EN 0x06
106 #define SPI_PMC25LV_COMMAND_WRITE_S 0x01
107
108 #define SPI_AT26DF_COMMAND_WRITE 0x02
109 #define SPI_AT26DF_COMMAND_READ 0x03
110 #define SPI_AT26DF_COMMAND_ERASE 0x20
111 #define SPI_AT26DF_COMMAND_WRITE_DISABLE 0x00
112 #define SPI_AT26DF_COMMAND_READ_STATUS 0x05
113 #define SPI_AT26DF_COMMAND_WRITE_ENABLE 0x00
114 #define SPI_AT26DF_COMMAND_READ_ID 0x9F
115 #define SPI_AT26DF_COMMAND_WRITE_S_EN 0x00
116 #define SPI_AT26DF_COMMAND_WRITE_S 0x00
117
118 #define SPI_AT26F_COMMAND_WRITE 0x02
119 #define SPI_AT26F_COMMAND_READ 0x03
120 #define SPI_AT26F_COMMAND_ERASE 0x20
121 #define SPI_AT26F_COMMAND_WRITE_DISABLE 0x04
122 #define SPI_AT26F_COMMAND_READ_STATUS 0x05
123 #define SPI_AT26F_COMMAND_WRITE_ENABLE 0x06
124 #define SPI_AT26F_COMMAND_JEDEC_ID 0x9F
125 #define SPI_AT26F_COMMAND_WRITE_S_EN 0x00
126 #define SPI_AT26F_COMMAND_WRITE_S 0x01
127 #define SPI_AT26F_COMMAND_WRITE_UNPROTECT 0x39
128
129 #define SPI_SST25VF_COMMAND_WRITE 0x02
130 #define SPI_SST25VF_COMMAND_READ 0x03
131 #define SPI_SST25VF_COMMAND_ERASE 0x20
132 #define SPI_SST25VF_COMMAND_WRITE_DISABLE 0x04
133 #define SPI_SST25VF_COMMAND_READ_STATUS 0x05
134 #define SPI_SST25VF_COMMAND_WRITE_ENABLE 0x06
135 #define SPI_SST25VF_COMMAND_READ_ID 0xAB
136 #define SPI_SST25VF_COMMAND_JEDEC_ID 0x9F
137 #define SPI_SST25VF_COMMAND_WRITE_S_EN 0x50
138 #define SPI_SST25VF_COMMAND_WRITE_S 0x01
139
140 #define SPI_STM25PE_COMMAND_WRITE 0x02
141 #define SPI_STM25PE_COMMAND_READ 0x03
142 #define SPI_STM25PE_COMMAND_ERASE 0xDB
143 #define SPI_STM25PE_COMMAND_WRITE_DISABLE 0x04
144 #define SPI_STM25PE_COMMAND_READ_STATUS 0x05
145 #define SPI_STM25PE_COMMAND_WRITE_ENABLE 0x06
146 #define SPI_STM25PE_COMMAND_JEDEC_ID 0x9F
147
148 #define SPI_WinbondW25X_COMMAND_WRITE_S 0x01
149 #define SPI_WinbondW25X_COMMAND_WRITE 0x02
150 #define SPI_WinbondW25X_COMMAND_READ 0x03
151 #define SPI_WinbondW25X_COMMAND_READ_STATUS 0x05
152 #define SPI_WinbondW25X_COMMAND_ERASE_S 0x20
153 #define SPI_WinbondW25X_COMMAND_WRITE_ENABLE 0x06
154 #define SPI_WinbondW25X_COMMAND_JEDEC_ID 0x9F
155
156 //
157 // SPI default opcode slots
158 //
159 #define SPI_OPCODE_WRITE_INDEX 0
160 #define SPI_OPCODE_READ_INDEX 1
161 #define SPI_OPCODE_ERASE_INDEX 2
162 #define SPI_OPCODE_READ_S_INDEX 3
163 #define SPI_OPCODE_READ_ID_INDEX 4
164 #define SPI_OPCODE_WRITE_S_INDEX 6
165 #define SPI_OPCODE_WRITE_UNPROTECT_INDEX 7
166
167 #define SPI_PREFIX_WRITE_S_EN 1
168 #define SPI_PREFIX_WRITE_EN 0
169
170 //
171 // Atmel AT26F00x
172 //
173 #define B_AT26F_STS_REG_SPRL 0x80
174 #define B_AT26F_STS_REG_SWP 0x0C
175
176 //
177 // Block lock bit definitions:
178 //
179 #define READ_LOCK 0x04
180 #define LOCK_DOWN 0x02
181 #define WRITE_LOCK 0x01
182 #define FULL_ACCESS 0x00
183
184 //
185 // Function Prototypes
186 //
187 EFI_STATUS
188 FlashGetNextBlock (
189 IN UINTN* Key,
190 OUT EFI_PHYSICAL_ADDRESS* BlockAddress,
191 OUT UINTN* BlockSize
192 );
193
194 EFI_STATUS
195 FlashGetSize (
196 OUT UINTN* Size
197 );
198
199 EFI_STATUS
200 FlashGetUniformBlockSize (
201 OUT UINTN* Size
202 );
203
204 EFI_STATUS
205 FlashEraseWithNoTopSwapping (
206 IN UINT8 *BaseAddress,
207 IN UINTN NumBytes
208 );
209
210 EFI_STATUS
211 FlashErase (
212 IN UINT8 *BaseAddress,
213 IN UINTN NumBytes
214 );
215
216 EFI_STATUS
217 FlashWriteWithNoTopSwapping (
218 IN UINT8* DstBufferPtr,
219 IN UINT8* SrcBufferPtr,
220 IN UINTN NumBytes
221 );
222
223 EFI_STATUS
224 FlashWrite (
225 IN UINT8 *DstBufferPtr,
226 IN UINT8 *SrcBufferPtr,
227 IN UINTN NumBytes
228 );
229
230 EFI_STATUS
231 FlashReadWithNoTopSwapping (
232 IN UINT8 *BaseAddress,
233 IN UINT8 *DstBufferPtr,
234 IN UINTN NumBytes
235 );
236
237 EFI_STATUS
238 FlashRead (
239 IN UINT8 *BaseAddress,
240 IN UINT8 *DstBufferPtr,
241 IN UINTN NumBytes
242 );
243
244 EFI_STATUS
245 FlashLockWithNoTopSwapping (
246 IN UINT8* BaseAddress,
247 IN UINTN NumBytes,
248 IN UINT8 LockState
249 );
250
251 EFI_STATUS
252 FlashLock(
253 IN UINT8 *BaseAddress,
254 IN UINTN NumBytes,
255 IN UINT8 LockState
256 );
257
258 EFI_STATUS
259 CheckIfErased(
260 IN UINT8 *DstBufferPtr,
261 IN UINTN NumBytes
262 );
263
264 EFI_STATUS
265 CheckIfFlashIsReadyForWrite (
266 IN UINT8 *DstBufferPtr,
267 IN UINT8 *SrcBufferPtr,
268 IN UINTN NumBytes
269 );