Vlv2TbltDevicePkg/Include/Protocol/CK505ClockPlatformInfo.h

   1 /*++
   2
   3   Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
   4
   5   This program and the accompanying materials are licensed and made available under
   6   the terms and conditions of the BSD License that accompanies this distribution.
   7   The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13
  14 Module Name:
  15
  16   CK505ClockPlatformInfo.h
  17
  18 Abstract:
  19
  20   Protocol to communicate product clock routing information.
  21
  22 GUID Info:
  23  {3C485EA4-449A-46ce-BB08-2A336EA96B4E}
  24  0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e);
  25
  26 **/
  27
  28 #ifndef _CLOCK_PLATFORM_INFO_H_
  29 #define _CLOCK_PLATFORM_INFO_H_
  30
  31
  32 #define EFI_CK505_CLOCK_PLATFORM_INFO_GUID  \
  33   {0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e}
  34
  35 //
  36 // Structure to hold register modifications
  37 //
  38 typedef enum {
  39   None           = 0x00000000,
  40   nICS9LP505_1   = 0x00000001,
  41   nICS9LP505_2   = 0x00000002,
  42   nIDTCV163      = 0x00000004,
  43   nIDTCV174      = 0x00000008,
  44   nSLG505YC56    = 0x00000010,
  45   nSLG505YC64    = 0x00000020,
  46   nCY28505       = 0x00000040,
  47   nCY28505_2     = 0x00000080,
  48   nCY28505LF     = 0x00000100,
  49   nPI6C505_OLD   = 0x00000200,
  50   nPI6C505_RevD  = 0x00000400,
  51   nGENERIC_505   = 0x00000800,
  52   nSLG505YC264   = 0x00001000,
  53   nIDTCV183      = 0x00002000,
  54   nSLG505YC256   = 0x00004000,
  55   nIDTCV184      = 0x00008000,
  56   nIDTCV190      = 0x00010000,
  57   All            = 0xFFFFFFFF
  58 } EFI_CLOCKS_SUPPORTED;
  59
  60 typedef enum {
  61   Disabled,
  62   Enabled,
  63   EnabledWithoutSwitch,
  64   EnabledWithSwitch
  65 } EFI_SIGNAL_STATE;
  66
  67 typedef enum {
  68   SrcClk11,
  69   SrcClk10,
  70   SrcClk9,
  71   SrcClk8,
  72   SrcClk7,
  73   SrcClk6,
  74   SrcClk5,
  75   SrcClk4,
  76   SrcClk3,
  77   SrcClk2,
  78   SrcClk1,
  79   SrcClk0,
  80   CpuClk1,
  81   CpuClk0,
  82   Ref0,
  83   Dot96,
  84   Usb48,
  85   PciClkF5,
  86   PciClk4,
  87   PciClk3,
  88   PciClk2,
  89   PciClk1,
  90   PciClk0,
  91   SaveClockConfiguration,
  92   MePresent,
  93   Cr_A,
  94   Cr_B,
  95   Cr_C,
  96   Cr_D,
  97   Cr_E,
  98   Cr_F,
  99   Cr_G,
 100   Cr_H,
 101   Clk_None // Dummy entry for dynamic detection
 102 } EFI_CLOCK_SIGNAL_NAME;
 103
 104 typedef struct {
 105   EFI_CLOCK_SIGNAL_NAME     Signal;
 106   EFI_SIGNAL_STATE          State;
 107   EFI_CLOCKS_SUPPORTED      Supported;
 108 } EFI_STATIC_SIGNALS;
 109
 110 typedef struct {
 111   BOOLEAN               BehindBridge;
 112   UINT16                BridgeBus;
 113   UINT16                BridgeDev;
 114   UINT16                BridgeFunction;
 115   UINT16                TargetDevice;
 116   EFI_CLOCK_SIGNAL_NAME Signal;
 117 } EFI_DYNAMIC_SIGNALS;
 118
 119
 120 typedef struct {
 121   EFI_STATIC_SIGNALS      *StaticClockTable;
 122   UINTN                   StaticClockTableCount;
 123   EFI_STATIC_SIGNALS      *SxClockTable;
 124   UINTN                   SxClockTableCount;
 125   EFI_STATIC_SIGNALS      *DynamicDisabledClocksTable;
 126   UINTN                   DynamicDisabledClocksTableCount;
 127 } EFI_CLOCK_PLATFORM_INFO;
 128
 129 extern EFI_GUID gEfiCk505ClockPlatformInfoGuid;
 130
 131 #endif