Vlv2TbltDevicePkg/Include/Protocol/LpcWpc83627Policy.h

   1 /*++
   2
   3   Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
   4
   5   This program and the accompanying materials are licensed and made available under
   6   the terms and conditions of the BSD License that accompanies this distribution.
   7   The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13
  14
  15 Module Name:
  16
  17   LpcWpc83667Policy.h
  18
  19 Abstract:
  20
  21   Protocol used for WPC83627 Policy definition.
  22 -------------------------------------------------------------------------------
  23    Rev   Date<MM/DD/YYYY>    Name    Description
  24   -------------------------------------------------------------------------------
  25   R01   < 4/22/2011>         LB     Update driver for Sio83627UGH support.
  26   -------------------------------------------------------------------------------
  27 **/
  28
  29 #ifndef _WPC83627_POLICY_PROTOCOL_H_
  30 #define _WPC83627_POLICY_PROTOCOL_H_
  31
  32 EFI_FORWARD_DECLARATION (EFI_WPC83627_POLICY_PROTOCOL);
  33
  34 #define EFI_WPC83627_POLICY_PROTOCOL_GUID \
  35   { \
  36     0xd3ecc567, 0x9fd5, 0x44c1, 0x86, 0xcf, 0x5d, 0xa7, 0xa2, 0x4f, 0x4b, 0x5d \
  37   }
  38
  39 #define EFI_WPC83627_COM1_ENABLE          0x01
  40 #define EFI_WPC83627_COM2_ENABLE          0x01
  41
  42 #define EFI_WPC83627_COM3_ENABLE          0x01
  43 #define EFI_WPC83627_COM4_ENABLE          0x01
  44
  45 #define EFI_WPC83627_LPT1_ENABLE          0x01
  46 #define EFI_WPC83627_LPT1_ENABLE          0x01
  47 #define EFI_WPC83627_FDD_ENABLE           0x01
  48 #define EFI_WPC83627_FDD_WRITE_ENABLE     0x01
  49 #define EFI_WPC83627_PS2_KBC_ENABLE       0x01
  50 #define EFI_WPC83627_ECIR_ENABLE          0x01
  51
  52 #define EFI_WPC83627_COM1_DISABLE         0x00
  53 #define EFI_WPC83627_COM2_DISABLE         0x00
  54
  55 #define EFI_WPC83627_COM3_DISABLE         0x00
  56 #define EFI_WPC83627_COM4_DISABLE         0x00
  57
  58 #define EFI_WPC83627_LPT1_DISABLE         0x00
  59 #define EFI_WPC83627_FDD_DISABLE          0x00
  60 #define EFI_WPC83627_FDD_WRITE_PROTECT    0x00
  61 #define EFI_WPC83627_PS2_KBC_DISABLE      0x00
  62 #define EFI_WPC83627_ECIR_DISABLE         0x00
  63 #define EFI_WPC83627_RESERVED_DEFAULT     0x00
  64
  65 typedef struct {
  66   UINT16  Com1               :1;             // 0 = Disable, 1 = Enable
  67   UINT16  Lpt1               :1;             // 0 = Disable, 1 = Enable
  68   UINT16  Floppy             :1;             // 0 = Disable, 1 = Enable
  69   UINT16  FloppyWriteProtect :1;             // 0 = Write Protect, 1 = Write Enable
  70   UINT16  Port80             :1;             // 0 = Disable, 1 = Enable
  71   UINT16  CIR                :1;             // CIR enable or disable
  72   UINT16  Ps2Keyboard        :1;             // 0 = Disable, 1 = Enable
  73   UINT16  Ps2Mouse           :1;             // 0 = Disable, 1 = Enable
  74   UINT16  Com2               :1;             // 0 = Disable, 1 = Enable
  75
  76   UINT16  Com3               :1;             // 0 = Disable, 1 = Enable
  77   UINT16  Com4               :1;             // 0 = Disable, 1 = Enable
  78
  79   UINT16  Dac                :1;             // 0 = Disable, 1 = Enable
  80   UINT16  Rsvd               :6;
  81 } EFI_WPC83627_DEVICE_ENABLES;
  82
  83 typedef enum {
  84   LptModeOutput,
  85   LptModeBiDirectional,
  86   LptModeEpp,
  87   LptModeEcp
  88 } EFI_LPT_MODE;
  89
  90 typedef struct _EFI_WPC83627_POLICY_PROTOCOL {
  91   EFI_WPC83627_DEVICE_ENABLES DeviceEnables;
  92   EFI_LPT_MODE              LptMode;
  93 } EFI_WPC83627_POLICY_PROTOCOL;
  94
  95 extern EFI_GUID gEfiLpcWpc83627PolicyProtocolGuid;
  96
  97 #endif