Vlv2TbltDevicePkg/PlatformDxe/ClockControl.c

   1 /** @file
   2
   3   Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
   4
   5   This program and the accompanying materials are licensed and made available under
   6   the terms and conditions of the BSD License that accompanies this distribution.
   7   The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13
  14 Module Name:
  15
  16
  17   ClockControl.c
  18
  19 Abstract:
  20
  21   Sets platform/SKU specific clock routing information.
  22
  23
  24
  25 --*/
  26
  27 #include "PlatformDxe.h"
  28 #include <Protocol/CK505ClockPlatformInfo.h>
  29
  30 //
  31 // Default clock routing informtion (All On)
  32 //
  33 EFI_CLOCK_PLATFORM_INFO mDefClockPolicy = {NULL, 0, NULL, 0, NULL, 0};
  34
  35 //
  36 // Clock Settings
  37 //
  38 // Static clock table.
  39 //  This should be used to define any clock settings that are static
  40 //  (Always On or Always Off).  Dynamic clocks should be set to enabled
  41 //  in this table.
  42 //
  43 EFI_STATIC_SIGNALS mAtxStaticClocks[] = {
  44   {SrcClk8,   Enabled,  All},
  45   {SrcClk7,   Enabled,  All},
  46   {SrcClk6,   Enabled,  All},
  47   {SrcClk5,   Enabled,  All},
  48   {SrcClk4,   Enabled,  All},
  49   {SrcClk3,   Enabled,  All},
  50   {SrcClk2,   Enabled,  All},
  51   {SrcClk1,   Enabled,  All},
  52   {SrcClk0,   Enabled,  All},
  53   {Ref0,      Enabled,  All},
  54   {Dot96,     Enabled,  All},
  55   {Usb48,     Enabled,  All},
  56   {PciClkF5,  Enabled,  All},
  57   {PciClk0,   Enabled,  All},
  58   {PciClk2,   Enabled,  All},
  59   {PciClk3,   Enabled,  All},
  60   {PciClk4,   Disabled,  All},
  61   {Cr_B,   EnabledWithSwitch,  All},
  62 };
  63
  64 //
  65 // ClockSxInfo Table
  66 //  This is a list of clocks that need to be set to a known state when the
  67 //  system enters S4 or S5.
  68 //
  69 EFI_STATIC_SIGNALS mAtxSxClocks[] = {
  70   {SaveClockConfiguration, Disabled, All}
  71 };
  72
  73 //
  74 // ATX settings structure
  75 //
  76 EFI_CLOCK_PLATFORM_INFO mAtxClockSettings = {
  77   mAtxStaticClocks,
  78   sizeof(mAtxStaticClocks) / sizeof(mAtxStaticClocks[0]),
  79   mAtxSxClocks,
  80   sizeof(mAtxSxClocks) / sizeof(mAtxSxClocks[0])
  81 };
  82
  83 #if defined( RVP_SUPPORT ) && RVP_SUPPORT
  84 //
  85 // RVP Clock Settings
  86 //
  87 // Static clock table.
  88 //  This should be used to define any clock settings that are static
  89 //  (Always On or Always Off).  Dynamic clocks should be set to enabled
  90 //  in this table.
  91 //
  92 //UPSD_TBD Check with Jan if any porting required.
  93 //
  94 EFI_STATIC_SIGNALS mRvpStaticClocks[] = {
  95   {SrcClk11,  Enabled,  All},     // Not used/not present but leave coding enabled
  96   {SrcClk10,  Enabled,  All},     // Not used/not present but leave coding enabled
  97   {SrcClk9,   Enabled,  All},     // Not used/not present but leave coding enabled
  98   {SrcClk8,   Enabled,  All},     // ICHSATAII
  99   {SrcClk7,   Enabled,  All},     // DPL_REFSSCLKIN
 100   {SrcClk6,   Enabled,  All},     // 100M_MCH
 101   {SrcClk5,   Enabled,  All},     // Mini-PCIe  //TODO PNV: Need to check ICH GPIO38:
 102                                                 // 0: turn on; 1: turn off
 103   {SrcClk4,   Enabled,  All},     // ICHSATA
 104   {SrcClk3,   Enabled,  All},     // 100M_ICH
 105   {SrcClk2,   Enabled,  All},     // 100M_LAN
 106   {SrcClk1,   Enabled,  All},     // 25M_LAN
 107   {SrcClk0,   Enabled,  All},     // 96M_DREF
 108   {Ref0,      Enabled,  All},
 109   {Dot96,     Enabled,  All},
 110   {Usb48,     Enabled,  All},
 111   {PciClkF5,  Enabled,  All},     // 33M_ICH
 112   {PciClk0,   Enabled,  All},     // 33M_RISER
 113   {PciClk1,   Enabled,  All},     // 33M_RISER
 114   {PciClk2,   Enabled,  All},     // VDD_Clock
 115   {PciClk3,   Enabled,  All},     // 33M_S1
 116   {PciClk4,   Enabled,  All},     // 33M_PA
 117 };
 118
 119 //
 120 // Dynamic clock table
 121 // This is used to determine if a clock should be left on or turned off based
 122 // on the presence of a device.  The bridge information is used so the bus
 123 // number for the device to be detected can be found.
 124 //
 125
 126 //
 127 // ClockSxInfo Table
 128 // This is a list of clocks that need to be set to a known state when the
 129 // system enters S4 or S5.
 130 //
 131 EFI_STATIC_SIGNALS mRvpSxClocks[] = {
 132   {SaveClockConfiguration, Disabled, All}
 133 };
 134
 135 //
 136 // RVP settings structure
 137 //
 138 EFI_CLOCK_PLATFORM_INFO mRvpClockSettings = {
 139   mRvpStaticClocks,
 140   sizeof(mRvpStaticClocks) / sizeof(mRvpStaticClocks[0]),
 141   0,  // No clocks will be turned off mRvpDynamicClocks,
 142   0, // No clocks will be turned off sizeof(mRvpDynamicClocks) / sizeof(mRvpDynamicClocks[0]),
 143   mRvpSxClocks,
 144   sizeof(mRvpSxClocks) / sizeof(mRvpSxClocks[0])
 145 };
 146 #endif
 147
 148 VOID
 149 InitializeClockRouting(
 150   )
 151 {
 152   EFI_STATUS                      Status;
 153   UINTN                           BoardIdVarSize;
 154   EFI_BOARD_FEATURES              BoardIdVar;
 155   EFI_CLOCK_PLATFORM_INFO         *ClockPolicy;
 156   EFI_HANDLE                      Handle;
 157
 158   ClockPolicy = &mDefClockPolicy;
 159
 160   //
 161   // Do modifications based on board type
 162   //
 163   BoardIdVarSize = sizeof (EFI_BOARD_FEATURES);
 164   Status = gRT->GetVariable (
 165                   BOARD_FEATURES_NAME,
 166                   &gEfiBoardFeaturesGuid,
 167                   NULL,
 168                   &BoardIdVarSize,
 169                   &BoardIdVar
 170                   );
 171   if (!EFI_ERROR (Status)) {
 172
 173 #if defined( RVP_SUPPORT ) && RVP_SUPPORT
 174     if (BoardIdVar & B_BOARD_FEATURES_RVP) {
 175       ClockPolicy = &mRvpClockSettings;
 176     }
 177 #else
 178
 179     //
 180     // Isolate board type information
 181     //
 182     BoardIdVar = BoardIdVar & (B_BOARD_FEATURES_FORM_FACTOR_ATX |
 183                                B_BOARD_FEATURES_FORM_FACTOR_BTX |
 184                                B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX |
 185                                B_BOARD_FEATURES_FORM_FACTOR_MICRO_BTX);
 186
 187     if (BoardIdVar == B_BOARD_FEATURES_FORM_FACTOR_ATX ||
 188         BoardIdVar == B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX) {
 189       ClockPolicy = &mAtxClockSettings;
 190     }
 191
 192 #endif
 193
 194   }
 195
 196   Handle = NULL;
 197   Status = gBS->InstallProtocolInterface (
 198                   &Handle,
 199                   &gEfiCk505ClockPlatformInfoGuid,
 200                   EFI_NATIVE_INTERFACE,
 201                   ClockPolicy
 202                   );
 203   ASSERT_EFI_ERROR(Status);
 204
 205 }
 206
 207