Vlv2TbltDevicePkg: Fix build issues in DSC/FDF
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
86 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
87
88 !if $(MINNOW2_FSP_BUILD) == TRUE
89 # put below PCD value setting into dsc file
90 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
91 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
95 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
96 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97
98 !endif
99 ################################################################################
100 #
101 # Following are lists of FD Region layout which correspond to the locations of different
102 # images within the flash device.
103 #
104 # Regions must be defined in ascending order and may not overlap.
105 #
106 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
107 # the pipe "|" character, followed by the size of the region, also in hex with the leading
108 # "0x" characters. Like:
109 # Offset|Size
110 # PcdOffsetCName|PcdSizeCName
111 # RegionType <FV, DATA, or FILE>
112 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
113 #
114 ################################################################################
115 #
116 # CPU Microcodes
117 #
118
119 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
120 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
121 FV = MICROCODE_FV
122 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
123 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
124 #NV_VARIABLE_STORE
125 DATA = {
126 ## This is the EFI_FIRMWARE_VOLUME_HEADER
127 # ZeroVector []
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 # FileSystemGuid: gEfiSystemNvDataFvGuid =
131 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
132 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
133 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
134 # FvLength: 0x80000
135 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
136 #Signature "_FVH" #Attributes
137 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
138 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
139 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
140 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
141 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
142 #Blockmap[1]: End
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
144 ## This is the VARIABLE_STORE_HEADER
145 !if $(SECURE_BOOT_ENABLE) == TRUE
146 #Signature: gEfiAuthenticatedVariableGuid =
147 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
148 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
149 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
150 !else
151 #Signature: gEfiVariableGuid =
152 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
153 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
154 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
155 !endif
156 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
157 # This can speed up the Variable Dispatch a bit.
158 0xB8, 0xDF, 0x03, 0x00,
159 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
160 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
161 }
162
163
164 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
165 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
166 #NV_FTW_WORKING
167 DATA = {
168 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
169 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
170 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
171 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
172
173 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
174 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
175 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
176 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
177 }
178
179 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
180 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
181
182 !if $(MINNOW2_FSP_BUILD) == TRUE
183
184 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
185 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
186 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
187
188
189 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
190 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
191
192 !endif
193
194 #
195 # Main Block
196 #
197 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
198 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
199 FV = FVMAIN_COMPACT
200
201 #
202 # FV Recovery#2
203 #
204 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
205 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
206 FV = FVRECOVERY2
207
208 #
209 # FV Recovery
210 #
211 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
212 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
213 FV = FVRECOVERY
214
215 ################################################################################
216 #
217 # FV Section
218 #
219 # [FV] section is used to define what components or modules are placed within a flash
220 # device file. This section also defines order the components and modules are positioned
221 # within the image. The [FV] section consists of define statements, set statements and
222 # module statements.
223 #
224 ################################################################################
225 [FV.MICROCODE_FV]
226 BlockSize = $(FLASH_BLOCK_SIZE)
227 FvAlignment = 16
228 ERASE_POLARITY = 1
229 MEMORY_MAPPED = TRUE
230 STICKY_WRITE = TRUE
231 LOCK_CAP = TRUE
232 LOCK_STATUS = FALSE
233 WRITE_DISABLED_CAP = TRUE
234 WRITE_ENABLED_CAP = TRUE
235 WRITE_STATUS = TRUE
236 WRITE_LOCK_CAP = TRUE
237 WRITE_LOCK_STATUS = TRUE
238 READ_DISABLED_CAP = TRUE
239 READ_ENABLED_CAP = TRUE
240 READ_STATUS = TRUE
241 READ_LOCK_CAP = TRUE
242 READ_LOCK_STATUS = TRUE
243
244 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
245 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin
246 }
247
248 !if $(RECOVERY_ENABLE)
249 [FV.FVRECOVERY_COMPONENTS]
250 FvAlignment = 16 #FV alignment and FV attributes setting.
251 ERASE_POLARITY = 1
252 MEMORY_MAPPED = TRUE
253 STICKY_WRITE = TRUE
254 LOCK_CAP = TRUE
255 LOCK_STATUS = TRUE
256 WRITE_DISABLED_CAP = TRUE
257 WRITE_ENABLED_CAP = TRUE
258 WRITE_STATUS = TRUE
259 WRITE_LOCK_CAP = TRUE
260 WRITE_LOCK_STATUS = TRUE
261 READ_DISABLED_CAP = TRUE
262 READ_ENABLED_CAP = TRUE
263 READ_STATUS = TRUE
264 READ_LOCK_CAP = TRUE
265 READ_LOCK_STATUS = TRUE
266
267 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
268 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
269 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
270 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
271 INF FatPkg/FatPei/FatPei.inf
272 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
273 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
274 !endif
275
276 ################################################################################
277 #
278 # FV Section
279 #
280 # [FV] section is used to define what components or modules are placed within a flash
281 # device file. This section also defines order the components and modules are positioned
282 # within the image. The [FV] section consists of define statements, set statements and
283 # module statements.
284 #
285 ################################################################################
286 [FV.FVRECOVERY2]
287 BlockSize = $(FLASH_BLOCK_SIZE)
288 FvAlignment = 16 #FV alignment and FV attributes setting.
289 ERASE_POLARITY = 1
290 MEMORY_MAPPED = TRUE
291 STICKY_WRITE = TRUE
292 LOCK_CAP = TRUE
293 LOCK_STATUS = TRUE
294 WRITE_DISABLED_CAP = TRUE
295 WRITE_ENABLED_CAP = TRUE
296 WRITE_STATUS = TRUE
297 WRITE_LOCK_CAP = TRUE
298 WRITE_LOCK_STATUS = TRUE
299 READ_DISABLED_CAP = TRUE
300 READ_ENABLED_CAP = TRUE
301 READ_STATUS = TRUE
302 READ_LOCK_CAP = TRUE
303 READ_LOCK_STATUS = TRUE
304 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
305
306
307
308 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
309
310 !if $(MINNOW2_FSP_BUILD) == FALSE
311 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
312 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
313 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
314 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
315 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
316 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
317 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
318 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
319 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
320 !endif
321
322 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
323 !if $(TPM_ENABLED) == TRUE
324 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
325 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
326 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
327 !endif
328 !if $(FTPM_ENABLE) == TRUE
329 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
330 !endif
331 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
332
333 !if $(ACPI50_ENABLE) == TRUE
334 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
335 !endif
336 !if $(PERFORMANCE_ENABLE) == TRUE
337 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
338 !endif
339
340 !if $(RECOVERY_ENABLE)
341 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
342 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
343 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
344 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
345 }
346 }
347 !endif
348
349 [FV.FVRECOVERY]
350 BlockSize = $(FLASH_BLOCK_SIZE)
351 FvAlignment = 16 #FV alignment and FV attributes setting.
352 ERASE_POLARITY = 1
353 MEMORY_MAPPED = TRUE
354 STICKY_WRITE = TRUE
355 LOCK_CAP = TRUE
356 LOCK_STATUS = TRUE
357 WRITE_DISABLED_CAP = TRUE
358 WRITE_ENABLED_CAP = TRUE
359 WRITE_STATUS = TRUE
360 WRITE_LOCK_CAP = TRUE
361 WRITE_LOCK_STATUS = TRUE
362 READ_DISABLED_CAP = TRUE
363 READ_ENABLED_CAP = TRUE
364 READ_STATUS = TRUE
365 READ_LOCK_CAP = TRUE
366 READ_LOCK_STATUS = TRUE
367 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
368
369
370 !if $(MINNOW2_FSP_BUILD) == TRUE
371 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
372 !else
373 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
374 !endif
375
376 INF MdeModulePkg/Core/Pei/PeiMain.inf
377 !if $(MINNOW2_FSP_BUILD) == TRUE
378 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
379 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
380 !endif
381 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
382 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
383 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
384
385 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
386
387 !if $(MINNOW2_FSP_BUILD) == FALSE
388 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
389 !endif
390
391 !if $(FTPM_ENABLE) == TRUE
392 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
393 !endif
394
395 !if $(SOURCE_DEBUG_ENABLE) == TRUE
396 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
397 !endif
398
399
400 !if $(CAPSULE_ENABLE) == TRUE
401 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
402 !if $(DXE_ARCHITECTURE) == "X64"
403 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
404 !endif
405 !endif
406
407 !if $(MINNOW2_FSP_BUILD) == FALSE
408 !if $(PCIESC_ENABLE) == TRUE
409 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
410 !endif
411 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
412 !endif
413
414 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
415
416 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
417 # FMP image decriptor
418 INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
419 !endif
420
421 [FV.FVMAIN]
422 BlockSize = $(FLASH_BLOCK_SIZE)
423 FvAlignment = 16
424 ERASE_POLARITY = 1
425 MEMORY_MAPPED = TRUE
426 STICKY_WRITE = TRUE
427 LOCK_CAP = TRUE
428 LOCK_STATUS = TRUE
429 WRITE_DISABLED_CAP = TRUE
430 WRITE_ENABLED_CAP = TRUE
431 WRITE_STATUS = TRUE
432 WRITE_LOCK_CAP = TRUE
433 WRITE_LOCK_STATUS = TRUE
434 READ_DISABLED_CAP = TRUE
435 READ_ENABLED_CAP = TRUE
436 READ_STATUS = TRUE
437 READ_LOCK_CAP = TRUE
438 READ_LOCK_STATUS = TRUE
439 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
440
441 APRIORI DXE {
442 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
443 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
444 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
445 }
446
447 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
448 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
449 }
450
451 #
452 # EDK II Related Platform codes
453 #
454
455 !if $(MINNOW2_FSP_BUILD) == TRUE
456 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
457 !endif
458
459 INF MdeModulePkg/Core/Dxe/DxeMain.inf
460 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
461 !if $(ACPI50_ENABLE) == TRUE
462 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
463 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
464 !endif
465
466
467 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
468 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
469 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
470 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
471 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
472 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
474 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
475 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
476 INF USE=X64 MdeModulePkg/Logo/Logo.inf
477 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
478 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
479 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
480 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
481
482 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
483 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
484 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
485 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
486 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
487 !if $(SECURE_BOOT_ENABLE)
488 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
489 !endif
490
491 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
492
493 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
494 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
495 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
496 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
497
498
499 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
500
501 !if $(DATAHUB_ENABLE) == TRUE
502 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
503 !endif
504 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
505 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
506
507 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
508
509 #
510 # EDK II Related Silicon codes
511 #
512 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
513
514 !if $(USE_HPET_TIMER) == TRUE
515 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
516 !else
517 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
518 !endif
519 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
520
521 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
522
523 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
524 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
525
526 !if $(MINNOW2_FSP_BUILD) == FALSE
527 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
528 !endif
529 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
530 !if $(PCIESC_ENABLE) == TRUE
531 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
532 !endif
533
534 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
535 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
536 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
537 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
538 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
539 !if $(MINNOW2_FSP_BUILD) == FALSE
540 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
541 !else
542 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
543 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
544 !endif
545 !if $(MINNOW2_FSP_BUILD) == FALSE
546 !if $(SEC_ENABLE) == TRUE
547 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
548 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
549 !endif
550 !endif
551 !if $(TPM_ENABLED) == TRUE
552 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
553 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
554 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
555 !endif
556 !if $(FTPM_ENABLE) == TRUE
557 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
558 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
559 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
560 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
561 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
562 !endif
563
564 #
565 # EDK II Related Platform codes
566 #
567 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
568 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
569 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
570 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
571 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
572 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
573 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
574 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
575 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
576 !if $(GOP_DRIVER_ENABLE) == TRUE
577 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
578 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
579 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
580 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
581 SECTION UI = "IntelGopDriver"
582 }
583 !endif
584
585 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
586 #
587 # SMM
588 #
589 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
590 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
591 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
592
593 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
594 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
595 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
596 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
597
598 #
599 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
600 #
601 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
602 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
603
604 #
605 # ACPI
606 #
607 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
608 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
609 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
610 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
611
612 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
613
614 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
615
616 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
617
618 #
619 # PCI
620 #
621 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
622
623 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
624
625
626 #
627 # ISA
628 #
629 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
630 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
631 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
632 !if $(SOURCE_DEBUG_ENABLE) != TRUE
633 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
634 !endif
635 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
636 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
637
638 #
639 # SDIO
640 #
641 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
642 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
643 #
644 # IDE/SCSI/AHCI
645 #
646 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
647
648 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
649
650 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
651 !if $(SATA_ENABLE) == TRUE
652 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
653 #
654
655 #
656 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
657 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
658 !if $(SCSI_ENABLE) == TRUE
659 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
660 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
661 !endif
662 #
663 !endif
664 # Console
665 #
666 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
667 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
668 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
669 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
670 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
671 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
672 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
673 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
674 #
675 # USB
676 #
677 !if $(USB_ENABLE) == TRUE
678 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
679 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
680 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
681 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
682 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
683 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
684 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
685 !endif
686
687 #
688 # ECP
689 #
690 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
691 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
692 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
693 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
694 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
695 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
696 #
697 # SMBIOS
698 #
699 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
700 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
701
702 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
703
704 #
705 # Legacy Modules
706 #
707 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
708
709 #
710 # FAT file system
711 #
712 INF FatPkg/EnhancedFatDxe/Fat.inf
713
714 #
715 # UEFI Shell
716 #
717 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
718 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
719 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
720 }
721
722 #
723 # dp command
724 #
725 !if $(PERFORMANCE_ENABLE) == TRUE
726 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
727 !endif
728
729 !if $(GOP_DRIVER_ENABLE) == TRUE
730 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
731 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
732 SECTION UI = "IntelGopVbt"
733 }
734 !endif
735
736 #
737 # Network Modules
738 #
739 !if $(NETWORK_ENABLE) == TRUE
740 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
741 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
742 SECTION UI = "UNDI"
743 }
744 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
745 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
746 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
747 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
748 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
749 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
750 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
751 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
752 !if $(NETWORK_IP6_ENABLE) == TRUE
753 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
754 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
755 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
756 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
757 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
758 !endif
759 !if $(NETWORK_IP6_ENABLE) == TRUE
760 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
761 INF NetworkPkg/TcpDxe/TcpDxe.inf
762 !else
763 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
764 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
765 !endif
766 !if $(NETWORK_VLAN_ENABLE) == TRUE
767 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
768 !endif
769 !if $(NETWORK_ISCSI_ENABLE) == TRUE
770 !if $(NETWORK_IP6_ENABLE) == TRUE
771 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
772 !else
773 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
774 !endif
775 !endif
776 !endif
777
778 !if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)
779 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
780 !endif
781 !if $(CAPSULE_ENABLE)
782 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
783 !endif
784 !if $(MICOCODE_CAPSULE_ENABLE)
785 INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
786 !endif
787
788 !if $(RECOVERY_ENABLE)
789 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
790 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
791 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
792 }
793 !endif
794
795 !if $(CAPSULE_ENABLE)
796 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
797 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
798 SECTION UI = "Pkcs7TestRoot"
799 }
800 !endif
801
802 [FV.FVMAIN_COMPACT]
803 BlockSize = $(FLASH_BLOCK_SIZE)
804 FvAlignment = 16
805 ERASE_POLARITY = 1
806 MEMORY_MAPPED = TRUE
807 STICKY_WRITE = TRUE
808 LOCK_CAP = TRUE
809 LOCK_STATUS = TRUE
810 WRITE_DISABLED_CAP = TRUE
811 WRITE_ENABLED_CAP = TRUE
812 WRITE_STATUS = TRUE
813 WRITE_LOCK_CAP = TRUE
814 WRITE_LOCK_STATUS = TRUE
815 READ_DISABLED_CAP = TRUE
816 READ_ENABLED_CAP = TRUE
817 READ_STATUS = TRUE
818 READ_LOCK_CAP = TRUE
819 READ_LOCK_STATUS = TRUE
820
821
822
823 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
824 !if $(LZMA_ENABLE) == TRUE
825 # LZMA Compress
826 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
827 SECTION FV_IMAGE = FVMAIN
828 }
829 !else
830 !if $(DXE_COMPRESS_ENABLE) == TRUE
831 # Tiano Compress
832 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
833 SECTION FV_IMAGE = FVMAIN
834 }
835 !else
836 # No Compress
837 SECTION COMPRESS PI_NONE {
838 SECTION FV_IMAGE = FVMAIN
839 }
840 !endif
841 !endif
842 }
843
844 [FV.SETUP_DATA]
845 BlockSize = $(FLASH_BLOCK_SIZE)
846 #NumBlocks = 0x10
847 FvAlignment = 16
848 ERASE_POLARITY = 1
849 MEMORY_MAPPED = TRUE
850 STICKY_WRITE = TRUE
851 LOCK_CAP = TRUE
852 LOCK_STATUS = TRUE
853 WRITE_DISABLED_CAP = TRUE
854 WRITE_ENABLED_CAP = TRUE
855 WRITE_STATUS = TRUE
856 WRITE_LOCK_CAP = TRUE
857 WRITE_LOCK_STATUS = TRUE
858 READ_DISABLED_CAP = TRUE
859 READ_ENABLED_CAP = TRUE
860 READ_STATUS = TRUE
861 READ_LOCK_CAP = TRUE
862 READ_LOCK_STATUS = TRUE
863
864
865 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
866 [FV.CapsuleDispatchFv]
867 FvAlignment = 16
868 ERASE_POLARITY = 1
869 MEMORY_MAPPED = TRUE
870 STICKY_WRITE = TRUE
871 LOCK_CAP = TRUE
872 LOCK_STATUS = TRUE
873 WRITE_DISABLED_CAP = TRUE
874 WRITE_ENABLED_CAP = TRUE
875 WRITE_STATUS = TRUE
876 WRITE_LOCK_CAP = TRUE
877 WRITE_LOCK_STATUS = TRUE
878 READ_DISABLED_CAP = TRUE
879 READ_ENABLED_CAP = TRUE
880 READ_STATUS = TRUE
881 READ_LOCK_CAP = TRUE
882 READ_LOCK_STATUS = TRUE
883
884 !if $(CAPSULE_ENABLE)
885 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
886 !endif
887
888 !endif
889
890 ################################################################################
891 #
892 # Rules are use with the [FV] section's module INF type to define
893 # how an FFS file is created for a given INF file. The following Rule are the default
894 # rules for the different module type. User can add the customized rules to define the
895 # content of the FFS file.
896 #
897 ################################################################################
898 [Rule.Common.SEC]
899 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
900 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
901 RAW BIN Align = 16 |.com
902 }
903
904 [Rule.Common.SEC.BINARY]
905 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
906 PE32 PE32 Align = 8 |.efi
907 RAW BIN Align = 16 |.com
908 }
909
910 [Rule.Common.PEI_CORE]
911 FILE PEI_CORE = $(NAMED_GUID) {
912 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
913 UI STRING="$(MODULE_NAME)" Optional
914 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
915 }
916
917 [Rule.Common.PEIM]
918 FILE PEIM = $(NAMED_GUID) {
919 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
920 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
921 UI STRING="$(MODULE_NAME)" Optional
922 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
923 }
924
925 [Rule.Common.PEIM.BINARY]
926 FILE PEIM = $(NAMED_GUID) {
927 PEI_DEPEX PEI_DEPEX Optional |.depex
928 PE32 PE32 Align = Auto |.efi
929 UI STRING="$(MODULE_NAME)" Optional
930 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
931 }
932
933 [Rule.Common.PEIM.BIOSID]
934 FILE PEIM = $(NAMED_GUID) {
935 RAW BIN BiosId.bin
936 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
937 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
938 UI STRING="$(MODULE_NAME)" Optional
939 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
940 }
941
942 [Rule.Common.USER_DEFINED.APINIT]
943 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
944 RAW SEC_BIN |.com
945 }
946 #cjia 2011-07-21
947 [Rule.Common.USER_DEFINED.LEGACY16]
948 FILE FREEFORM = $(NAMED_GUID) {
949 UI STRING="$(MODULE_NAME)" Optional
950 RAW BIN |.bin
951 }
952 #cjia
953
954 [Rule.Common.USER_DEFINED.ASM16]
955 FILE FREEFORM = $(NAMED_GUID) {
956 UI STRING="$(MODULE_NAME)" Optional
957 RAW BIN |.com
958 }
959
960 [Rule.Common.DXE_CORE]
961 FILE DXE_CORE = $(NAMED_GUID) {
962 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
963 UI STRING="$(MODULE_NAME)" Optional
964 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
965 }
966
967 [Rule.Common.UEFI_DRIVER]
968 FILE DRIVER = $(NAMED_GUID) {
969 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
970 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
971 UI STRING="$(MODULE_NAME)" Optional
972 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
973 }
974
975 [Rule.Common.UEFI_DRIVER.BINARY]
976 FILE DRIVER = $(NAMED_GUID) {
977 DXE_DEPEX DXE_DEPEX Optional |.depex
978 PE32 PE32 |.efi
979 UI STRING="$(MODULE_NAME)" Optional
980 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
981 }
982
983 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
984 FILE DRIVER = $(NAMED_GUID) {
985 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
986 PE32 PE32 |.efi
987 UI STRING="$(MODULE_NAME)" Optional
988 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
989 }
990
991 [Rule.Common.DXE_DRIVER]
992 FILE DRIVER = $(NAMED_GUID) {
993 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
994 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
995 UI STRING="$(MODULE_NAME)" Optional
996 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
997 }
998
999 [Rule.Common.DXE_DRIVER.BINARY]
1000 FILE DRIVER = $(NAMED_GUID) {
1001 DXE_DEPEX DXE_DEPEX Optional |.depex
1002 PE32 PE32 |.efi
1003 UI STRING="$(MODULE_NAME)" Optional
1004 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1005 }
1006
1007 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
1008 FILE DRIVER = $(NAMED_GUID) {
1009 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1010 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1011 UI STRING="$(MODULE_NAME)" Optional
1012 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1013 RAW ACPI Optional |.acpi
1014 RAW ASL Optional |.aml
1015 }
1016
1017 [Rule.Common.DXE_RUNTIME_DRIVER]
1018 FILE DRIVER = $(NAMED_GUID) {
1019 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1020 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1021 UI STRING="$(MODULE_NAME)" Optional
1022 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1023 }
1024
1025 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
1026 FILE DRIVER = $(NAMED_GUID) {
1027 DXE_DEPEX DXE_DEPEX Optional |.depex
1028 PE32 PE32 |.efi
1029 UI STRING="$(MODULE_NAME)" Optional
1030 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1031 }
1032
1033 [Rule.Common.DXE_SMM_DRIVER]
1034 FILE SMM = $(NAMED_GUID) {
1035 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1036 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1037 UI STRING="$(MODULE_NAME)" Optional
1038 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1039 }
1040
1041 [Rule.Common.DXE_SMM_DRIVER.BINARY]
1042 FILE SMM = $(NAMED_GUID) {
1043 SMM_DEPEX SMM_DEPEX |.depex
1044 PE32 PE32 |.efi
1045 RAW BIN Optional |.aml
1046 UI STRING="$(MODULE_NAME)" Optional
1047 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1048 }
1049
1050 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1051 FILE SMM = $(NAMED_GUID) {
1052 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1053 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1054 UI STRING="$(MODULE_NAME)" Optional
1055 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1056 RAW ACPI Optional |.acpi
1057 RAW ASL Optional |.aml
1058 }
1059
1060 [Rule.Common.SMM_CORE]
1061 FILE SMM_CORE = $(NAMED_GUID) {
1062 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1063 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1064 UI STRING="$(MODULE_NAME)" Optional
1065 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1066 }
1067
1068 [Rule.Common.SMM_CORE.BINARY]
1069 FILE SMM_CORE = $(NAMED_GUID) {
1070 DXE_DEPEX DXE_DEPEX Optional |.depex
1071 PE32 PE32 |.efi
1072 UI STRING="$(MODULE_NAME)" Optional
1073 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1074 }
1075
1076 [Rule.Common.UEFI_APPLICATION]
1077 FILE APPLICATION = $(NAMED_GUID) {
1078 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1079 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1080 UI STRING="$(MODULE_NAME)" Optional
1081 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1082 }
1083
1084 [Rule.Common.UEFI_APPLICATION.UI]
1085 FILE APPLICATION = $(NAMED_GUID) {
1086 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1087 UI STRING="Enter Setup"
1088 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1089 }
1090
1091 [Rule.Common.USER_DEFINED]
1092 FILE FREEFORM = $(NAMED_GUID) {
1093 UI STRING="$(MODULE_NAME)" Optional
1094 RAW BIN |.bin
1095 }
1096
1097 [Rule.Common.USER_DEFINED.BINARY]
1098 FILE FREEFORM = $(NAMED_GUID) {
1099 UI STRING="$(MODULE_NAME)" Optional
1100 RAW BIN |.bin
1101 }
1102
1103 [Rule.Common.USER_DEFINED.ACPITABLE]
1104 FILE FREEFORM = $(NAMED_GUID) {
1105 RAW ACPI Optional |.acpi
1106 RAW ASL Optional |.aml
1107 }
1108
1109 [Rule.Common.USER_DEFINED.ACPITABLE2]
1110 FILE FREEFORM = $(NAMED_GUID) {
1111 RAW ASL Optional |.aml
1112 }
1113
1114 [Rule.Common.ACPITABLE]
1115 FILE FREEFORM = $(NAMED_GUID) {
1116 RAW ACPI Optional |.acpi
1117 RAW ASL Optional |.aml
1118 }
1119
1120 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1121 FILE PEIM = $(NAMED_GUID) {
1122 RAW BIN |.acpi
1123 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1124 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1125 UI STRING="$(MODULE_NAME)" Optional
1126 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1127 }