Vlv2TbltDevicePkg/PlatformPkg.fdf

   1 #/** @file
   2 # FDF file of Platform.
   3 #
   4 # Copyright (c) 2008  - 2014, Intel Corporation. All rights reserved.<BR>
   5 #
   6 # This program and the accompanying materials are licensed and made available under
   7 # the terms and conditions of the BSD License that accompanies this distribution.
   8 # The full text of the license may be found at
   9 # http://opensource.org/licenses/bsd-license.php.
  10 #
  11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 #
  15 #**/
  16
  17 [Defines]
  18 DEFINE FLASH_BASE       = 0xFFD00000     #The base address of the 3Mb FLASH Device.
  19 DEFINE FLASH_SIZE       = 0x00300000     #The flash size in bytes of the 3Mb FLASH Device.
  20 DEFINE FLASH_BLOCK_SIZE = 0x1000        #The block size in bytes of the 3Mb FLASH Device.
  21 DEFINE FLASH_NUM_BLOCKS = 0x300           #The number of blocks in 3Mb FLASH Device.
  22 DEFINE FLASH_AREA_BASE_ADDRESS                                = 0xFF800000
  23 DEFINE FLASH_AREA_SIZE                                        = 0x00800000
  24
  25
  26 DEFINE FLASH_REGION_VPD_OFFSET                                = 0x00000000
  27 DEFINE FLASH_REGION_VPD_SIZE                                  = 0x0003E000
  28
  29 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0003E000
  30 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE   = 0x00002000
  31
  32
  33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET   = 0x00040000
  34 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE     = 0x00040000
  35
  36 !if $(MINNOW2_FSP_BUILD) == TRUE
  37 DEFINE FLASH_REGION_FSPBIN_OFFSET                             = 0x00080000
  38 DEFINE FLASH_REGION_FSPBIN_SIZE                               = 0x00048000
  39 DEFINE FLASH_REGION_FSPBIN_BASE                               = 0xFFD80000
  40
  41 DEFINE FLASH_REGION_AZALIABIN_OFFSET                          = 0x000C8000
  42 DEFINE FLASH_REGION_AZALIABIN_SIZE                            = 0x00008000
  43 DEFINE FLASH_REGION_AZALIABIN_BASE                            = 0xFFDC8000
  44
  45 !endif
  46
  47 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET                       = 0x000D0000
  48 DEFINE FLASH_REGION_VLVMICROCODE_SIZE                         = 0x00030000
  49 DEFINE FLASH_REGION_VLVMICROCODE_BASE                         = 0xFFDD0000
  50
  51 !if $(TARGET) == RELEASE
  52 DEFINE FLASH_REGION_FVMAIN_OFFSET                             = 0x00100000
  53 DEFINE FLASH_REGION_FVMAIN_SIZE                               = 0x001AF000
  54 !else
  55 DEFINE FLASH_REGION_FVMAIN_OFFSET                             = 0x00100000
  56 DEFINE FLASH_REGION_FVMAIN_SIZE                               = 0x001A6000
  57 !endif
  58
  59 !if $(TARGET) == RELEASE
  60 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET                       = 0x002AF000
  61 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE                         = 0x00021000
  62
  63 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET                        = 0x002D0000
  64 DEFINE FLASH_REGION_FV_RECOVERY_SIZE                          = 0x00030000
  65 !else
  66
  67 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET                       = 0x002A6000
  68 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE                         = 0x0002D000
  69
  70 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET                        = 0x002D3000
  71 DEFINE FLASH_REGION_FV_RECOVERY_SIZE                          = 0x0002D000
  72 !endif
  73
  74 ################################################################################
  75 #
  76 # FD Section
  77 # The [FD] Section is made up of the definition statements and a
  78 # description of what goes into  the Flash Device Image.  Each FD section
  79 # defines one flash "device" image.  A flash device image may be one of
  80 # the following: Removable media bootable image (like a boot floppy
  81 # image,) an Option ROM image (that would be "flashed" into an add-in
  82 # card,) a System "Flash"  image (that would be burned into a system's
  83 # flash) or an Update ("Capsule") image that will be used to update and
  84 # existing system flash.
  85 #
  86 ################################################################################
  87 [FD.Vlv]
  88 BaseAddress   = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
  89 Size          = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize        #The flash size in bytes of the 3Mb FLASH Device.
  90 ErasePolarity = 1
  91 BlockSize     = $(FLASH_BLOCK_SIZE)          #The block size in bytes of the 3Mb FLASH Device.
  92 NumBlocks     = $(FLASH_NUM_BLOCKS)          #The number of blocks in 3Mb FLASH Device.
  93
  94 #
  95 #Flash location override based on actual flash map
  96 #
  97 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress            = $(FLASH_AREA_BASE_ADDRESS)
  98 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize                   = $(FLASH_AREA_SIZE)
  99
 100 !if $(MINNOW2_FSP_BUILD) == TRUE
 101 # put below PCD value setting into dsc file
 102 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress                = $(FLASH_REGION_VLVMICROCODE_BASE)
 103 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize             = $(FLASH_REGION_VLVMICROCODE_SIZE)
 104 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset                    = 0x60
 105 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress                   = $(FLASH_AREA_BASE_ADDRESS)
 106 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize                      = $(FLASH_AREA_SIZE)
 107 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase                          = $(FLASH_REGION_FSPBIN_BASE)
 108 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize                          = $(FLASH_REGION_FSPBIN_SIZE)
 109
 110 !endif
 111 ################################################################################
 112 #
 113 # Following are lists of FD Region layout which correspond to the locations of different
 114 # images within the flash device.
 115 #
 116 # Regions must be defined in ascending order and may not overlap.
 117 #
 118 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
 119 # the pipe "|" character, followed by the size of the region, also in hex with the leading
 120 # "0x" characters. Like:
 121 # Offset|Size
 122 # PcdOffsetCName|PcdSizeCName
 123 # RegionType <FV, DATA, or FILE>
 124 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
 125 #
 126 ################################################################################
 127 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
 128 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 129 #NV_VARIABLE_STORE
 130 DATA = {
 131   ## This is the EFI_FIRMWARE_VOLUME_HEADER
 132   # ZeroVector []
 133   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 134   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 135   # FileSystemGuid: gEfiSystemNvDataFvGuid         =
 136   #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
 137   0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
 138   0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
 139   # FvLength: 0x80000
 140   0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
 141   #Signature "_FVH"       #Attributes
 142   0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
 143   #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
 144   0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
 145   #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
 146   0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
 147   #Blockmap[1]: End
 148   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 149   ## This is the VARIABLE_STORE_HEADER
 150 !if $(SECURE_BOOT_ENABLE) == TRUE
 151   #Signature: gEfiAuthenticatedVariableGuid =
 152   #  { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
 153   0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
 154   0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
 155 !else
 156   #Signature: gEfiVariableGuid =
 157   #  { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
 158   0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
 159   0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
 160 !endif
 161   #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
 162   # This can speed up the Variable Dispatch a bit.
 163   0xB8, 0xDF, 0x03, 0x00,
 164   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
 165   0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 166 }
 167
 168
 169 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
 170 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 171 #NV_FTW_WORKING
 172 DATA = {
 173   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =
 174   #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
 175   0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
 176   0xA0, 0xCE, 0x65, 0x0,  0xFD, 0x9F, 0x1B, 0x95,
 177
 178   # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
 179   0xE2, 0x33, 0xF2, 0x3,  0xFE, 0xFF, 0xFF, 0xFF,
 180   # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
 181   0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 182 }
 183
 184 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
 185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 186
 187 !if $(MINNOW2_FSP_BUILD) == TRUE
 188
 189   $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
 190   gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
 191   FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
 192
 193
 194   $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
 195   FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
 196
 197 !endif
 198   #
 199   # CPU Microcodes
 200   #
 201
 202 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
 203 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
 204 FV = MICROCODE_FV
 205
 206   #
 207   # Main Block
 208   #
 209 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
 210 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
 211 FV = FVMAIN_COMPACT
 212
 213   #
 214   # FV Recovery#2
 215   #
 216 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
 217 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
 218 FV = FVRECOVERY2
 219
 220   #
 221   # FV Recovery
 222   #
 223 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
 224 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
 225 FV = FVRECOVERY
 226
 227 ################################################################################
 228 #
 229 # FV Section
 230 #
 231 # [FV] section is used to define what components or modules are placed within a flash
 232 # device file.  This section also defines order the components and modules are positioned
 233 # within the image.  The [FV] section consists of define statements, set statements and
 234 # module statements.
 235 #
 236 ################################################################################
 237 [FV.MICROCODE_FV]
 238 BlockSize          = $(FLASH_BLOCK_SIZE)
 239 FvAlignment        = 16
 240 ERASE_POLARITY     = 1
 241 MEMORY_MAPPED      = TRUE
 242 STICKY_WRITE       = TRUE
 243 LOCK_CAP           = TRUE
 244 LOCK_STATUS        = FALSE
 245 WRITE_DISABLED_CAP = TRUE
 246 WRITE_ENABLED_CAP  = TRUE
 247 WRITE_STATUS       = TRUE
 248 WRITE_LOCK_CAP     = TRUE
 249 WRITE_LOCK_STATUS  = TRUE
 250 READ_DISABLED_CAP  = TRUE
 251 READ_ENABLED_CAP   = TRUE
 252 READ_STATUS        = TRUE
 253 READ_LOCK_CAP      = TRUE
 254 READ_LOCK_STATUS   = TRUE
 255
 256 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
 257   $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin
 258 }
 259
 260 ################################################################################
 261 #
 262 # FV Section
 263 #
 264 # [FV] section is used to define what components or modules are placed within a flash
 265 # device file.  This section also defines order the components and modules are positioned
 266 # within the image.  The [FV] section consists of define statements, set statements and
 267 # module statements.
 268 #
 269 ################################################################################
 270 [FV.FVRECOVERY2]
 271 BlockSize          = $(FLASH_BLOCK_SIZE)
 272 FvAlignment        = 16         #FV alignment and FV attributes setting.
 273 ERASE_POLARITY     = 1
 274 MEMORY_MAPPED      = TRUE
 275 STICKY_WRITE       = TRUE
 276 LOCK_CAP           = TRUE
 277 LOCK_STATUS        = TRUE
 278 WRITE_DISABLED_CAP = TRUE
 279 WRITE_ENABLED_CAP  = TRUE
 280 WRITE_STATUS       = TRUE
 281 WRITE_LOCK_CAP     = TRUE
 282 WRITE_LOCK_STATUS  = TRUE
 283 READ_DISABLED_CAP  = TRUE
 284 READ_ENABLED_CAP   = TRUE
 285 READ_STATUS        = TRUE
 286 READ_LOCK_CAP      = TRUE
 287 READ_LOCK_STATUS   = TRUE
 288 FvNameGuid         = B73FE497-B92E-416e-8326-45AD0D270092
 289
 290
 291
 292 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
 293
 294 !if $(MINNOW2_FSP_BUILD) == FALSE
 295 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
 296 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
 297 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
 298 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
 299 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
 300 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
 301 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
 302 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
 303 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
 304 !endif
 305
 306 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
 307 !if $(TPM_ENABLED) == TRUE
 308 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
 309 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
 310 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
 311 !endif
 312 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 313
 314 !if $(ACPI50_ENABLE) == TRUE
 315  INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
 316 !endif
 317 !if $(PERFORMANCE_ENABLE) == TRUE
 318 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
 319 !endif
 320
 321 [FV.FVRECOVERY]
 322 BlockSize          = $(FLASH_BLOCK_SIZE)
 323 FvAlignment        = 16         #FV alignment and FV attributes setting.
 324 ERASE_POLARITY     = 1
 325 MEMORY_MAPPED      = TRUE
 326 STICKY_WRITE       = TRUE
 327 LOCK_CAP           = TRUE
 328 LOCK_STATUS        = TRUE
 329 WRITE_DISABLED_CAP = TRUE
 330 WRITE_ENABLED_CAP  = TRUE
 331 WRITE_STATUS       = TRUE
 332 WRITE_LOCK_CAP     = TRUE
 333 WRITE_LOCK_STATUS  = TRUE
 334 READ_DISABLED_CAP  = TRUE
 335 READ_ENABLED_CAP   = TRUE
 336 READ_STATUS        = TRUE
 337 READ_LOCK_CAP      = TRUE
 338 READ_LOCK_STATUS   = TRUE
 339 FvNameGuid         = B73FE497-B92E-416e-8326-45AD0D270091
 340
 341
 342 !if $(MINNOW2_FSP_BUILD) == TRUE
 343 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
 344 !else
 345 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
 346 !endif
 347
 348 INF MdeModulePkg/Core/Pei/PeiMain.inf
 349 !if $(MINNOW2_FSP_BUILD) == TRUE
 350 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
 351 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
 352 !endif
 353 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
 354 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
 355 !if $(SECURE_BOOT_ENABLE) == TRUE
 356 INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
 357 !else
 358 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 359 !endif
 360
 361 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
 362
 363 !if $(MINNOW2_FSP_BUILD) == FALSE
 364 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
 365 !endif
 366
 367 !if $(SOURCE_DEBUG_ENABLE) == TRUE
 368   INF  SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
 369 !endif
 370
 371
 372 !if $(CAPSULE_ENABLE) == TRUE
 373 INF  MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
 374 INF  MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
 375 !endif
 376
 377 !if $(MINNOW2_FSP_BUILD) == FALSE
 378 !if $(PCIESC_ENABLE) == TRUE
 379 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
 380 !endif
 381 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
 382 !endif
 383
 384 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 385
 386 [FV.FVMAIN]
 387 BlockSize          = $(FLASH_BLOCK_SIZE)
 388 FvAlignment        = 16
 389 ERASE_POLARITY     = 1
 390 MEMORY_MAPPED      = TRUE
 391 STICKY_WRITE       = TRUE
 392 LOCK_CAP           = TRUE
 393 LOCK_STATUS        = TRUE
 394 WRITE_DISABLED_CAP = TRUE
 395 WRITE_ENABLED_CAP  = TRUE
 396 WRITE_STATUS       = TRUE
 397 WRITE_LOCK_CAP     = TRUE
 398 WRITE_LOCK_STATUS  = TRUE
 399 READ_DISABLED_CAP  = TRUE
 400 READ_ENABLED_CAP   = TRUE
 401 READ_STATUS        = TRUE
 402 READ_LOCK_CAP      = TRUE
 403 READ_LOCK_STATUS   = TRUE
 404 FvNameGuid         = A881D567-6CB0-4eee-8435-2E72D33E45B5
 405
 406 APRIORI DXE {
 407   INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 408   INF  MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
 409   INF  MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
 410   }
 411
 412 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
 413     SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
 414   }
 415
 416   #
 417   # EDK II Related Platform codes
 418   #
 419
 420   !if $(MINNOW2_FSP_BUILD) == TRUE
 421   INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
 422   !endif
 423
 424 INF MdeModulePkg/Core/Dxe/DxeMain.inf
 425 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 426 !if $(ACPI50_ENABLE) == TRUE
 427 INF  MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
 428 INF  MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
 429 !endif
 430
 431
 432 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
 433 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 434 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
 435 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
 436 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
 437 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 438 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
 439 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
 440 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
 441 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 442 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 443 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 444 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
 445
 446 !if $(SECURE_BOOT_ENABLE)
 447 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
 448 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
 449 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
 450 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
 451 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
 452 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
 453 !else
 454 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
 455 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
 456 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
 457 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
 458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
 459 !endif
 460
 461 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 462
 463 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 464 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 465 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 466 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
 467
 468
 469 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
 470
 471 !if $(DATAHUB_ENABLE) == TRUE
 472 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
 473 !endif
 474 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
 475 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
 476
 477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
 478
 479   #
 480   # EDK II Related Silicon codes
 481   #
 482 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
 483
 484 !if $(USE_HPET_TIMER) == TRUE
 485 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
 486 !else
 487 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
 488 !endif
 489 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
 490
 491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
 492
 493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
 494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
 495
 496 !if $(MINNOW2_FSP_BUILD) == FALSE
 497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
 498 !endif
 499 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
 500 !if $(PCIESC_ENABLE) == TRUE
 501 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
 502 !endif
 503
 504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
 505 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
 506 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
 507 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
 508 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
 509 !if $(MINNOW2_FSP_BUILD) == FALSE
 510 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
 511 !else
 512 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
 513 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
 514 !endif
 515 !if $(TPM_ENABLED) == TRUE
 516 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
 517 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
 518 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
 519 !endif
 520
 521 #
 522 # EDK II Related Platform codes
 523 #
 524 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
 525 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
 526 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
 527 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
 528 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
 529 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
 530 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
 531 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
 532 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
 533 !if $(GOP_DRIVER_ENABLE) == TRUE
 534  INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
 535  FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
 536   SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
 537   SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
 538   SECTION UI = "IntelGopDriver"
 539 }
 540 !endif
 541
 542 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
 543   #
 544   # SMM
 545   #
 546 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
 547 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
 548 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
 549
 550 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
 551 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
 552 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
 553 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
 554 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
 555 # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
 556   #
 557   # ACPI
 558   #
 559 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
 560 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
 561 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
 562 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
 563
 564 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
 565
 566 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
 567
 568   #
 569   # PCI
 570   #
 571 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 572
 573 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
 574
 575
 576 #
 577 # ISA
 578 #
 579 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
 580 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
 581 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
 582 !if $(SOURCE_DEBUG_ENABLE) != TRUE
 583 INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
 584 !endif
 585 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
 586 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
 587
 588 #
 589 # SDIO
 590 #
 591 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
 592 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
 593 #
 594 # IDE/SCSI/AHCI
 595 #
 596 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 597
 598 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 599
 600 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 601 !if $(SATA_ENABLE) == TRUE
 602 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
 603 #
 604
 605 #
 606 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 607 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
 608 !if $(SCSI_ENABLE) == TRUE
 609 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 610 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 611 !endif
 612 #
 613 !endif
 614 # Console
 615 #
 616 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 617 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 618 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 619 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
 620 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 621 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 622 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
 623 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 624   #
 625   # USB
 626   #
 627 !if $(USB_ENABLE) == TRUE
 628 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
 629 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
 630 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
 631 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
 632 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
 633 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
 634 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
 635 !endif
 636
 637   #
 638   #  ECP
 639   #
 640 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
 641 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
 642 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
 643 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
 644 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
 645 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
 646   #
 647   # SMBIOS
 648   #
 649 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 650 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
 651
 652 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
 653
 654   #
 655   # Legacy Modules
 656   #
 657 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 658
 659 #
 660 # FAT file system
 661 #
 662 FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
 663     SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
 664   }
 665 #
 666 # UEFI Shell
 667 #
 668 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
 669 #    SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
 670     SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
 671   }
 672
 673
 674
 675 !if $(GOP_DRIVER_ENABLE) == TRUE
 676 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
 677   SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
 678   SECTION UI = "IntelGopVbt"
 679 }
 680 !endif
 681
 682 #
 683 # Network Modules
 684 #
 685 !if $(NETWORK_ENABLE) == TRUE
 686   FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
 687     SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
 688     SECTION UI = "UNDI"
 689   }
 690   INF  MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
 691   INF  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
 692   INF  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
 693   INF  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
 694   INF  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
 695   INF  MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
 696   INF  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
 697   INF  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
 698   INF  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
 699   !if $(NETWORK_IP6_ENABLE) == TRUE
 700   INF  NetworkPkg/Ip6Dxe/Ip6Dxe.inf
 701   INF  NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
 702   INF  NetworkPkg/IpSecDxe/IpSecDxe.inf
 703   INF  NetworkPkg/Udp6Dxe/Udp6Dxe.inf
 704   INF  NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
 705   !endif
 706   !if $(NETWORK_IP6_ENABLE) == TRUE
 707   INF  NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
 708   INF  NetworkPkg/TcpDxe/TcpDxe.inf
 709   !else
 710   INF  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
 711   INF  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
 712   !endif
 713   !if $(NETWORK_VLAN_ENABLE) == TRUE
 714   INF  MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
 715   !endif
 716   !if $(NETWORK_ISCSI_ENABLE) == TRUE
 717   !if $(NETWORK_IP6_ENABLE) == TRUE
 718     INF  NetworkPkg/IScsiDxe/IScsiDxe.inf
 719   !else
 720     INF  MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
 721   !endif
 722   !endif
 723 !endif
 724
 725 [FV.FVMAIN_COMPACT]
 726 BlockSize          = $(FLASH_BLOCK_SIZE)
 727 FvAlignment        = 16
 728 ERASE_POLARITY     = 1
 729 MEMORY_MAPPED      = TRUE
 730 STICKY_WRITE       = TRUE
 731 LOCK_CAP           = TRUE
 732 LOCK_STATUS        = TRUE
 733 WRITE_DISABLED_CAP = TRUE
 734 WRITE_ENABLED_CAP  = TRUE
 735 WRITE_STATUS       = TRUE
 736 WRITE_LOCK_CAP     = TRUE
 737 WRITE_LOCK_STATUS  = TRUE
 738 READ_DISABLED_CAP  = TRUE
 739 READ_ENABLED_CAP   = TRUE
 740 READ_STATUS        = TRUE
 741 READ_LOCK_CAP      = TRUE
 742 READ_LOCK_STATUS   = TRUE
 743
 744
 745
 746 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 747 !if $(LZMA_ENABLE) == TRUE
 748 # LZMA Compress
 749        SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
 750           SECTION FV_IMAGE = FVMAIN
 751        }
 752 !else
 753 !if $(DXE_COMPRESS_ENABLE) == TRUE
 754 # Tiano Compress
 755        SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
 756           SECTION FV_IMAGE = FVMAIN
 757        }
 758 !else
 759 # No Compress
 760        SECTION COMPRESS PI_NONE {
 761           SECTION FV_IMAGE = FVMAIN
 762        }
 763 !endif
 764 !endif
 765      }
 766
 767 [FV.SETUP_DATA]
 768 BlockSize          = $(FLASH_BLOCK_SIZE)
 769 #NumBlocks         = 0x10
 770 FvAlignment        = 16
 771 ERASE_POLARITY     = 1
 772 MEMORY_MAPPED      = TRUE
 773 STICKY_WRITE       = TRUE
 774 LOCK_CAP           = TRUE
 775 LOCK_STATUS        = TRUE
 776 WRITE_DISABLED_CAP = TRUE
 777 WRITE_ENABLED_CAP  = TRUE
 778 WRITE_STATUS       = TRUE
 779 WRITE_LOCK_CAP     = TRUE
 780 WRITE_LOCK_STATUS  = TRUE
 781 READ_DISABLED_CAP  = TRUE
 782 READ_ENABLED_CAP   = TRUE
 783 READ_STATUS        = TRUE
 784 READ_LOCK_CAP      = TRUE
 785 READ_LOCK_STATUS   = TRUE
 786
 787
 788 [FV.Update_Data]
 789 BlockSize          = $(FLASH_BLOCK_SIZE)
 790 FvAlignment        = 16
 791 ERASE_POLARITY     = 1
 792 MEMORY_MAPPED      = TRUE
 793 STICKY_WRITE       = TRUE
 794 LOCK_CAP           = TRUE
 795 LOCK_STATUS        = TRUE
 796 WRITE_DISABLED_CAP = TRUE
 797 WRITE_ENABLED_CAP  = TRUE
 798 WRITE_STATUS       = TRUE
 799 WRITE_LOCK_CAP     = TRUE
 800 WRITE_LOCK_STATUS  = TRUE
 801 READ_DISABLED_CAP  = TRUE
 802 READ_ENABLED_CAP   = TRUE
 803 READ_STATUS        = TRUE
 804 READ_LOCK_CAP      = TRUE
 805 READ_LOCK_STATUS   = TRUE
 806
 807 FILE RAW = 88888888-8888-8888-8888-888888888888 {
 808        FD = Vlv
 809      }
 810
 811 [FV.BiosUpdateCargo]
 812 BlockSize          = $(FLASH_BLOCK_SIZE)
 813 FvAlignment        = 16
 814 ERASE_POLARITY     = 1
 815 MEMORY_MAPPED      = TRUE
 816 STICKY_WRITE       = TRUE
 817 LOCK_CAP           = TRUE
 818 LOCK_STATUS        = TRUE
 819 WRITE_DISABLED_CAP = TRUE
 820 WRITE_ENABLED_CAP  = TRUE
 821 WRITE_STATUS       = TRUE
 822 WRITE_LOCK_CAP     = TRUE
 823 WRITE_LOCK_STATUS  = TRUE
 824 READ_DISABLED_CAP  = TRUE
 825 READ_ENABLED_CAP   = TRUE
 826 READ_STATUS        = TRUE
 827 READ_LOCK_CAP      = TRUE
 828 READ_LOCK_STATUS   = TRUE
 829
 830
 831
 832 [FV.BiosUpdate]
 833 BlockSize          = $(FLASH_BLOCK_SIZE)
 834 FvAlignment        = 16
 835 ERASE_POLARITY     = 1
 836 MEMORY_MAPPED      = TRUE
 837 STICKY_WRITE       = TRUE
 838 LOCK_CAP           = TRUE
 839 LOCK_STATUS        = TRUE
 840 WRITE_DISABLED_CAP = TRUE
 841 WRITE_ENABLED_CAP  = TRUE
 842 WRITE_STATUS       = TRUE
 843 WRITE_LOCK_CAP     = TRUE
 844 WRITE_LOCK_STATUS  = TRUE
 845 READ_DISABLED_CAP  = TRUE
 846 READ_ENABLED_CAP   = TRUE
 847 READ_STATUS        = TRUE
 848 READ_LOCK_CAP      = TRUE
 849 READ_LOCK_STATUS   = TRUE
 850
 851 [Capsule.Capsule_Boot]
 852 #
 853 # gEfiCapsuleGuid supported by platform
 854 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
 855 #
 856 CAPSULE_GUID  = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
 857 CAPSULE_FLAGS = PersistAcrossReset
 858 CAPSULE_HEADER_SIZE = 0x20
 859
 860 FV = BiosUpdate
 861
 862 [Capsule.Capsule_Reset]
 863 #
 864 # gEfiCapsuleGuid supported by platform
 865 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
 866 #
 867 CAPSULE_GUID  = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
 868 CAPSULE_FLAGS = PersistAcrossReset
 869 CAPSULE_HEADER_SIZE = 0x20
 870
 871 FV = BiosUpdate
 872
 873 ################################################################################
 874 #
 875 # Rules are use with the [FV] section's module INF type to define
 876 # how an FFS file is created for a given INF file. The following Rule are the default
 877 # rules for the different module type. User can add the customized rules to define the
 878 # content of the FFS file.
 879 #
 880 ################################################################################
 881 [Rule.Common.SEC]
 882   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
 883     PE32  PE32    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi
 884     RAW BIN       Align = 16      |.com
 885   }
 886
 887 [Rule.Common.SEC.BINARY]
 888   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
 889     PE32  PE32    Align = 8       |.efi
 890     RAW BIN       Align = 16      |.com
 891   }
 892
 893 [Rule.Common.PEI_CORE]
 894   FILE PEI_CORE = $(NAMED_GUID)            {
 895     PE32       PE32    Align = Auto      $(INF_OUTPUT)/$(MODULE_NAME).efi
 896     UI       STRING="$(MODULE_NAME)" Optional
 897     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 898   }
 899
 900 [Rule.Common.PEIM]
 901   FILE PEIM = $(NAMED_GUID) {
 902      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 903      PE32        PE32   Align = Auto     $(INF_OUTPUT)/$(MODULE_NAME).efi
 904      UI        STRING="$(MODULE_NAME)" Optional
 905      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 906   }
 907
 908 [Rule.Common.PEIM.BINARY]
 909   FILE PEIM = $(NAMED_GUID) {
 910      PEI_DEPEX PEI_DEPEX Optional        |.depex
 911      PE32        PE32   Align = Auto     |.efi
 912      UI        STRING="$(MODULE_NAME)" Optional
 913      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 914   }
 915
 916 [Rule.Common.PEIM.BIOSID]
 917   FILE PEIM = $(NAMED_GUID) {
 918      RAW       BIN                       BiosId.bin
 919      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 920      PE32        PE32   Align = Auto     $(INF_OUTPUT)/$(MODULE_NAME).efi
 921      UI        STRING="$(MODULE_NAME)" Optional
 922      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 923   }
 924
 925 [Rule.Common.USER_DEFINED.APINIT]
 926   FILE RAW = $(NAMED_GUID) Fixed Align=4K {
 927      RAW SEC_BIN |.com
 928      }
 929 #cjia 2011-07-21
 930 [Rule.Common.USER_DEFINED.LEGACY16]
 931   FILE FREEFORM = $(NAMED_GUID) {
 932      UI  STRING="$(MODULE_NAME)" Optional
 933      RAW BIN |.bin
 934      }
 935 #cjia
 936
 937 [Rule.Common.USER_DEFINED.ASM16]
 938   FILE FREEFORM = $(NAMED_GUID) {
 939      UI  STRING="$(MODULE_NAME)" Optional
 940      RAW BIN |.com
 941    }
 942
 943 [Rule.Common.DXE_CORE]
 944   FILE DXE_CORE = $(NAMED_GUID) {
 945     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 946     UI        STRING="$(MODULE_NAME)" Optional
 947     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 948   }
 949
 950 [Rule.Common.UEFI_DRIVER]
 951   FILE DRIVER = $(NAMED_GUID) {
 952     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 953     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 954     UI        STRING="$(MODULE_NAME)" Optional
 955     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 956   }
 957
 958 [Rule.Common.UEFI_DRIVER.BINARY]
 959   FILE DRIVER = $(NAMED_GUID) {
 960     DXE_DEPEX DXE_DEPEX Optional       |.depex
 961     PE32      PE32                     |.efi
 962     UI        STRING="$(MODULE_NAME)" Optional
 963     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 964   }
 965
 966 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
 967   FILE DRIVER = $(NAMED_GUID) {
 968     DXE_DEPEX DXE_DEPEX Optional      $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
 969     PE32      PE32                    |.efi
 970     UI        STRING="$(MODULE_NAME)" Optional
 971     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 972   }
 973
 974 [Rule.Common.DXE_DRIVER]
 975   FILE DRIVER = $(NAMED_GUID) {
 976     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 977     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 978     UI        STRING="$(MODULE_NAME)" Optional
 979     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 980   }
 981
 982 [Rule.Common.DXE_DRIVER.BINARY]
 983   FILE DRIVER = $(NAMED_GUID) {
 984     DXE_DEPEX DXE_DEPEX Optional       |.depex
 985     PE32      PE32                     |.efi
 986     UI        STRING="$(MODULE_NAME)" Optional
 987     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 988   }
 989
 990 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
 991   FILE DRIVER = $(NAMED_GUID) {
 992     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 993     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 994     UI        STRING="$(MODULE_NAME)" Optional
 995     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 996     RAW ACPI  Optional                |.acpi
 997     RAW ASL   Optional                |.aml
 998   }
 999
1000 [Rule.Common.DXE_RUNTIME_DRIVER]
1001   FILE DRIVER = $(NAMED_GUID) {
1002     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
1003     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1004     UI        STRING="$(MODULE_NAME)" Optional
1005     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1006   }
1007
1008 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
1009   FILE DRIVER = $(NAMED_GUID) {
1010     DXE_DEPEX DXE_DEPEX Optional       |.depex
1011     PE32      PE32                     |.efi
1012     UI        STRING="$(MODULE_NAME)" Optional
1013     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1014   }
1015
1016 [Rule.Common.DXE_SMM_DRIVER]
1017   FILE SMM = $(NAMED_GUID) {
1018     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
1019     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1020     UI        STRING="$(MODULE_NAME)" Optional
1021     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1022   }
1023
1024 [Rule.Common.DXE_SMM_DRIVER.BINARY]
1025   FILE SMM = $(NAMED_GUID) {
1026     SMM_DEPEX SMM_DEPEX                |.depex
1027     PE32      PE32                     |.efi
1028     UI        STRING="$(MODULE_NAME)" Optional
1029     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1030   }
1031
1032 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1033   FILE SMM = $(NAMED_GUID) {
1034     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
1035     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1036     UI        STRING="$(MODULE_NAME)" Optional
1037     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1038     RAW ACPI  Optional                |.acpi
1039     RAW ASL   Optional                |.aml
1040   }
1041
1042 [Rule.Common.SMM_CORE]
1043   FILE SMM_CORE = $(NAMED_GUID) {
1044     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
1045     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1046     UI        STRING="$(MODULE_NAME)" Optional
1047     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1048   }
1049
1050 [Rule.Common.SMM_CORE.BINARY]
1051   FILE SMM_CORE = $(NAMED_GUID) {
1052     DXE_DEPEX DXE_DEPEX Optional       |.depex
1053     PE32      PE32                     |.efi
1054     UI        STRING="$(MODULE_NAME)" Optional
1055     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1056   }
1057
1058 [Rule.Common.UEFI_APPLICATION]
1059   FILE APPLICATION = $(NAMED_GUID) {
1060     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
1061     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1062     UI        STRING="$(MODULE_NAME)" Optional
1063     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1064   }
1065
1066 [Rule.Common.UEFI_APPLICATION.UI]
1067   FILE APPLICATION = $(NAMED_GUID) {
1068     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
1069     UI        STRING="Enter Setup"
1070     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1071   }
1072
1073 [Rule.Common.USER_DEFINED]
1074   FILE FREEFORM = $(NAMED_GUID) {
1075     UI  STRING="$(MODULE_NAME)" Optional
1076     RAW BIN                |.bin
1077   }
1078
1079 [Rule.Common.USER_DEFINED.ACPITABLE]
1080   FILE FREEFORM = $(NAMED_GUID) {
1081     RAW ACPI  Optional            |.acpi
1082     RAW ASL   Optional            |.aml
1083   }
1084
1085 [Rule.Common.USER_DEFINED.ACPITABLE2]
1086   FILE FREEFORM = $(NAMED_GUID) {
1087     RAW ASL   Optional            |.aml
1088   }
1089
1090 [Rule.Common.ACPITABLE]
1091   FILE FREEFORM = $(NAMED_GUID) {
1092     RAW ACPI  Optional            |.acpi
1093     RAW ASL   Optional            |.aml
1094   }
1095