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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
86 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
87
88 !if $(MINNOW2_FSP_BUILD) == TRUE
89 # put below PCD value setting into dsc file
90 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
91 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
95 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
96 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97
98 !endif
99 ################################################################################
100 #
101 # Following are lists of FD Region layout which correspond to the locations of different
102 # images within the flash device.
103 #
104 # Regions must be defined in ascending order and may not overlap.
105 #
106 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
107 # the pipe "|" character, followed by the size of the region, also in hex with the leading
108 # "0x" characters. Like:
109 # Offset|Size
110 # PcdOffsetCName|PcdSizeCName
111 # RegionType <FV, DATA, or FILE>
112 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
113 #
114 ################################################################################
115 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
116 # so we hardcode the default value of variable here.
117 # Please note that we MUST update the binary once the default value is changed.
118
119 #
120 # CPU Microcodes
121 #
122
123 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
124 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
125 FV = MICROCODE_FV
126
127 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
128 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
129 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
130
131 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
132 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
133 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
134
135 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
136 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
137 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
138
139 !if $(MINNOW2_FSP_BUILD) == TRUE
140
141 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
142 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
143 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
144
145
146 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
147 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
148
149 !endif
150
151 #
152 # Main Block
153 #
154 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
155 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
156 FV = FVMAIN_COMPACT
157
158 #
159 # FV Recovery#2
160 #
161 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
162 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
163 FV = FVRECOVERY2
164
165 #
166 # FV Recovery
167 #
168 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
169 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
170 FV = FVRECOVERY
171
172 ################################################################################
173 #
174 # FV Section
175 #
176 # [FV] section is used to define what components or modules are placed within a flash
177 # device file. This section also defines order the components and modules are positioned
178 # within the image. The [FV] section consists of define statements, set statements and
179 # module statements.
180 #
181 ################################################################################
182 [FV.MICROCODE_FV]
183 BlockSize = $(FLASH_BLOCK_SIZE)
184 FvAlignment = 16
185 ERASE_POLARITY = 1
186 MEMORY_MAPPED = TRUE
187 STICKY_WRITE = TRUE
188 LOCK_CAP = TRUE
189 LOCK_STATUS = FALSE
190 WRITE_DISABLED_CAP = TRUE
191 WRITE_ENABLED_CAP = TRUE
192 WRITE_STATUS = TRUE
193 WRITE_LOCK_CAP = TRUE
194 WRITE_LOCK_STATUS = TRUE
195 READ_DISABLED_CAP = TRUE
196 READ_ENABLED_CAP = TRUE
197 READ_STATUS = TRUE
198 READ_LOCK_CAP = TRUE
199 READ_LOCK_STATUS = TRUE
200
201 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
202 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
203 }
204
205 !if $(RECOVERY_ENABLE)
206 [FV.FVRECOVERY_COMPONENTS]
207 FvAlignment = 16 #FV alignment and FV attributes setting.
208 ERASE_POLARITY = 1
209 MEMORY_MAPPED = TRUE
210 STICKY_WRITE = TRUE
211 LOCK_CAP = TRUE
212 LOCK_STATUS = TRUE
213 WRITE_DISABLED_CAP = TRUE
214 WRITE_ENABLED_CAP = TRUE
215 WRITE_STATUS = TRUE
216 WRITE_LOCK_CAP = TRUE
217 WRITE_LOCK_STATUS = TRUE
218 READ_DISABLED_CAP = TRUE
219 READ_ENABLED_CAP = TRUE
220 READ_STATUS = TRUE
221 READ_LOCK_CAP = TRUE
222 READ_LOCK_STATUS = TRUE
223
224 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
225 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
226 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
227 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
228 INF FatPkg/FatPei/FatPei.inf
229 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
230 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
231 !endif
232
233 ################################################################################
234 #
235 # FV Section
236 #
237 # [FV] section is used to define what components or modules are placed within a flash
238 # device file. This section also defines order the components and modules are positioned
239 # within the image. The [FV] section consists of define statements, set statements and
240 # module statements.
241 #
242 ################################################################################
243 [FV.FVRECOVERY2]
244 BlockSize = $(FLASH_BLOCK_SIZE)
245 FvAlignment = 16 #FV alignment and FV attributes setting.
246 ERASE_POLARITY = 1
247 MEMORY_MAPPED = TRUE
248 STICKY_WRITE = TRUE
249 LOCK_CAP = TRUE
250 LOCK_STATUS = TRUE
251 WRITE_DISABLED_CAP = TRUE
252 WRITE_ENABLED_CAP = TRUE
253 WRITE_STATUS = TRUE
254 WRITE_LOCK_CAP = TRUE
255 WRITE_LOCK_STATUS = TRUE
256 READ_DISABLED_CAP = TRUE
257 READ_ENABLED_CAP = TRUE
258 READ_STATUS = TRUE
259 READ_LOCK_CAP = TRUE
260 READ_LOCK_STATUS = TRUE
261 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
262
263
264
265 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
266
267 !if $(MINNOW2_FSP_BUILD) == FALSE
268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
269 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
270 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
271 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
272 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
273 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
274 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
275 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
276 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
277 !endif
278
279 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
280 !if $(TPM_ENABLED) == TRUE
281 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
282 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
283 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
284 !endif
285 !if $(FTPM_ENABLE) == TRUE
286 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
287 !endif
288 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
289
290 !if $(ACPI50_ENABLE) == TRUE
291 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
292 !endif
293 !if $(PERFORMANCE_ENABLE) == TRUE
294 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
295 !endif
296
297 !if $(RECOVERY_ENABLE)
298 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
299 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
300 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
301 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
302 }
303 }
304 !endif
305
306 [FV.FVRECOVERY]
307 BlockSize = $(FLASH_BLOCK_SIZE)
308 FvAlignment = 16 #FV alignment and FV attributes setting.
309 ERASE_POLARITY = 1
310 MEMORY_MAPPED = TRUE
311 STICKY_WRITE = TRUE
312 LOCK_CAP = TRUE
313 LOCK_STATUS = TRUE
314 WRITE_DISABLED_CAP = TRUE
315 WRITE_ENABLED_CAP = TRUE
316 WRITE_STATUS = TRUE
317 WRITE_LOCK_CAP = TRUE
318 WRITE_LOCK_STATUS = TRUE
319 READ_DISABLED_CAP = TRUE
320 READ_ENABLED_CAP = TRUE
321 READ_STATUS = TRUE
322 READ_LOCK_CAP = TRUE
323 READ_LOCK_STATUS = TRUE
324 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
325
326
327 !if $(MINNOW2_FSP_BUILD) == TRUE
328 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
329 !else
330 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
331 !endif
332
333 INF MdeModulePkg/Core/Pei/PeiMain.inf
334 !if $(MINNOW2_FSP_BUILD) == TRUE
335 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
336 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
337 !endif
338 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
339 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
340 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
341
342 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
343
344 !if $(MINNOW2_FSP_BUILD) == FALSE
345 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
346 !endif
347
348 !if $(FTPM_ENABLE) == TRUE
349 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
350 !endif
351
352 !if $(SOURCE_DEBUG_ENABLE) == TRUE
353 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
354 !endif
355
356
357 !if $(CAPSULE_ENABLE) == TRUE
358 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
359 !if $(DXE_ARCHITECTURE) == "X64"
360 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
361 !endif
362 !endif
363
364 !if $(MINNOW2_FSP_BUILD) == FALSE
365 !if $(PCIESC_ENABLE) == TRUE
366 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
367 !endif
368 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
369 !endif
370
371 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
372
373 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
374 # FMP image decriptor
375 INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
376 !endif
377
378 [FV.FVMAIN]
379 BlockSize = $(FLASH_BLOCK_SIZE)
380 FvAlignment = 16
381 ERASE_POLARITY = 1
382 MEMORY_MAPPED = TRUE
383 STICKY_WRITE = TRUE
384 LOCK_CAP = TRUE
385 LOCK_STATUS = TRUE
386 WRITE_DISABLED_CAP = TRUE
387 WRITE_ENABLED_CAP = TRUE
388 WRITE_STATUS = TRUE
389 WRITE_LOCK_CAP = TRUE
390 WRITE_LOCK_STATUS = TRUE
391 READ_DISABLED_CAP = TRUE
392 READ_ENABLED_CAP = TRUE
393 READ_STATUS = TRUE
394 READ_LOCK_CAP = TRUE
395 READ_LOCK_STATUS = TRUE
396 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
397
398 APRIORI DXE {
399 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
400 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
401 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
402 }
403
404 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
405 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
406 }
407
408 #
409 # EDK II Related Platform codes
410 #
411
412 !if $(MINNOW2_FSP_BUILD) == TRUE
413 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
414 !endif
415
416 INF MdeModulePkg/Core/Dxe/DxeMain.inf
417 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
418 !if $(ACPI50_ENABLE) == TRUE
419 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
420 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
421 !endif
422
423
424 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
425 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
426 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
427 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
428 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
429 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
430 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
431 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
432 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
433 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
434 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
435 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
436 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
437
438 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
439 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
440 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
441 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
442 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
443 !if $(SECURE_BOOT_ENABLE)
444 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
445 !endif
446
447 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
448
449 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
450 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
451 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
452 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
453
454
455 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
456
457 !if $(DATAHUB_ENABLE) == TRUE
458 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
459 !endif
460 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
461 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
462
463 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
464
465 #
466 # EDK II Related Silicon codes
467 #
468 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
469
470 !if $(USE_HPET_TIMER) == TRUE
471 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
472 !else
473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
474 !endif
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
476
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
478
479 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
480 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
481
482 !if $(MINNOW2_FSP_BUILD) == FALSE
483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
484 !endif
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
486 !if $(PCIESC_ENABLE) == TRUE
487 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
488 !endif
489
490 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
492 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
495 !if $(MINNOW2_FSP_BUILD) == FALSE
496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
497 !else
498 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
499 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
500 !endif
501 !if $(MINNOW2_FSP_BUILD) == FALSE
502 !if $(SEC_ENABLE) == TRUE
503 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
505 !endif
506 !endif
507 !if $(TPM_ENABLED) == TRUE
508 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
509 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
510 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
511 !endif
512 !if $(FTPM_ENABLE) == TRUE
513 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
514 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
515 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
516 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
517 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
518 !endif
519
520 #
521 # EDK II Related Platform codes
522 #
523 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
524 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
525 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
526 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
527 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
528 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
529 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
530 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
531 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
532 !if $(GOP_DRIVER_ENABLE) == TRUE
533 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
534 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
535 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
536 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
537 SECTION UI = "IntelGopDriver"
538 }
539 !endif
540
541 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
542 #
543 # SMM
544 #
545 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
546 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
547 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
548
549 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
550 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
551 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
552 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
553 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
554 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
555 #
556 # ACPI
557 #
558 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
559 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
560 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
561 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
562
563 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
564
565 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
566
567 #
568 # PCI
569 #
570 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
571
572 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
573
574
575 #
576 # ISA
577 #
578 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
579 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
580 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
581 !if $(SOURCE_DEBUG_ENABLE) != TRUE
582 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
583 !endif
584 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
585 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
586
587 #
588 # SDIO
589 #
590 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
591 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
592 #
593 # IDE/SCSI/AHCI
594 #
595 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
596
597 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
598
599 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
600 !if $(SATA_ENABLE) == TRUE
601 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
602 #
603
604 #
605 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
606 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
607 !if $(SCSI_ENABLE) == TRUE
608 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
609 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
610 !endif
611 #
612 !endif
613 # Console
614 #
615 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
616 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
617 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
618 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
619 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
620 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
621 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
622 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
623 #
624 # USB
625 #
626 !if $(USB_ENABLE) == TRUE
627 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
628 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
629 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
630 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
631 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
632 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
633 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
634 !endif
635
636 #
637 # ECP
638 #
639 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
640 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
641 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
642 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
643 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
644 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
645 #
646 # SMBIOS
647 #
648 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
649 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
650
651 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
652
653 #
654 # Legacy Modules
655 #
656 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
657
658 #
659 # FAT file system
660 #
661 INF FatPkg/EnhancedFatDxe/Fat.inf
662
663 #
664 # UEFI Shell
665 #
666 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
667 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
668 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
669 }
670
671
672
673 !if $(GOP_DRIVER_ENABLE) == TRUE
674 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
675 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
676 SECTION UI = "IntelGopVbt"
677 }
678 !endif
679
680 #
681 # Network Modules
682 #
683 !if $(NETWORK_ENABLE) == TRUE
684 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
685 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
686 SECTION UI = "UNDI"
687 }
688 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
689 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
690 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
691 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
692 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
693 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
694 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
695 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
696 !if $(NETWORK_IP6_ENABLE) == TRUE
697 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
698 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
699 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
700 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
701 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
702 !endif
703 !if $(NETWORK_IP6_ENABLE) == TRUE
704 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
705 INF NetworkPkg/TcpDxe/TcpDxe.inf
706 !else
707 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
708 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
709 !endif
710 !if $(NETWORK_VLAN_ENABLE) == TRUE
711 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
712 !endif
713 !if $(NETWORK_ISCSI_ENABLE) == TRUE
714 !if $(NETWORK_IP6_ENABLE) == TRUE
715 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
716 !else
717 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
718 !endif
719 !endif
720 !endif
721
722 !if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)
723 INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
724 !endif
725 !if $(CAPSULE_ENABLE)
726 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
727 !endif
728 !if $(MICOCODE_CAPSULE_ENABLE)
729 INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
730 !endif
731
732 !if $(RECOVERY_ENABLE)
733 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
734 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
735 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
736 }
737 !endif
738
739 !if $(CAPSULE_ENABLE)
740 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
741 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
742 SECTION UI = "Pkcs7TestRoot"
743 }
744 !endif
745
746 [FV.FVMAIN_COMPACT]
747 BlockSize = $(FLASH_BLOCK_SIZE)
748 FvAlignment = 16
749 ERASE_POLARITY = 1
750 MEMORY_MAPPED = TRUE
751 STICKY_WRITE = TRUE
752 LOCK_CAP = TRUE
753 LOCK_STATUS = TRUE
754 WRITE_DISABLED_CAP = TRUE
755 WRITE_ENABLED_CAP = TRUE
756 WRITE_STATUS = TRUE
757 WRITE_LOCK_CAP = TRUE
758 WRITE_LOCK_STATUS = TRUE
759 READ_DISABLED_CAP = TRUE
760 READ_ENABLED_CAP = TRUE
761 READ_STATUS = TRUE
762 READ_LOCK_CAP = TRUE
763 READ_LOCK_STATUS = TRUE
764
765
766
767 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
768 !if $(LZMA_ENABLE) == TRUE
769 # LZMA Compress
770 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
771 SECTION FV_IMAGE = FVMAIN
772 }
773 !else
774 !if $(DXE_COMPRESS_ENABLE) == TRUE
775 # Tiano Compress
776 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
777 SECTION FV_IMAGE = FVMAIN
778 }
779 !else
780 # No Compress
781 SECTION COMPRESS PI_NONE {
782 SECTION FV_IMAGE = FVMAIN
783 }
784 !endif
785 !endif
786 }
787
788 [FV.SETUP_DATA]
789 BlockSize = $(FLASH_BLOCK_SIZE)
790 #NumBlocks = 0x10
791 FvAlignment = 16
792 ERASE_POLARITY = 1
793 MEMORY_MAPPED = TRUE
794 STICKY_WRITE = TRUE
795 LOCK_CAP = TRUE
796 LOCK_STATUS = TRUE
797 WRITE_DISABLED_CAP = TRUE
798 WRITE_ENABLED_CAP = TRUE
799 WRITE_STATUS = TRUE
800 WRITE_LOCK_CAP = TRUE
801 WRITE_LOCK_STATUS = TRUE
802 READ_DISABLED_CAP = TRUE
803 READ_ENABLED_CAP = TRUE
804 READ_STATUS = TRUE
805 READ_LOCK_CAP = TRUE
806 READ_LOCK_STATUS = TRUE
807
808
809 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
810 [FV.CapsuleDispatchFv]
811 FvAlignment = 16
812 ERASE_POLARITY = 1
813 MEMORY_MAPPED = TRUE
814 STICKY_WRITE = TRUE
815 LOCK_CAP = TRUE
816 LOCK_STATUS = TRUE
817 WRITE_DISABLED_CAP = TRUE
818 WRITE_ENABLED_CAP = TRUE
819 WRITE_STATUS = TRUE
820 WRITE_LOCK_CAP = TRUE
821 WRITE_LOCK_STATUS = TRUE
822 READ_DISABLED_CAP = TRUE
823 READ_ENABLED_CAP = TRUE
824 READ_STATUS = TRUE
825 READ_LOCK_CAP = TRUE
826 READ_LOCK_STATUS = TRUE
827
828 !if $(CAPSULE_ENABLE)
829 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
830 !endif
831
832 !endif
833
834 ################################################################################
835 #
836 # Rules are use with the [FV] section's module INF type to define
837 # how an FFS file is created for a given INF file. The following Rule are the default
838 # rules for the different module type. User can add the customized rules to define the
839 # content of the FFS file.
840 #
841 ################################################################################
842 [Rule.Common.SEC]
843 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
844 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
845 RAW BIN Align = 16 |.com
846 }
847
848 [Rule.Common.SEC.BINARY]
849 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
850 PE32 PE32 Align = 8 |.efi
851 !if $(MINNOW2_FSP_BUILD) == TRUE
852 RAW RAW |.raw
853 !else
854 RAW BIN Align = 16 |.com
855 !endif
856 }
857
858 [Rule.Common.PEI_CORE]
859 FILE PEI_CORE = $(NAMED_GUID) {
860 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
861 UI STRING="$(MODULE_NAME)" Optional
862 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
863 }
864
865 [Rule.Common.PEIM]
866 FILE PEIM = $(NAMED_GUID) {
867 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
868 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
869 UI STRING="$(MODULE_NAME)" Optional
870 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
871 }
872
873 [Rule.Common.PEIM.BINARY]
874 FILE PEIM = $(NAMED_GUID) {
875 PEI_DEPEX PEI_DEPEX Optional |.depex
876 PE32 PE32 Align = Auto |.efi
877 UI STRING="$(MODULE_NAME)" Optional
878 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
879 }
880
881 [Rule.Common.PEIM.BIOSID]
882 FILE PEIM = $(NAMED_GUID) {
883 RAW BIN BiosId.bin
884 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
885 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
886 UI STRING="$(MODULE_NAME)" Optional
887 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
888 }
889
890 [Rule.Common.USER_DEFINED.APINIT]
891 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
892 RAW SEC_BIN |.com
893 }
894 #cjia 2011-07-21
895 [Rule.Common.USER_DEFINED.LEGACY16]
896 FILE FREEFORM = $(NAMED_GUID) {
897 UI STRING="$(MODULE_NAME)" Optional
898 RAW BIN |.bin
899 }
900 #cjia
901
902 [Rule.Common.USER_DEFINED.ASM16]
903 FILE FREEFORM = $(NAMED_GUID) {
904 UI STRING="$(MODULE_NAME)" Optional
905 RAW BIN |.com
906 }
907
908 [Rule.Common.DXE_CORE]
909 FILE DXE_CORE = $(NAMED_GUID) {
910 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
911 UI STRING="$(MODULE_NAME)" Optional
912 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
913 }
914
915 [Rule.Common.UEFI_DRIVER]
916 FILE DRIVER = $(NAMED_GUID) {
917 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
918 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
919 UI STRING="$(MODULE_NAME)" Optional
920 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
921 }
922
923 [Rule.Common.UEFI_DRIVER.BINARY]
924 FILE DRIVER = $(NAMED_GUID) {
925 DXE_DEPEX DXE_DEPEX Optional |.depex
926 PE32 PE32 |.efi
927 UI STRING="$(MODULE_NAME)" Optional
928 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
929 }
930
931 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
932 FILE DRIVER = $(NAMED_GUID) {
933 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
934 PE32 PE32 |.efi
935 UI STRING="$(MODULE_NAME)" Optional
936 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
937 }
938
939 [Rule.Common.DXE_DRIVER]
940 FILE DRIVER = $(NAMED_GUID) {
941 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
942 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
943 UI STRING="$(MODULE_NAME)" Optional
944 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
945 }
946
947 [Rule.Common.DXE_DRIVER.BINARY]
948 FILE DRIVER = $(NAMED_GUID) {
949 DXE_DEPEX DXE_DEPEX Optional |.depex
950 PE32 PE32 |.efi
951 UI STRING="$(MODULE_NAME)" Optional
952 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
953 }
954
955 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
956 FILE DRIVER = $(NAMED_GUID) {
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
959 UI STRING="$(MODULE_NAME)" Optional
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
961 RAW ACPI Optional |.acpi
962 RAW ASL Optional |.aml
963 }
964
965 [Rule.Common.DXE_RUNTIME_DRIVER]
966 FILE DRIVER = $(NAMED_GUID) {
967 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
968 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
969 UI STRING="$(MODULE_NAME)" Optional
970 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
971 }
972
973 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
974 FILE DRIVER = $(NAMED_GUID) {
975 DXE_DEPEX DXE_DEPEX Optional |.depex
976 PE32 PE32 |.efi
977 UI STRING="$(MODULE_NAME)" Optional
978 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
979 }
980
981 [Rule.Common.DXE_SMM_DRIVER]
982 FILE SMM = $(NAMED_GUID) {
983 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
984 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
985 UI STRING="$(MODULE_NAME)" Optional
986 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
987 }
988
989 [Rule.Common.DXE_SMM_DRIVER.BINARY]
990 FILE SMM = $(NAMED_GUID) {
991 SMM_DEPEX SMM_DEPEX |.depex
992 PE32 PE32 |.efi
993 RAW BIN Optional |.aml
994 UI STRING="$(MODULE_NAME)" Optional
995 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
996 }
997
998 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
999 FILE SMM = $(NAMED_GUID) {
1000 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1001 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1002 UI STRING="$(MODULE_NAME)" Optional
1003 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1004 RAW ACPI Optional |.acpi
1005 RAW ASL Optional |.aml
1006 }
1007
1008 [Rule.Common.SMM_CORE]
1009 FILE SMM_CORE = $(NAMED_GUID) {
1010 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1011 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1012 UI STRING="$(MODULE_NAME)" Optional
1013 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1014 }
1015
1016 [Rule.Common.SMM_CORE.BINARY]
1017 FILE SMM_CORE = $(NAMED_GUID) {
1018 DXE_DEPEX DXE_DEPEX Optional |.depex
1019 PE32 PE32 |.efi
1020 UI STRING="$(MODULE_NAME)" Optional
1021 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1022 }
1023
1024 [Rule.Common.UEFI_APPLICATION]
1025 FILE APPLICATION = $(NAMED_GUID) {
1026 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1027 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1028 UI STRING="$(MODULE_NAME)" Optional
1029 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1030 }
1031
1032 [Rule.Common.UEFI_APPLICATION.UI]
1033 FILE APPLICATION = $(NAMED_GUID) {
1034 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1035 UI STRING="Enter Setup"
1036 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1037 }
1038
1039 [Rule.Common.USER_DEFINED]
1040 FILE FREEFORM = $(NAMED_GUID) {
1041 UI STRING="$(MODULE_NAME)" Optional
1042 RAW BIN |.bin
1043 }
1044
1045 [Rule.Common.USER_DEFINED.ACPITABLE]
1046 FILE FREEFORM = $(NAMED_GUID) {
1047 RAW ACPI Optional |.acpi
1048 RAW ASL Optional |.aml
1049 }
1050
1051 [Rule.Common.USER_DEFINED.ACPITABLE2]
1052 FILE FREEFORM = $(NAMED_GUID) {
1053 RAW ASL Optional |.aml
1054 }
1055
1056 [Rule.Common.ACPITABLE]
1057 FILE FREEFORM = $(NAMED_GUID) {
1058 RAW ACPI Optional |.acpi
1059 RAW ASL Optional |.aml
1060 }
1061
1062 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1063 FILE PEIM = $(NAMED_GUID) {
1064 RAW BIN |.acpi
1065 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1066 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1067 UI STRING="$(MODULE_NAME)" Optional
1068 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1069 }
1070