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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
52
53
54 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
55 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
56
57 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C2000
58 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
59
60 ################################################################################
61 #
62 # FD Section
63 # The [FD] Section is made up of the definition statements and a
64 # description of what goes into the Flash Device Image. Each FD section
65 # defines one flash "device" image. A flash device image may be one of
66 # the following: Removable media bootable image (like a boot floppy
67 # image,) an Option ROM image (that would be "flashed" into an add-in
68 # card,) a System "Flash" image (that would be burned into a system's
69 # flash) or an Update ("Capsule") image that will be used to update and
70 # existing system flash.
71 #
72 ################################################################################
73 [FD.Vlv]
74 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
75 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
76 ErasePolarity = 1
77 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
78 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
79
80 #
81 #Flash location override based on actual flash map
82 #
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
84 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
85
86 !if $(MINNOW2_FSP_BUILD) == TRUE
87 # put below PCD value setting into dsc file
88 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
89 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
91 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
95
96 !endif
97 ################################################################################
98 #
99 # Following are lists of FD Region layout which correspond to the locations of different
100 # images within the flash device.
101 #
102 # Regions must be defined in ascending order and may not overlap.
103 #
104 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
105 # the pipe "|" character, followed by the size of the region, also in hex with the leading
106 # "0x" characters. Like:
107 # Offset|Size
108 # PcdOffsetCName|PcdSizeCName
109 # RegionType <FV, DATA, or FILE>
110 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
111 #
112 ################################################################################
113 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
114 # so we hardcode the default value of variable here.
115 # Please note that we MUST update the binary once the default value is changed.
116
117 #
118 # CPU Microcodes
119 #
120
121 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
122 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
123 FV = MICROCODE_FV
124
125 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
126 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
127 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
128
129 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
130 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
131 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
132
133 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
134 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
135 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
136
137 !if $(MINNOW2_FSP_BUILD) == TRUE
138
139 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
140 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
141 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
142
143
144 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
145 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
146
147 !endif
148
149 #
150 # Main Block
151 #
152 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
153 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
154 FV = FVMAIN_COMPACT
155
156 #
157 # FV Recovery#2
158 #
159 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
160 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
161 FV = FVRECOVERY2
162
163 #
164 # FV Recovery
165 #
166 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
167 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
168 FV = FVRECOVERY
169
170 ################################################################################
171 #
172 # FV Section
173 #
174 # [FV] section is used to define what components or modules are placed within a flash
175 # device file. This section also defines order the components and modules are positioned
176 # within the image. The [FV] section consists of define statements, set statements and
177 # module statements.
178 #
179 ################################################################################
180 [FV.MICROCODE_FV]
181 BlockSize = $(FLASH_BLOCK_SIZE)
182 FvAlignment = 16
183 ERASE_POLARITY = 1
184 MEMORY_MAPPED = TRUE
185 STICKY_WRITE = TRUE
186 LOCK_CAP = TRUE
187 LOCK_STATUS = FALSE
188 WRITE_DISABLED_CAP = TRUE
189 WRITE_ENABLED_CAP = TRUE
190 WRITE_STATUS = TRUE
191 WRITE_LOCK_CAP = TRUE
192 WRITE_LOCK_STATUS = TRUE
193 READ_DISABLED_CAP = TRUE
194 READ_ENABLED_CAP = TRUE
195 READ_STATUS = TRUE
196 READ_LOCK_CAP = TRUE
197 READ_LOCK_STATUS = TRUE
198
199 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
200 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
201 }
202
203 ################################################################################
204 #
205 # FV Section
206 #
207 # [FV] section is used to define what components or modules are placed within a flash
208 # device file. This section also defines order the components and modules are positioned
209 # within the image. The [FV] section consists of define statements, set statements and
210 # module statements.
211 #
212 ################################################################################
213 [FV.FVRECOVERY2]
214 BlockSize = $(FLASH_BLOCK_SIZE)
215 FvAlignment = 16 #FV alignment and FV attributes setting.
216 ERASE_POLARITY = 1
217 MEMORY_MAPPED = TRUE
218 STICKY_WRITE = TRUE
219 LOCK_CAP = TRUE
220 LOCK_STATUS = TRUE
221 WRITE_DISABLED_CAP = TRUE
222 WRITE_ENABLED_CAP = TRUE
223 WRITE_STATUS = TRUE
224 WRITE_LOCK_CAP = TRUE
225 WRITE_LOCK_STATUS = TRUE
226 READ_DISABLED_CAP = TRUE
227 READ_ENABLED_CAP = TRUE
228 READ_STATUS = TRUE
229 READ_LOCK_CAP = TRUE
230 READ_LOCK_STATUS = TRUE
231 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
232
233
234
235 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
236
237 !if $(MINNOW2_FSP_BUILD) == FALSE
238 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
239 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
240 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
241 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
242 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
243 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
244 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
245 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
246 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
247 !endif
248
249 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
250 !if $(TPM_ENABLED) == TRUE
251 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
252 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
253 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
254 !endif
255 !if $(FTPM_ENABLE) == TRUE
256 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
257 !endif
258 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
259
260 !if $(ACPI50_ENABLE) == TRUE
261 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
262 !endif
263 !if $(PERFORMANCE_ENABLE) == TRUE
264 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
265 !endif
266
267 [FV.FVRECOVERY]
268 BlockSize = $(FLASH_BLOCK_SIZE)
269 FvAlignment = 16 #FV alignment and FV attributes setting.
270 ERASE_POLARITY = 1
271 MEMORY_MAPPED = TRUE
272 STICKY_WRITE = TRUE
273 LOCK_CAP = TRUE
274 LOCK_STATUS = TRUE
275 WRITE_DISABLED_CAP = TRUE
276 WRITE_ENABLED_CAP = TRUE
277 WRITE_STATUS = TRUE
278 WRITE_LOCK_CAP = TRUE
279 WRITE_LOCK_STATUS = TRUE
280 READ_DISABLED_CAP = TRUE
281 READ_ENABLED_CAP = TRUE
282 READ_STATUS = TRUE
283 READ_LOCK_CAP = TRUE
284 READ_LOCK_STATUS = TRUE
285 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
286
287
288 !if $(MINNOW2_FSP_BUILD) == TRUE
289 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
290 !else
291 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
292 !endif
293
294 INF MdeModulePkg/Core/Pei/PeiMain.inf
295 !if $(MINNOW2_FSP_BUILD) == TRUE
296 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
297 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
298 !endif
299 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
300 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
301 !if $(SECURE_BOOT_ENABLE) == TRUE
302 INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
303 !else
304 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
305 !endif
306
307 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
308
309 !if $(MINNOW2_FSP_BUILD) == FALSE
310 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
311 !endif
312
313 !if $(FTPM_ENABLE) == TRUE
314 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
315 !endif
316
317 !if $(SOURCE_DEBUG_ENABLE) == TRUE
318 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
319 !endif
320
321
322 !if $(CAPSULE_ENABLE) == TRUE
323 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
324 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
325 !endif
326
327 !if $(MINNOW2_FSP_BUILD) == FALSE
328 !if $(PCIESC_ENABLE) == TRUE
329 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
330 !endif
331 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
332 !endif
333
334 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
335
336 [FV.FVMAIN]
337 BlockSize = $(FLASH_BLOCK_SIZE)
338 FvAlignment = 16
339 ERASE_POLARITY = 1
340 MEMORY_MAPPED = TRUE
341 STICKY_WRITE = TRUE
342 LOCK_CAP = TRUE
343 LOCK_STATUS = TRUE
344 WRITE_DISABLED_CAP = TRUE
345 WRITE_ENABLED_CAP = TRUE
346 WRITE_STATUS = TRUE
347 WRITE_LOCK_CAP = TRUE
348 WRITE_LOCK_STATUS = TRUE
349 READ_DISABLED_CAP = TRUE
350 READ_ENABLED_CAP = TRUE
351 READ_STATUS = TRUE
352 READ_LOCK_CAP = TRUE
353 READ_LOCK_STATUS = TRUE
354 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
355
356 APRIORI DXE {
357 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
358 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
359 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
360 }
361
362 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
363 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
364 }
365
366 #
367 # EDK II Related Platform codes
368 #
369
370 !if $(MINNOW2_FSP_BUILD) == TRUE
371 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
372 !endif
373
374 INF MdeModulePkg/Core/Dxe/DxeMain.inf
375 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
376 !if $(ACPI50_ENABLE) == TRUE
377 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
378 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
379 !endif
380
381
382 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
383 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
384 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
385 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
386 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
387 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
388 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
389 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
390 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
391 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
392 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
393 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
394 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
395
396 !if $(SECURE_BOOT_ENABLE)
397 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
398 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
399 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
400 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
401 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
402 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
403 !else
404 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
405 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
406 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
407 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
408 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
409 !endif
410
411 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
412
413 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
414 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
415 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
416 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
417
418
419 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
420
421 !if $(DATAHUB_ENABLE) == TRUE
422 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
423 !endif
424 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
425 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
426
427 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
428
429 #
430 # EDK II Related Silicon codes
431 #
432 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
433
434 !if $(USE_HPET_TIMER) == TRUE
435 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
436 !else
437 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
438 !endif
439 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
440
441 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
442
443 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
444 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
445
446 !if $(MINNOW2_FSP_BUILD) == FALSE
447 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
448 !endif
449 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
450 !if $(PCIESC_ENABLE) == TRUE
451 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
452 !endif
453
454 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
455 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
456 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
457 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
459 !if $(MINNOW2_FSP_BUILD) == FALSE
460 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
461 !else
462 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
463 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
464 !endif
465 !if $(MINNOW2_FSP_BUILD) == FALSE
466 !if $(SEC_ENABLE) == TRUE
467 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
468 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
469 !endif
470 !endif
471 !if $(TPM_ENABLED) == TRUE
472 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
473 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
474 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
475 !endif
476 !if $(FTPM_ENABLE) == TRUE
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
479 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
480 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
481 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
482 !endif
483
484 #
485 # EDK II Related Platform codes
486 #
487 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
488 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
489 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
490 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
491 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
492 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
494 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
495 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
496 !if $(GOP_DRIVER_ENABLE) == TRUE
497 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
498 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
499 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
500 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
501 SECTION UI = "IntelGopDriver"
502 }
503 !endif
504
505 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
506 #
507 # SMM
508 #
509 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
510 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
512
513 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
514 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
516 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
517 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
518 # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
519 #
520 # ACPI
521 #
522 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
523 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
524 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
525 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
526
527 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
528
529 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
530
531 #
532 # PCI
533 #
534 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
535
536 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
537
538
539 #
540 # ISA
541 #
542 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
543 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
544 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
545 !if $(SOURCE_DEBUG_ENABLE) != TRUE
546 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
547 !endif
548 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
549 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
550
551 #
552 # SDIO
553 #
554 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
555 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
556 #
557 # IDE/SCSI/AHCI
558 #
559 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
560
561 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
562
563 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
564 !if $(SATA_ENABLE) == TRUE
565 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
566 #
567
568 #
569 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
570 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
571 !if $(SCSI_ENABLE) == TRUE
572 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
573 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
574 !endif
575 #
576 !endif
577 # Console
578 #
579 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
580 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
581 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
582 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
583 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
584 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
585 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
586 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
587 #
588 # USB
589 #
590 !if $(USB_ENABLE) == TRUE
591 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
592 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
593 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
594 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
595 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
596 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
597 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
598 !endif
599
600 #
601 # ECP
602 #
603 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
604 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
605 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
606 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
607 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
608 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
609 #
610 # SMBIOS
611 #
612 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
613 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
614
615 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
616
617 #
618 # Legacy Modules
619 #
620 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
621
622 #
623 # FAT file system
624 #
625 FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
626 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
627 }
628 #
629 # UEFI Shell
630 #
631 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
632 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
633 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
634 }
635
636
637
638 !if $(GOP_DRIVER_ENABLE) == TRUE
639 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
640 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
641 SECTION UI = "IntelGopVbt"
642 }
643 !endif
644
645 #
646 # Network Modules
647 #
648 !if $(NETWORK_ENABLE) == TRUE
649 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
650 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
651 SECTION UI = "UNDI"
652 }
653 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
654 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
655 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
656 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
657 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
658 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
659 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
660 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
661 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
662 !if $(NETWORK_IP6_ENABLE) == TRUE
663 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
664 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
665 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
666 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
667 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
668 !endif
669 !if $(NETWORK_IP6_ENABLE) == TRUE
670 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
671 INF NetworkPkg/TcpDxe/TcpDxe.inf
672 !else
673 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
674 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
675 !endif
676 !if $(NETWORK_VLAN_ENABLE) == TRUE
677 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
678 !endif
679 !if $(NETWORK_ISCSI_ENABLE) == TRUE
680 !if $(NETWORK_IP6_ENABLE) == TRUE
681 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
682 !else
683 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
684 !endif
685 !endif
686 !endif
687
688 [FV.FVMAIN_COMPACT]
689 BlockSize = $(FLASH_BLOCK_SIZE)
690 FvAlignment = 16
691 ERASE_POLARITY = 1
692 MEMORY_MAPPED = TRUE
693 STICKY_WRITE = TRUE
694 LOCK_CAP = TRUE
695 LOCK_STATUS = TRUE
696 WRITE_DISABLED_CAP = TRUE
697 WRITE_ENABLED_CAP = TRUE
698 WRITE_STATUS = TRUE
699 WRITE_LOCK_CAP = TRUE
700 WRITE_LOCK_STATUS = TRUE
701 READ_DISABLED_CAP = TRUE
702 READ_ENABLED_CAP = TRUE
703 READ_STATUS = TRUE
704 READ_LOCK_CAP = TRUE
705 READ_LOCK_STATUS = TRUE
706
707
708
709 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
710 !if $(LZMA_ENABLE) == TRUE
711 # LZMA Compress
712 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
713 SECTION FV_IMAGE = FVMAIN
714 }
715 !else
716 !if $(DXE_COMPRESS_ENABLE) == TRUE
717 # Tiano Compress
718 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
719 SECTION FV_IMAGE = FVMAIN
720 }
721 !else
722 # No Compress
723 SECTION COMPRESS PI_NONE {
724 SECTION FV_IMAGE = FVMAIN
725 }
726 !endif
727 !endif
728 }
729
730 [FV.SETUP_DATA]
731 BlockSize = $(FLASH_BLOCK_SIZE)
732 #NumBlocks = 0x10
733 FvAlignment = 16
734 ERASE_POLARITY = 1
735 MEMORY_MAPPED = TRUE
736 STICKY_WRITE = TRUE
737 LOCK_CAP = TRUE
738 LOCK_STATUS = TRUE
739 WRITE_DISABLED_CAP = TRUE
740 WRITE_ENABLED_CAP = TRUE
741 WRITE_STATUS = TRUE
742 WRITE_LOCK_CAP = TRUE
743 WRITE_LOCK_STATUS = TRUE
744 READ_DISABLED_CAP = TRUE
745 READ_ENABLED_CAP = TRUE
746 READ_STATUS = TRUE
747 READ_LOCK_CAP = TRUE
748 READ_LOCK_STATUS = TRUE
749
750
751 [FV.Update_Data]
752 BlockSize = $(FLASH_BLOCK_SIZE)
753 FvAlignment = 16
754 ERASE_POLARITY = 1
755 MEMORY_MAPPED = TRUE
756 STICKY_WRITE = TRUE
757 LOCK_CAP = TRUE
758 LOCK_STATUS = TRUE
759 WRITE_DISABLED_CAP = TRUE
760 WRITE_ENABLED_CAP = TRUE
761 WRITE_STATUS = TRUE
762 WRITE_LOCK_CAP = TRUE
763 WRITE_LOCK_STATUS = TRUE
764 READ_DISABLED_CAP = TRUE
765 READ_ENABLED_CAP = TRUE
766 READ_STATUS = TRUE
767 READ_LOCK_CAP = TRUE
768 READ_LOCK_STATUS = TRUE
769
770 FILE RAW = 88888888-8888-8888-8888-888888888888 {
771 FD = Vlv
772 }
773
774 [FV.BiosUpdateCargo]
775 BlockSize = $(FLASH_BLOCK_SIZE)
776 FvAlignment = 16
777 ERASE_POLARITY = 1
778 MEMORY_MAPPED = TRUE
779 STICKY_WRITE = TRUE
780 LOCK_CAP = TRUE
781 LOCK_STATUS = TRUE
782 WRITE_DISABLED_CAP = TRUE
783 WRITE_ENABLED_CAP = TRUE
784 WRITE_STATUS = TRUE
785 WRITE_LOCK_CAP = TRUE
786 WRITE_LOCK_STATUS = TRUE
787 READ_DISABLED_CAP = TRUE
788 READ_ENABLED_CAP = TRUE
789 READ_STATUS = TRUE
790 READ_LOCK_CAP = TRUE
791 READ_LOCK_STATUS = TRUE
792
793
794
795 [FV.BiosUpdate]
796 BlockSize = $(FLASH_BLOCK_SIZE)
797 FvAlignment = 16
798 ERASE_POLARITY = 1
799 MEMORY_MAPPED = TRUE
800 STICKY_WRITE = TRUE
801 LOCK_CAP = TRUE
802 LOCK_STATUS = TRUE
803 WRITE_DISABLED_CAP = TRUE
804 WRITE_ENABLED_CAP = TRUE
805 WRITE_STATUS = TRUE
806 WRITE_LOCK_CAP = TRUE
807 WRITE_LOCK_STATUS = TRUE
808 READ_DISABLED_CAP = TRUE
809 READ_ENABLED_CAP = TRUE
810 READ_STATUS = TRUE
811 READ_LOCK_CAP = TRUE
812 READ_LOCK_STATUS = TRUE
813
814 [Capsule.Capsule_Boot]
815 #
816 # gEfiCapsuleGuid supported by platform
817 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
818 #
819 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
820 CAPSULE_FLAGS = PersistAcrossReset
821 CAPSULE_HEADER_SIZE = 0x20
822
823 FV = BiosUpdate
824
825 [Capsule.Capsule_Reset]
826 #
827 # gEfiCapsuleGuid supported by platform
828 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
829 #
830 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
831 CAPSULE_FLAGS = PersistAcrossReset
832 CAPSULE_HEADER_SIZE = 0x20
833
834 FV = BiosUpdate
835
836 ################################################################################
837 #
838 # Rules are use with the [FV] section's module INF type to define
839 # how an FFS file is created for a given INF file. The following Rule are the default
840 # rules for the different module type. User can add the customized rules to define the
841 # content of the FFS file.
842 #
843 ################################################################################
844 [Rule.Common.SEC]
845 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
846 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
847 RAW BIN Align = 16 |.com
848 }
849
850 [Rule.Common.SEC.BINARY]
851 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
852 PE32 PE32 Align = 8 |.efi
853 RAW BIN Align = 16 |.com
854 }
855
856 [Rule.Common.PEI_CORE]
857 FILE PEI_CORE = $(NAMED_GUID) {
858 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
859 UI STRING="$(MODULE_NAME)" Optional
860 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
861 }
862
863 [Rule.Common.PEIM]
864 FILE PEIM = $(NAMED_GUID) {
865 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
866 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
867 UI STRING="$(MODULE_NAME)" Optional
868 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
869 }
870
871 [Rule.Common.PEIM.BINARY]
872 FILE PEIM = $(NAMED_GUID) {
873 PEI_DEPEX PEI_DEPEX Optional |.depex
874 PE32 PE32 Align = Auto |.efi
875 UI STRING="$(MODULE_NAME)" Optional
876 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
877 }
878
879 [Rule.Common.PEIM.BIOSID]
880 FILE PEIM = $(NAMED_GUID) {
881 RAW BIN BiosId.bin
882 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
883 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
884 UI STRING="$(MODULE_NAME)" Optional
885 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
886 }
887
888 [Rule.Common.USER_DEFINED.APINIT]
889 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
890 RAW SEC_BIN |.com
891 }
892 #cjia 2011-07-21
893 [Rule.Common.USER_DEFINED.LEGACY16]
894 FILE FREEFORM = $(NAMED_GUID) {
895 UI STRING="$(MODULE_NAME)" Optional
896 RAW BIN |.bin
897 }
898 #cjia
899
900 [Rule.Common.USER_DEFINED.ASM16]
901 FILE FREEFORM = $(NAMED_GUID) {
902 UI STRING="$(MODULE_NAME)" Optional
903 RAW BIN |.com
904 }
905
906 [Rule.Common.DXE_CORE]
907 FILE DXE_CORE = $(NAMED_GUID) {
908 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
909 UI STRING="$(MODULE_NAME)" Optional
910 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
911 }
912
913 [Rule.Common.UEFI_DRIVER]
914 FILE DRIVER = $(NAMED_GUID) {
915 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
916 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
917 UI STRING="$(MODULE_NAME)" Optional
918 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
919 }
920
921 [Rule.Common.UEFI_DRIVER.BINARY]
922 FILE DRIVER = $(NAMED_GUID) {
923 DXE_DEPEX DXE_DEPEX Optional |.depex
924 PE32 PE32 |.efi
925 UI STRING="$(MODULE_NAME)" Optional
926 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
927 }
928
929 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
930 FILE DRIVER = $(NAMED_GUID) {
931 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
932 PE32 PE32 |.efi
933 UI STRING="$(MODULE_NAME)" Optional
934 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
935 }
936
937 [Rule.Common.DXE_DRIVER]
938 FILE DRIVER = $(NAMED_GUID) {
939 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
940 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
941 UI STRING="$(MODULE_NAME)" Optional
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
943 }
944
945 [Rule.Common.DXE_DRIVER.BINARY]
946 FILE DRIVER = $(NAMED_GUID) {
947 DXE_DEPEX DXE_DEPEX Optional |.depex
948 PE32 PE32 |.efi
949 UI STRING="$(MODULE_NAME)" Optional
950 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
951 }
952
953 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
954 FILE DRIVER = $(NAMED_GUID) {
955 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
956 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
957 UI STRING="$(MODULE_NAME)" Optional
958 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
959 RAW ACPI Optional |.acpi
960 RAW ASL Optional |.aml
961 }
962
963 [Rule.Common.DXE_RUNTIME_DRIVER]
964 FILE DRIVER = $(NAMED_GUID) {
965 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
966 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
967 UI STRING="$(MODULE_NAME)" Optional
968 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
969 }
970
971 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
972 FILE DRIVER = $(NAMED_GUID) {
973 DXE_DEPEX DXE_DEPEX Optional |.depex
974 PE32 PE32 |.efi
975 UI STRING="$(MODULE_NAME)" Optional
976 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
977 }
978
979 [Rule.Common.DXE_SMM_DRIVER]
980 FILE SMM = $(NAMED_GUID) {
981 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
982 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
983 UI STRING="$(MODULE_NAME)" Optional
984 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
985 }
986
987 [Rule.Common.DXE_SMM_DRIVER.BINARY]
988 FILE SMM = $(NAMED_GUID) {
989 SMM_DEPEX SMM_DEPEX |.depex
990 PE32 PE32 |.efi
991 RAW BIN Optional |.aml
992 UI STRING="$(MODULE_NAME)" Optional
993 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
994 }
995
996 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
997 FILE SMM = $(NAMED_GUID) {
998 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
999 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1000 UI STRING="$(MODULE_NAME)" Optional
1001 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1002 RAW ACPI Optional |.acpi
1003 RAW ASL Optional |.aml
1004 }
1005
1006 [Rule.Common.SMM_CORE]
1007 FILE SMM_CORE = $(NAMED_GUID) {
1008 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1009 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1010 UI STRING="$(MODULE_NAME)" Optional
1011 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1012 }
1013
1014 [Rule.Common.SMM_CORE.BINARY]
1015 FILE SMM_CORE = $(NAMED_GUID) {
1016 DXE_DEPEX DXE_DEPEX Optional |.depex
1017 PE32 PE32 |.efi
1018 UI STRING="$(MODULE_NAME)" Optional
1019 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1020 }
1021
1022 [Rule.Common.UEFI_APPLICATION]
1023 FILE APPLICATION = $(NAMED_GUID) {
1024 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1025 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1026 UI STRING="$(MODULE_NAME)" Optional
1027 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1028 }
1029
1030 [Rule.Common.UEFI_APPLICATION.UI]
1031 FILE APPLICATION = $(NAMED_GUID) {
1032 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1033 UI STRING="Enter Setup"
1034 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1035 }
1036
1037 [Rule.Common.USER_DEFINED]
1038 FILE FREEFORM = $(NAMED_GUID) {
1039 UI STRING="$(MODULE_NAME)" Optional
1040 RAW BIN |.bin
1041 }
1042
1043 [Rule.Common.USER_DEFINED.ACPITABLE]
1044 FILE FREEFORM = $(NAMED_GUID) {
1045 RAW ACPI Optional |.acpi
1046 RAW ASL Optional |.aml
1047 }
1048
1049 [Rule.Common.USER_DEFINED.ACPITABLE2]
1050 FILE FREEFORM = $(NAMED_GUID) {
1051 RAW ASL Optional |.aml
1052 }
1053
1054 [Rule.Common.ACPITABLE]
1055 FILE FREEFORM = $(NAMED_GUID) {
1056 RAW ACPI Optional |.acpi
1057 RAW ASL Optional |.aml
1058 }
1059