#/** @file # ARM processor package. # # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at # http://opensource.org/licenses/bsd-license.php # # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # #**/ [Defines] DEC_SPECIFICATION = 0x00010005 PACKAGE_NAME = ArmPkg PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F PACKAGE_VERSION = 0.1 ################################################################################ # # Include Section - list of Include Paths that are provided by this package. # Comments are used for Keywords and Module Types. # # Supported Module Types: # BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION # ################################################################################ [Includes.common] Include # Root include for the package [LibraryClasses.common] ArmLib|Include/Library/ArmLib.h SemihostLib|Include/Library/Semihosting.h UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h [Guids.common] gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } } ## ARM MPCore table # Include/Guid/ArmMpCoreInfo.h gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} } [Ppis] ## Include/Ppi/ArmMpCoreInfo.h gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} } [Protocols.common] gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } } [PcdsFeatureFlag.common] gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001 # On ARM Architecture with the Security Extension, the address for the # Vector Table can be mapped anywhere in the memory map. It means we can # point the Exception Vector Table to its location in CpuDxe. # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress) gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022 # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before # it has been configured by the CPU DXE gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032 # Define if the Power State Coordination Interface (PSCI) is supported by the Platform Trusted Firmware gArmTokenSpaceGuid.PcdArmPsciSupport|FALSE|BOOLEAN|0x00000033 [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006 # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file. # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor. gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024 gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002 gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003 gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004 gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005 # # ARM PL390 General Interrupt Controller # gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025 # # ARM Secure Firmware PCDs # gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015 gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030 # # ARM Normal (or Non Secure) Firmware PCDs # gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E # # ARM Hypervisor Firmware PCDs # gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D # # ARM Security Extension # # Secure Configuration Register # - BIT0 : NS - Non Secure bit # - BIT1 : IRQ Handler # - BIT2 : FIQ Handler # - BIT3 : EA - External Abort # - BIT4 : FW - F bit writable # - BIT5 : AW - A bit writable # - BIT6 : nET - Not Early Termination # - BIT7 : SCD - Secure Monitor Call Disable # - BIT8 : HCE - Hyp Call enable # - BIT9 : SIF - Secure Instruction Fetch # 0x31 = NS | EA | FW gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038 # Non Secure Access Control Register # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable # 0xC00 = cp10 | cp11 gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039 # System Memory (DRAM): These PCDs define the region of in-built system memory # Some platforms can get DRAM extensions, these additional regions will be declared # to UEFI by ArmPLatformPlib gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT32|0x00000029 gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT32|0x0000002A # Use ClusterId + CoreId to identify the PrimaryCore gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031 # The Primary Core is ClusterId[0] & CoreId[0] gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037 # # ARM L2x0 PCDs # gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B # # BdsLib # gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F # # ARM Architectural Timer # gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034 # ARM Architectural Timer Interrupt(GIC PPI) number gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035 gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036 [PcdsFixedAtBuild.ARM] # By default we do not do a transition to non-secure mode gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020 # If the fixed FDT address is not available, then it should be loaded below the kernel. # The recommendation from the Linux kernel is to have the FDT below 16KB. # (see the kernel doc: Documentation/arm/Booting) gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023 # The FDT blob must be loaded at a 64bit aligned address. gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026