ARM: Remove NSACR from the common code

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 3326e7b584b59db3fced3f2984872bc0266d8f50..39f264251bb13038a09705cd498ecaab1b7d680e 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -128,15 +128,7 @@
   # - BIT9 : SIF - Secure Instruction Fetch\r
   # 0x31 = NS | EA | FW\r
   gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038\r
-  \r
-  # Non Secure Access Control Register\r
-  # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality\r
-  # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 \r
-  # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable\r
-  # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable\r
-  # 0xC00 = cp10 | cp11\r
-  gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039\r
-  \r
+\r
   # System Memory (DRAM): These PCDs define the region of in-built system memory\r
   # Some platforms can get DRAM extensions, these additional regions will be declared\r
   # to UEFI by ArmPLatformPlib   \r
@@ -182,6 +174,14 @@
   # The FDT blob must be loaded at a 64bit aligned address.\r
   gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026\r
 \r
+  # Non Secure Access Control Register\r
+  # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality\r
+  # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31\r
+  # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable\r
+  # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable\r
+  # 0xC00 = cp10 | cp11\r
+  gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039\r
+\r
 [PcdsFixedAtBuild.AARCH64]\r
   # By default we do transition to EL2 non-secure mode with Stack for EL2.\r
   #        Mode Description              Bits\r