Sync up ArmPkg with patch from mailing list. Changed name of BdsLib.h to BdsUnixLib...
[mirror_edk2.git] / ArmPkg / ArmPkg.dec
index 0b8c101..6344575 100644 (file)
 [Protocols.common]\r
   gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }\r
 \r
+  ## Include/Protocol/MmcHost.h\r
+  gEfiMmcHostProtocolGuid              = { 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B }}\r
+\r
 [PcdsFeatureFlag.common]\r
   gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001\r
 \r
+  # On ARM Architecture with the Security Extension, the address for the\r
+  # Vector Table can be mapped anywhere in the memory map. It means we can\r
+  # point the Exception Vector Table to its location in CpuDxe.\r
+  # By default we copy the Vector Table at  PcdGet32(PcdCpuVectorBaseAddress)\r
+  gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022\r
+  \r
+  gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025\r
+  gArmTokenSpaceGuid.PcdSkipPeiCore|FALSE|BOOLEAN|0x00000026\r
+\r
 [PcdsFixedAtBuild.common]\r
+  # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.\r
+  # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.\r
+  gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024\r
+\r
   gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002\r
   gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xfff00000|UINT32|0x00000004\r
   gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
+  \r
+  #\r
+  # ARM PL180 MCI\r
+  #\r
+  gArmTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000006\r
+  gArmTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000007\r
+\r
+  #\r
+  # ARM PL390 General Interrupt Controller\r
+  #\r
+  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
+  gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023\r
+\r
+  #\r
+  # ARM Secure SEC PCDs\r
+  #\r
+  gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015\r
+  gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016\r
+\r
+  #\r
+  # ARM MPCore MailBox PCDs\r
+  #\r
+  # Address to Set/Get to Mailbox in Multicore system\r
+  gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017\r
+  gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018\r
+  # Address/Value to clear Mailbox in Multicore system\r
+  gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019\r
+  gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A\r
+\r
+  #\r
+  # ARM L2x0 PCDs\r
+  #\r
+  gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B\r
+  \r
+  #\r
+  # ARM PL390 General Interrupt Controller\r
+  #\r
+  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C\r
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D\r
+  \r
+  # \r
+  # BdsLib\r
+  #\r
+  gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E\r
+  gArmTokenSpaceGuid.PcdLinuxKernelDP|L""|VOID*|0x0000001F\r
+  gArmTokenSpaceGuid.PcdLinuxAtag|""|VOID*|0x00000020\r
+  gArmTokenSpaceGuid.PcdFdtDP|L""|VOID*|0x00000021\r
+\r