ArmPkg/CpuDxe: handle implied attributes in EfiAttributeToArmAttribute

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 7688846e70cb1833c732a3eafee8e885004b502a..3e216c7cb235165b3df686aabff58628dd4ab801 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -204,16 +204,20 @@ EfiAttributeToArmAttribute (
 \r
   switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
   case EFI_MEMORY_UC:\r
 \r
   switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
   case EFI_MEMORY_UC:\r

-    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
+    if (ArmReadCurrentEL () == AARCH64_EL2) {\r
+      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;\r
+    } else {\r
+      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;\r
+    }\r

     break;\r
   case EFI_MEMORY_WC:\r
     ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
     break;\r
   case EFI_MEMORY_WT:\r
     break;\r
   case EFI_MEMORY_WC:\r
     ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
     break;\r
   case EFI_MEMORY_WT:\r

-    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;\r
+    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;\r

     break;\r
   case EFI_MEMORY_WB:\r
     break;\r
   case EFI_MEMORY_WB:\r

-    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;\r
+    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;\r

     break;\r
   default:\r
     ArmAttributes = TT_ATTR_INDX_MASK;\r
     break;\r
   default:\r
     ArmAttributes = TT_ATTR_INDX_MASK;\r