*GcdAttributes = 0;\r
\r
// determine cacheability attributes\r
- switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {\r
+ switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {\r
case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:\r
*GcdAttributes |= EFI_MEMORY_UC;\r
break;\r
}\r
\r
// determine protection attributes\r
- switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {\r
+ switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {\r
case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write\r
- //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
+ // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
break;\r
\r
case TT_DESCRIPTOR_SECTION_AP_RW_NO:\r
*GcdAttributes = 0;\r
\r
// determine cacheability attributes\r
- switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {\r
+ switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {\r
case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:\r
*GcdAttributes |= EFI_MEMORY_UC;\r
break;\r
}\r
\r
// determine protection attributes\r
- switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
+ switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write\r
- //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
+ // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
break;\r
\r
case TT_DESCRIPTOR_PAGE_AP_RW_NO:\r
\r
EFI_STATUS\r
SyncCacheConfigPage (\r
- IN UINT32 SectionIndex,\r
- IN UINT32 FirstLevelDescriptor,\r
- IN UINTN NumberOfDescriptors,\r
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,\r
- IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,\r
- IN OUT UINT64 *NextRegionLength,\r
- IN OUT UINT32 *NextSectionAttributes\r
+ IN UINT32 SectionIndex,\r
+ IN UINT32 FirstLevelDescriptor,\r
+ IN UINTN NumberOfDescriptors,\r
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,\r
+ IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,\r
+ IN OUT UINT64 *NextRegionLength,\r
+ IN OUT UINT32 *NextSectionAttributes\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 i;\r
- volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;\r
- UINT32 NextPageAttributes;\r
- UINT32 PageAttributes;\r
- UINT32 BaseAddress;\r
- UINT64 GcdAttributes;\r
+ EFI_STATUS Status;\r
+ UINT32 i;\r
+ volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;\r
+ UINT32 NextPageAttributes;\r
+ UINT32 PageAttributes;\r
+ UINT32 BaseAddress;\r
+ UINT64 GcdAttributes;\r
\r
// Get the Base Address from FirstLevelDescriptor;\r
- BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
\r
// Convert SectionAttributes into PageAttributes\r
NextPageAttributes =\r
- TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |\r
- TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);\r
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |\r
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);\r
\r
// obtain page table base\r
SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
- for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {\r
+ for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {\r
if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {\r
// extract attributes (cacheability and permissions)\r
PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);\r
\r
if (NextPageAttributes == 0) {\r
// start on a new region\r
- *NextRegionLength = 0;\r
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
NextPageAttributes = PageAttributes;\r
} else if (PageAttributes != NextPageAttributes) {\r
// Convert Section Attributes into GCD Attributes\r
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
\r
// start on a new region\r
- *NextRegionLength = 0;\r
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
NextPageAttributes = PageAttributes;\r
}\r
} else if (NextPageAttributes != 0) {\r
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
\r
- *NextRegionLength = 0;\r
- *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
NextPageAttributes = 0;\r
}\r
+\r
*NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;\r
}\r
\r
// Convert back PageAttributes into SectionAttributes\r
*NextSectionAttributes =\r
- TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |\r
- TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);\r
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |\r
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);\r
\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
SyncCacheConfig (\r
- IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
+ IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 i;\r
- EFI_PHYSICAL_ADDRESS NextRegionBase;\r
- UINT64 NextRegionLength;\r
- UINT32 NextSectionAttributes;\r
- UINT32 SectionAttributes;\r
- UINT64 GcdAttributes;\r
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
- UINTN NumberOfDescriptors;\r
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
-\r
+ EFI_STATUS Status;\r
+ UINT32 i;\r
+ EFI_PHYSICAL_ADDRESS NextRegionBase;\r
+ UINT64 NextRegionLength;\r
+ UINT32 NextSectionAttributes;\r
+ UINT32 SectionAttributes;\r
+ UINT64 GcdAttributes;\r
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
+ UINTN NumberOfDescriptors;\r
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
\r
DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));\r
\r
// Get the memory space map from GCD\r
//\r
MemorySpaceMap = NULL;\r
- Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
+ Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
ASSERT_EFI_ERROR (Status);\r
\r
-\r
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs\r
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a\r
// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
\r
// iterate through each 1MB descriptor\r
NextRegionBase = NextRegionLength = 0;\r
- for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {\r
+ for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {\r
if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {\r
// extract attributes (cacheability and permissions)\r
SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
\r
if (NextSectionAttributes == 0) {\r
// start on a new region\r
- NextRegionLength = 0;\r
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextRegionLength = 0;\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
NextSectionAttributes = SectionAttributes;\r
} else if (SectionAttributes != NextSectionAttributes) {\r
// Convert Section Attributes into GCD Attributes\r
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
// start on a new region\r
- NextRegionLength = 0;\r
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextRegionLength = 0;\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
NextSectionAttributes = SectionAttributes;\r
}\r
+\r
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
- } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {\r
+ } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {\r
// In this case any bits set in the 'NextSectionAttributes' are garbage and were set from\r
// bits that are actually part of the pagetable address. We clear it out to zero so that\r
// the SyncCacheConfigPage will use the page attributes instead of trying to convert the\r
// section attributes into page attributes\r
NextSectionAttributes = 0;\r
- Status = SyncCacheConfigPage (\r
- i,FirstLevelTable[i],\r
- NumberOfDescriptors, MemorySpaceMap,\r
- &NextRegionBase,&NextRegionLength,&NextSectionAttributes);\r
+ Status = SyncCacheConfigPage (\r
+ i,\r
+ FirstLevelTable[i],\r
+ NumberOfDescriptors,\r
+ MemorySpaceMap,\r
+ &NextRegionBase,\r
+ &NextRegionLength,\r
+ &NextSectionAttributes\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
} else {\r
// We do not support yet 16MB sections\r
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
- NextRegionLength = 0;\r
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextRegionLength = 0;\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
NextSectionAttributes = 0;\r
}\r
+\r
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
}\r
} // section entry loop\r
\r
UINT64\r
EfiAttributeToArmAttribute (\r
- IN UINT64 EfiAttributes\r
+ IN UINT64 EfiAttributes\r
)\r
{\r
- UINT64 ArmAttributes;\r
+ UINT64 ArmAttributes;\r
\r
switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
case EFI_MEMORY_UC:\r
\r
EFI_STATUS\r
GetMemoryRegionPage (\r
- IN UINT32 *PageTable,\r
- IN OUT UINTN *BaseAddress,\r
- OUT UINTN *RegionLength,\r
- OUT UINTN *RegionAttributes\r
+ IN UINT32 *PageTable,\r
+ IN OUT UINTN *BaseAddress,\r
+ OUT UINTN *RegionLength,\r
+ OUT UINTN *RegionAttributes\r
)\r
{\r
- UINT32 PageAttributes;\r
- UINT32 TableIndex;\r
- UINT32 PageDescriptor;\r
+ UINT32 PageAttributes;\r
+ UINT32 TableIndex;\r
+ UINT32 PageDescriptor;\r
\r
// Convert the section attributes into page attributes\r
PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);\r
ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);\r
\r
// Go through the page table to find the end of the section\r
- for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {\r
+ for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {\r
// Get the section at the given index\r
PageDescriptor = PageTable[TableIndex];\r
\r
}\r
} else {\r
// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.\r
- ASSERT(0);\r
+ ASSERT (0);\r
return EFI_SUCCESS;\r
}\r
}\r
\r
EFI_STATUS\r
GetMemoryRegion (\r
- IN OUT UINTN *BaseAddress,\r
- OUT UINTN *RegionLength,\r
- OUT UINTN *RegionAttributes\r
+ IN OUT UINTN *BaseAddress,\r
+ OUT UINTN *RegionLength,\r
+ OUT UINTN *RegionAttributes\r
)\r
{\r
EFI_STATUS Status;\r
UINT32 PageAttributes;\r
UINT32 PageTableIndex;\r
UINT32 SectionDescriptor;\r
- ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
- UINT32 *PageTable;\r
+ ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
+ UINT32 *PageTable;\r
\r
// Initialize the arguments\r
*RegionLength = 0;\r
if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||\r
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))\r
{\r
- *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;\r
+ *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;\r
*RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;\r
} else {\r
// Otherwise, we round it to the page boundary\r
*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;\r
\r
// Get the attribute at the page table level (Level 2)\r
- PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
+ PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
// Calculate index into first level translation table for start of modification\r
PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;\r
ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);\r
\r
- PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;\r
+ PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;\r
*RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |\r
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);\r
}\r
\r
- for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {\r
+ for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {\r
// Get the section at the given index\r
SectionDescriptor = FirstLevelTable[TableIndex];\r
\r
// If the entry is a level-2 page table then we scan it to find the end of the region\r
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {\r
// Extract the page table location from the descriptor\r
- PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
+ PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
// Scan the page table to find the end of the region.\r
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);\r
break;\r
}\r
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||\r
- ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {\r
+ ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))\r
+ {\r
if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {\r
// If the attributes of the section differ from the one targeted then we exit the loop\r
break;\r
projects / mirror_edk2.git / blobdiff