\r
#include "CpuDxe.h"\r
\r
+BOOLEAN gExceptionContext = FALSE;\r
+BOOLEAN mInterruptState = FALSE;\r
+\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
{\r
switch (FlushType) {\r
case EfiCpuFlushTypeWriteBack:\r
- WriteBackDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
case EfiCpuFlushTypeInvalidate:\r
- InvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
case EfiCpuFlushTypeWriteBackInvalidate:\r
- WriteBackInvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
default:\r
return EFI_INVALID_PARAMETER;\r
IN EFI_CPU_ARCH_PROTOCOL *This\r
)\r
{\r
- if (ArmProcessorMode() != ARM_PROCESSOR_MODE_IRQ) {\r
- ArmEnableInterrupts(); \r
+ if (!gExceptionContext) {\r
+ ArmEnableInterrupts ();\r
}\r
+\r
+ mInterruptState = TRUE;\r
return EFI_SUCCESS;\r
}\r
\r
IN EFI_CPU_ARCH_PROTOCOL *This\r
)\r
{\r
- if (ArmProcessorMode() != ARM_PROCESSOR_MODE_IRQ) {\r
- ArmDisableInterrupts();\r
+ if (!gExceptionContext) {\r
+ ArmDisableInterrupts ();\r
}\r
+\r
+ mInterruptState = FALSE;\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- *State = ArmGetInterruptState();\r
+ *State = mInterruptState;\r
return EFI_SUCCESS;\r
}\r
\r
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
)\r
{\r
- return RegisterInterruptHandler(InterruptType, InterruptHandler);\r
+ return RegisterInterruptHandler (InterruptType, InterruptHandler);\r
}\r
\r
EFI_STATUS\r
IN EFI_HANDLE ImageHandle,\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
-{\r
- InitializeExceptions(&mCpu); \r
- return gBS->InstallMultipleProtocolInterfaces(&mCpuHandle, &gEfiCpuArchProtocolGuid, &mCpu, NULL);\r
+{ \r
+ InitializeExceptions (&mCpu); \r
+ return gBS->InstallMultipleProtocolInterfaces (&mCpuHandle, &gEfiCpuArchProtocolGuid, &mCpu, NULL);\r
}\r
\r