+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-* \r
-* This program and the accompanying materials \r
-* are licensed and made available under the terms and conditions of the BSD License \r
-* which accompanies this distribution. The full text of the license may be found at \r
-* http://opensource.org/licenses/bsd-license.php \r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-*\r
-**/\r
-\r
-#include <Uefi.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/ArmGicLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-UINTN\r
-EFIAPI\r
-ArmGicGetMaxNumInterrupts (\r
- IN INTN GicDistributorBase\r
- )\r
-{\r
- return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-ArmGicSendSgiTo (\r
- IN INTN GicDistributorBase,\r
- IN INTN TargetListFilter,\r
- IN INTN CPUTargetList,\r
- IN INTN SgiId\r
- )\r
-{\r
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);\r
-}\r
-\r
-RETURN_STATUS\r
-EFIAPI\r
-ArmGicAcknowledgeInterrupt (\r
- IN UINTN GicDistributorBase,\r
- IN UINTN GicInterruptInterfaceBase,\r
- OUT UINTN *CoreId,\r
- OUT UINTN *InterruptId\r
- )\r
-{\r
- UINT32 Interrupt;\r
-\r
- // Read the Interrupt Acknowledge Register\r
- Interrupt = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);\r
-\r
- // Check if it is a valid interrupt ID\r
- if ((Interrupt & 0x3FF) < ArmGicGetMaxNumInterrupts (GicDistributorBase)) {\r
- // Got a valid SGI number hence signal End of Interrupt by writing to ICCEOIR\r
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Interrupt);\r
-\r
- if (CoreId) {\r
- *CoreId = (Interrupt >> 10) & 0x7;\r
- }\r
- if (InterruptId) {\r
- *InterruptId = Interrupt & 0x3FF;\r
- }\r
- return RETURN_SUCCESS;\r
- } else {\r
- return RETURN_INVALID_PARAMETER;\r
- }\r
-}\r