Patch from open source community for CryptoPkg to allow it to build for ARM using...

[mirror_edk2.git] / ArmPkg / Drivers / PL390Gic / PL390GicSec.c

diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 46b14e074633b9d830e4cb4a2cf9902d591e6d08..156e0601e8770e9ef08a37fc3d76f6ddf47e18fd 100644 (file)
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -34,11 +34,11 @@ PL390GicSetupNonSecure (
    //Check if there are any pending interrupts\r
    while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF))\r
    {\r
-          //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal\r
-          UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
+     //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal\r
+     UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
-          //Write to End of interrupt signal\r
-          MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
+     //Write to End of interrupt signal\r
+     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
    }\r
 \r
   // Ensure all GIC interrupts are Non-Secure\r
@@ -56,19 +56,19 @@ PL390GicEnableInterruptInterface (
   IN  INTN          GicInterruptInterfaceBase\r
   )\r
 {\r
-       MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0x000000FF);  /* Set Priority Mask to allow interrupts */\r
+  MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0x000000FF);  /* Set Priority Mask to allow interrupts */\r
 \r
-       /*\r
-        * Enable CPU interface in Secure world\r
+  /*\r
+   * Enable CPU interface in Secure world\r
      * Enable CPU inteface in Non-secure World\r
-        * Signal Secure Interrupts to CPU using FIQ line *\r
-        */\r
+   * Signal Secure Interrupts to CPU using FIQ line *\r
+   */\r
     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,\r
-               GIC_ICCICR_ENABLE_SECURE(1) |\r
-               GIC_ICCICR_ENABLE_NS(1) |\r
-               GIC_ICCICR_ACK_CTL(0) |\r
-               GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |\r
-               GIC_ICCICR_USE_SBPR(0));\r
+        GIC_ICCICR_ENABLE_SECURE(1) |\r
+        GIC_ICCICR_ENABLE_NS(1) |\r
+        GIC_ICCICR_ACK_CTL(0) |\r
+        GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |\r
+        GIC_ICCICR_USE_SBPR(0));\r
 }\r
 \r
 VOID\r
@@ -88,7 +88,7 @@ PL390GicSendSgiTo (
   IN  INTN          CPUTargetList\r
   )\r
 {\r
-       MmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));\r
+  MmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));\r
 }\r
 \r
 UINT32\r
@@ -103,9 +103,9 @@ PL390GicAcknowledgeSgiFrom (
     InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
     //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
-       if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {\r
-           //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
-               MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
+  if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {\r
+      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
+    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
         return 1;\r
     } else {\r
         return 0;\r
@@ -125,9 +125,9 @@ PL390GicAcknowledgeSgi2From (
     InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
     //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
-       if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {\r
-           //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
-               MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
+  if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {\r
+      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
+    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
         return 1;\r
     } else {\r
         return 0;\r