* delegated events and request the Secure partition manager to perform\r
* privileged operations on its behalf.\r
*/\r
-#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060\r
-#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061\r
-#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064\r
-#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065\r
-#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061\r
-#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064\r
-#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065\r
+#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060\r
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061\r
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064\r
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065\r
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061\r
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064\r
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065\r
\r
/* Generic IDs when using AArch32 or AArch64 execution state */\r
#ifdef MDE_CPU_AARCH64\r
-#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64\r
-#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64\r
-#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64\r
+#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64\r
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64\r
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64\r
#endif\r
#ifdef MDE_CPU_ARM\r
-#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32\r
-#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32\r
-#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32\r
+#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32\r
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32\r
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32\r
#endif\r
\r
#define SET_MEM_ATTR_DATA_PERM_MASK 0x3\r
-#define SET_MEM_ATTR_DATA_PERM_SHIFT 0\r
-#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0\r
-#define SET_MEM_ATTR_DATA_PERM_RW 1\r
-#define SET_MEM_ATTR_DATA_PERM_RO 3\r
+#define SET_MEM_ATTR_DATA_PERM_SHIFT 0\r
+#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0\r
+#define SET_MEM_ATTR_DATA_PERM_RW 1\r
+#define SET_MEM_ATTR_DATA_PERM_RO 3\r
\r
#define SET_MEM_ATTR_CODE_PERM_MASK 0x1\r
-#define SET_MEM_ATTR_CODE_PERM_SHIFT 2\r
-#define SET_MEM_ATTR_CODE_PERM_X 0\r
-#define SET_MEM_ATTR_CODE_PERM_XN 1\r
+#define SET_MEM_ATTR_CODE_PERM_SHIFT 2\r
+#define SET_MEM_ATTR_CODE_PERM_X 0\r
+#define SET_MEM_ATTR_CODE_PERM_XN 1\r
\r
#define SET_MEM_ATTR_MAKE_PERM_REQUEST(d_perm, c_perm) \\r
((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \\r
(( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))\r
\r
/* MM SVC Return error codes */\r
-#define ARM_SVC_SPM_RET_SUCCESS 0\r
-#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1\r
-#define ARM_SVC_SPM_RET_INVALID_PARAMS -2\r
-#define ARM_SVC_SPM_RET_DENIED -3\r
-#define ARM_SVC_SPM_RET_NO_MEMORY -5\r
-\r
-#define SPM_MAJOR_VERSION 0\r
-#define SPM_MINOR_VERSION 1\r
+#define ARM_SVC_SPM_RET_SUCCESS 0\r
+#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1\r
+#define ARM_SVC_SPM_RET_INVALID_PARAMS -2\r
+#define ARM_SVC_SPM_RET_DENIED -3\r
+#define ARM_SVC_SPM_RET_NO_MEMORY -5\r
+\r
+#define SPM_MAJOR_VERSION 0\r
+#define SPM_MINOR_VERSION 1\r
\r
#endif // ARM_MM_SVC_H_\r