ARM_PROCESSOR_MODE_MASK = 0x1F
} ARM_PROCESSOR_MODE;
+#define IS_PRIMARY_CORE(MpId) (((MpId) & PcdGet32(PcdArmPrimaryCoreMask)) == PcdGet32(PcdArmPrimaryCore))
+#define GET_CORE_ID(MpId) ((MpId) & 0x3)
+#define GET_CLUSTER_ID(MpId) (((MpId) >> 6) & 0x3C)
+// Get the position of the core for the Stack Offset (4 Core per Cluster)
+// Position = (ClusterId * 4) + CoreId
+#define GET_CORE_POS(MpId) ((((MpId) >> 6) & 0x3C) + ((MpId) & 0x3))
+#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & 0x3)
+
ARM_CACHE_TYPE
EFIAPI
ArmCacheType (