ArmPkg/ArmLib: add support for reading the max physical address space size

[mirror_edk2.git] / ArmPkg / Include / Library / ArmLib.h

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 9622444ec63f61b4d2aaf0653ad7540b96695d56..9a804c15fdb6f168528d7383db7688fccc01dc7d 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -1,7 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-  Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>\r
+  Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -26,6 +26,10 @@
  #error "Unknown chipset."\r
 #endif\r
 \r
+#define EFI_MEMORY_CACHETYPE_MASK   (EFI_MEMORY_UC | EFI_MEMORY_WC | \\r
+                                     EFI_MEMORY_WT | EFI_MEMORY_WB | \\r
+                                     EFI_MEMORY_UCE)\r
+\r
 /**\r
  * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.\r
  *\r
@@ -37,6 +41,14 @@ typedef enum {
   ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED,\r
   ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,\r
   ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK,\r
+\r
+  // On some platforms, memory mapped flash region is designed as not supporting\r
+  // shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such special\r
+  // need.\r
+  // Do NOT use below two attributes if you are not sure.\r
+  ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE,\r
+  ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE,\r
+\r
   ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,\r
   ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH,\r
   ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,\r
@@ -183,10 +195,22 @@ ArmInvalidateDataCacheEntryByMVA (
 \r
 VOID\r
 EFIAPI\r
-ArmCleanDataCacheEntryByMVA (\r
+ArmCleanDataCacheEntryToPoUByMVA (\r
+  IN  UINTN   Address\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmInvalidateInstructionCacheEntryToPoUByMVA (\r
   IN  UINTN   Address\r
   );\r
 \r
+VOID\r
+EFIAPI\r
+ArmCleanDataCacheEntryByMVA (\r
+IN  UINTN   Address\r
+);\r
+\r
 VOID\r
 EFIAPI\r
 ArmCleanInvalidateDataCacheEntryByMVA (\r
@@ -347,18 +371,16 @@ ArmSetTTBR0 (
   IN  VOID  *TranslationTableBase\r
   );\r
 \r
-VOID *\r
+VOID\r
 EFIAPI\r
-ArmGetTTBR0BaseAddress (\r
-  VOID\r
+ArmSetTTBCR (\r
+  IN  UINT32 Bits\r
   );\r
 \r
-RETURN_STATUS\r
+VOID *\r
 EFIAPI\r
-ArmConfigureMmu (\r
-  IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r
-  OUT VOID                         **TranslationTableBase OPTIONAL,\r
-  OUT UINTN                         *TranslationTableSize  OPTIONAL\r
+ArmGetTTBR0BaseAddress (\r
+  VOID\r
   );\r
 \r
 BOOLEAN\r
@@ -536,6 +558,12 @@ ArmReadSctlr (
   VOID\r
   );\r
 \r
+VOID\r
+EFIAPI\r
+ArmWriteSctlr (\r
+  IN  UINT32   Value\r
+  );\r
+\r
 UINTN\r
 EFIAPI\r
 ArmReadHVBar (\r
@@ -577,28 +605,138 @@ ArmUnsetCpuActlrBit (
   IN  UINTN    Bits\r
   );\r
 \r
-RETURN_STATUS\r
-ArmSetMemoryRegionNoExec (\r
-  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,\r
-  IN  UINT64                    Length\r
+//\r
+// Accessors for the architected generic timer registers\r
+//\r
+\r
+#define ARM_ARCH_TIMER_ENABLE           (1 << 0)\r
+#define ARM_ARCH_TIMER_IMASK            (1 << 1)\r
+#define ARM_ARCH_TIMER_ISTATUS          (1 << 2)\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntFrq (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntFrq (\r
+  UINTN   FreqInHz\r
+  );\r
+\r
+UINT64\r
+EFIAPI\r
+ArmReadCntPct (\r
+  VOID\r
+  );\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntkCtl (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntkCtl (\r
+  UINTN   Val\r
+  );\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntpTval (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntpTval (\r
+  UINTN   Val\r
+  );\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntpCtl (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntpCtl (\r
+  UINTN   Val\r
+  );\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntvTval (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntvTval (\r
+  UINTN   Val\r
+  );\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCntvCtl (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntvCtl (\r
+  UINTN   Val\r
+  );\r
+\r
+UINT64\r
+EFIAPI\r
+ArmReadCntvCt (\r
+  VOID\r
+  );\r
+\r
+UINT64\r
+EFIAPI\r
+ArmReadCntpCval (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntpCval (\r
+  UINT64   Val\r
+  );\r
+\r
+UINT64\r
+EFIAPI\r
+ArmReadCntvCval (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCntvCval (\r
+  UINT64   Val\r
   );\r
 \r
-RETURN_STATUS\r
-ArmClearMemoryRegionNoExec (\r
-  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,\r
-  IN  UINT64                    Length\r
+UINT64\r
+EFIAPI\r
+ArmReadCntvOff (\r
+  VOID\r
   );\r
 \r
-RETURN_STATUS\r
-ArmSetMemoryRegionReadOnly (\r
-  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,\r
-  IN  UINT64                    Length\r
+VOID\r
+EFIAPI\r
+ArmWriteCntvOff (\r
+  UINT64   Val\r
   );\r
 \r
-RETURN_STATUS\r
-ArmClearMemoryRegionReadOnly (\r
-  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,\r
-  IN  UINT64                    Length\r
+UINTN\r
+EFIAPI\r
+ArmGetPhysicalAddressBits (\r
+  VOID\r
   );\r
 \r
 #endif // __ARM_LIB__\r