UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / ArmPkg / Library / ArmCacheMaintenanceLib / ArmCacheMaintenanceLib.c

diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index db9290f275db59cd0097d9a07f5845376d322caf..bad5d244cbbadc8a96938f48c048dcb13143e26e 100644 (file)
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -20,20 +20,21 @@ CacheRangeOperation (
   IN  UINTN           LineLength\r
   )\r
 {\r
-  UINTN ArmCacheLineAlignmentMask;\r
+  UINTN  ArmCacheLineAlignmentMask;\r
   // Align address (rounding down)\r
-  UINTN AlignedAddress;\r
-  UINTN EndAddress;\r
+  UINTN  AlignedAddress;\r
+  UINTN  EndAddress;\r
 \r
   ArmCacheLineAlignmentMask = LineLength - 1;\r
-  AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
-  EndAddress     = (UINTN)Start + Length;\r
+  AlignedAddress            = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
+  EndAddress                = (UINTN)Start + Length;\r
 \r
   // Perform the line operation on an address in each cache line\r
   while (AlignedAddress < EndAddress) {\r
-    LineOperation(AlignedAddress);\r
+    LineOperation (AlignedAddress);\r
     AlignedAddress += LineLength;\r
   }\r
+\r
   ArmDataSynchronizationBarrier ();\r
 }\r
 \r
@@ -58,15 +59,22 @@ InvalidateDataCache (
 VOID *\r
 EFIAPI\r
 InvalidateInstructionCacheRange (\r
-  IN      VOID                      *Address,\r
-  IN      UINTN                     Length\r
+  IN      VOID   *Address,\r
+  IN      UINTN  Length\r
   )\r
 {\r
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,\r
-    ArmDataCacheLineLength ());\r
-  CacheRangeOperation (Address, Length,\r
+  CacheRangeOperation (\r
+    Address,\r
+    Length,\r
+    ArmCleanDataCacheEntryToPoUByMVA,\r
+    ArmDataCacheLineLength ()\r
+    );\r
+  CacheRangeOperation (\r
+    Address,\r
+    Length,\r
     ArmInvalidateInstructionCacheEntryToPoUByMVA,\r
-    ArmInstructionCacheLineLength ());\r
+    ArmInstructionCacheLineLength ()\r
+    );\r
 \r
   ArmInstructionSynchronizationBarrier ();\r
 \r
@@ -85,12 +93,16 @@ WriteBackInvalidateDataCache (
 VOID *\r
 EFIAPI\r
 WriteBackInvalidateDataCacheRange (\r
-  IN      VOID                      *Address,\r
-  IN      UINTN                     Length\r
+  IN      VOID   *Address,\r
+  IN      UINTN  Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,\r
-    ArmDataCacheLineLength ());\r
+  CacheRangeOperation (\r
+    Address,\r
+    Length,\r
+    ArmCleanInvalidateDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ()\r
+    );\r
   return Address;\r
 }\r
 \r
@@ -106,23 +118,31 @@ WriteBackDataCache (
 VOID *\r
 EFIAPI\r
 WriteBackDataCacheRange (\r
-  IN      VOID                      *Address,\r
-  IN      UINTN                     Length\r
+  IN      VOID   *Address,\r
+  IN      UINTN  Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,\r
-    ArmDataCacheLineLength ());\r
+  CacheRangeOperation (\r
+    Address,\r
+    Length,\r
+    ArmCleanDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ()\r
+    );\r
   return Address;\r
 }\r
 \r
 VOID *\r
 EFIAPI\r
 InvalidateDataCacheRange (\r
-  IN      VOID                      *Address,\r
-  IN      UINTN                     Length\r
+  IN      VOID   *Address,\r
+  IN      UINTN  Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,\r
-    ArmDataCacheLineLength ());\r
+  CacheRangeOperation (\r
+    Address,\r
+    Length,\r
+    ArmInvalidateDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ()\r
+    );\r
   return Address;\r
 }\r