\r
\r
#define SIGN(_U) ((_U) ? "" : "-")\r
-#define WRITE(_W) ((_W) ? "!" : "")\r
+#define WRITE(_Write) ((_Write) ? "!" : "")\r
#define BYTE(_B) ((_B) ? "B":"")\r
#define USER(_B) ((_B) ? "^" : "")\r
\r
)\r
{\r
UINT32 OpCode;\r
- CHAR8 *Type, *Root;\r
- BOOLEAN I, P, U, B, W, L, S, H;\r
+ CHAR8 *Type;\r
+ CHAR8 *Root;\r
+ BOOLEAN Imm, Pre, Up, WriteBack, Write, Load, Sign, Half;\r
UINT32 Rn, Rd, Rm;\r
- UINT32 imode, offset_8, offset_12;\r
+ UINT32 IMod, Offset8, Offset12;\r
UINT32 Index;\r
- UINT32 shift_imm, shift;\r
+ UINT32 ShiftImm, Shift;\r
\r
OpCode = **OpCodePtr;\r
\r
- I = (OpCode & BIT25) == BIT25;\r
- P = (OpCode & BIT24) == BIT24;\r
- U = (OpCode & BIT23) == BIT23;\r
- B = (OpCode & BIT22) == BIT22; // Also called S\r
- W = (OpCode & BIT21) == BIT21;\r
- L = (OpCode & BIT20) == BIT20;\r
- S = (OpCode & BIT6) == BIT6;\r
- H = (OpCode & BIT5) == BIT5;\r
+ Imm = (OpCode & BIT25) == BIT25; // I\r
+ Pre = (OpCode & BIT24) == BIT24; // P\r
+ Up = (OpCode & BIT23) == BIT23; // U\r
+ WriteBack = (OpCode & BIT22) == BIT22; // B, also called S\r
+ Write = (OpCode & BIT21) == BIT21; // W\r
+ Load = (OpCode & BIT20) == BIT20; // L\r
+ Sign = (OpCode & BIT6) == BIT6; // S\r
+ Half = (OpCode & BIT5) == BIT5; // H\r
Rn = (OpCode >> 16) & 0xf;\r
Rd = (OpCode >> 12) & 0xf;\r
Rm = (OpCode & 0xf);\r
\r
// LDREX, STREX\r
if ((OpCode & 0x0fe000f0) == 0x01800090) {\r
- if (L) {\r
+ if (Load) {\r
// A4.1.27 LDREX{<cond>} <Rd>, [<Rn>]\r
AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);\r
} else {\r
\r
// LDM/STM\r
if ((OpCode & 0x0e000000) == 0x08000000) {\r
- if (L) {\r
+ if (Load) {\r
// A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>\r
// A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^\r
// A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^\r
- AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));\r
+ AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
} else {\r
// A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>\r
// A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^\r
- AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));\r
+ AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
}\r
return;\r
}\r
\r
// LDR/STR Address Mode 2\r
if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {\r
- offset_12 = OpCode & 0xfff;\r
+ Offset12 = OpCode & 0xfff;\r
if ((OpCode & 0xfd70f000 ) == 0xf550f000) {\r
Index = AsciiSPrint (Buf, Size, "PLD");\r
} else {\r
- Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]);\r
+ Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);\r
}\r
- if (P) {\r
- if (!I) {\r
+ if (Pre) {\r
+ if (!Imm) {\r
// A5.2.2 [<Rn>, #+/-<offset_12>]\r
// A5.2.5 [<Rn>, #+/-<offset_12>]\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (Up), Offset12, WRITE (Write));\r
} else if ((OpCode & 0x03000ff0) == 0x03000000) {\r
// A5.2.3 [<Rn>, +/-<Rm>]\r
// A5.2.6 [<Rn>, +/-<Rm>]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (Up), WRITE (Write));\r
} else {\r
// A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]\r
// A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!\r
- shift_imm = (OpCode >> 7) & 0x1f;\r
- shift = (OpCode >> 5) & 0x3;\r
- if (shift == 0x0) {\r
+ ShiftImm = (OpCode >> 7) & 0x1f;\r
+ Shift = (OpCode >> 5) & 0x3;\r
+ if (Shift == 0x0) {\r
Type = "LSL";\r
- } else if (shift == 0x1) {\r
+ } else if (Shift == 0x1) {\r
Type = "LSR";\r
- if (shift_imm == 0) {\r
- shift_imm = 32;\r
+ if (ShiftImm == 0) {\r
+ ShiftImm = 32;\r
}\r
- } else if (shift == 0x2) {\r
+ } else if (Shift == 0x2) {\r
Type = "ASR";\r
- } else if (shift_imm == 0) {\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));\r
+ } else if (ShiftImm == 0) {\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));\r
return;\r
} else {\r
Type = "ROR";\r
}\r
\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));\r
}\r
- } else { // !P\r
- if (!I) {\r
+ } else { // !Pre\r
+ if (!Imm) {\r
// A5.2.8 [<Rn>], #+/-<offset_12>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);\r
} else if ((OpCode & 0x03000ff0) == 0x03000000) {\r
// A5.2.9 [<Rn>], +/-<Rm>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);\r
} else {\r
// A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>\r
- shift_imm = (OpCode >> 7) & 0x1f;\r
- shift = (OpCode >> 5) & 0x3;\r
+ ShiftImm = (OpCode >> 7) & 0x1f;\r
+ Shift = (OpCode >> 5) & 0x3;\r
\r
- if (shift == 0x0) {\r
+ if (Shift == 0x0) {\r
Type = "LSL";\r
- } else if (shift == 0x1) {\r
+ } else if (Shift == 0x1) {\r
Type = "LSR";\r
- if (shift_imm == 0) {\r
- shift_imm = 32;\r
+ if (ShiftImm == 0) {\r
+ ShiftImm = 32;\r
}\r
- } else if (shift == 0x2) {\r
+ } else if (Shift == 0x2) {\r
Type = "ASR";\r
- } else if (shift_imm == 0) {\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);\r
+ } else if (ShiftImm == 0) {\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (Up), gReg[Rm]);\r
// FIx me\r
return;\r
} else {\r
Type = "ROR";\r
}\r
\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);\r
}\r
}\r
return;\r
if ((OpCode & 0x0e000000) == 0x00000000) {\r
// LDR/STR address mode 3\r
// LDR|STR{<cond>}H|SH|SB|D <Rd>, <addressing_mode>\r
- if (L) {\r
- if (!S) {\r
+ if (Load) {\r
+ if (!Sign) {\r
Root = "LDR%aH %a, ";\r
- } else if (!H) {\r
+ } else if (!Half) {\r
Root = "LDR%aSB %a, ";\r
} else {\r
Root = "LDR%aSH %a, ";\r
}\r
} else {\r
- if (!S) {\r
+ if (!Sign) {\r
Root = "STR%aH %a ";\r
- } else if (!H) {\r
+ } else if (!Half) {\r
Root = "LDR%aD %a ";\r
} else {\r
Root = "STR%aD %a ";\r
\r
Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);\r
\r
- S = (OpCode & BIT6) == BIT6;\r
- H = (OpCode & BIT5) == BIT5;\r
- offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;\r
- if (P & !W) {\r
+ Sign = (OpCode & BIT6) == BIT6;\r
+ Half = (OpCode & BIT5) == BIT5;\r
+ Offset8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;\r
+ if (Pre & !Write) {\r
// Immediate offset/index\r
- if (B) {\r
+ if (WriteBack) {\r
// A5.3.2 [<Rn>, #+/-<offset_8>]\r
// A5.3.4 [<Rn>, #+/-<offset_8>]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write));\r
} else {\r
// A5.3.3 [<Rn>, +/-<Rm>]\r
// A5.3.5 [<Rn>, +/-<Rm>]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));\r
}\r
} else {\r
// Register offset/index\r
- if (B) {\r
+ if (WriteBack) {\r
// A5.3.6 [<Rn>], #+/-<offset_8>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8);\r
} else {\r
// A5.3.7 [<Rn>], +/-<Rm>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);\r
}\r
}\r
return;\r
if ((OpCode & 0x0fb000f0) == 0x01000050) {\r
// A4.1.108 SWP SWP{<cond>}B <Rd>, <Rm>, [<Rn>]\r
// A4.1.109 SWPB SWP{<cond>}B <Rd>, <Rm>, [<Rn>]\r
- AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]);\r
+ AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (WriteBack), gReg[Rd], gReg[Rm], gReg[Rn]);\r
return;\r
}\r
\r
if ((OpCode & 0xfe5f0f00) == 0xf84d0500) {\r
// A4.1.90 SRS SRS<addressing_mode> #<mode>{!}\r
- AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W));\r
+ AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (Write));\r
return;\r
}\r
\r
if ((OpCode & 0xfe500f00) == 0xf8100500) {\r
// A4.1.59 RFE<addressing_mode> <Rn>{!}\r
- AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W));\r
+ AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (Write));\r
return;\r
}\r
\r
if (((OpCode >> 6) & 0x7) == 0) {\r
AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));\r
} else {\r
- imode = (OpCode >> 18) & 0x3;\r
+ IMod = (OpCode >> 18) & 0x3;\r
Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",\r
- (imode == 3) ? "ID":"IE",\r
+ (IMod == 3) ? "ID":"IE",\r
((OpCode & BIT8) != 0) ? "A":"",\r
((OpCode & BIT7) != 0) ? "I":"",\r
((OpCode & BIT6) != 0) ? "F":"");\r
\r
if ((OpCode & 0x0fb00000) == 0x01000000) {\r
// A4.1.38 MRS{<cond>} <Rd>, CPSR MRS{<cond>} <Rd>, SPSR\r
- AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR");\r
+ AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], WriteBack ? "SPSR" : "CPSR");\r
return;\r
}\r
\r
\r
if ((OpCode & 0x0db00000) == 0x01200000) {\r
// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>\r
- if (I) {\r
+ if (Imm) {\r
// MSR{<cond>} CPSR_<fields>, #<immediate>\r
- AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));\r
+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));\r
} else {\r
// MSR{<cond>} CPSR_<fields>, <Rm>\r
- AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]);\r
+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);\r
}\r
return;\r
}\r
if ((OpCode & 0x0e000000) == 0x0c000000) {\r
// A4.1.19 LDC and A4.1.96 SDC\r
if ((OpCode & 0xf0000000) == 0xf0000000) {\r
- Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);\r
+ Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);\r
} else {\r
- Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);\r
+ Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);\r
}\r
\r
- if (!P) {\r
- if (!W) {\r
+ if (!Pre) {\r
+ if (!Write) {\r
// A5.5.5.5 [<Rn>], <option>\r
AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);\r
} else {\r
// A.5.5.4 [<Rn>], #+/-<offset_8>*4\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (U), OpCode & 0xff);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (Up), OpCode & 0xff);\r
}\r
} else {\r
// A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (U), OpCode & 0xff, WRITE (W));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));\r
}\r
\r
}\r
\r
if ((OpCode & 0x0f000010) == 0x0e000010) {\r
// A4.1.32 MRC2, MCR2\r
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", L ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);\r
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);\r
return;\r
}\r
\r
if ((OpCode & 0x0ff00000) == 0x0c400000) {\r
// A4.1.33 MRRC2, MCRR2\r
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", L ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);\r
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);\r
return;\r
}\r
\r
projects / mirror_edk2.git / blobdiff