#include <Library/PrintLib.h>\r
#include <Library/ArmDisassemblerLib.h>\r
\r
-CHAR8 *gCondition[] = {\r
+CHAR8 *gCondition[] = {\r
"EQ",\r
"NE",\r
"CS",\r
\r
#define COND(_a) gCondition[((_a) >> 28)]\r
\r
-CHAR8 *gReg[] = {\r
+CHAR8 *gReg[] = {\r
"r0",\r
"r1",\r
"r2",\r
"pc"\r
};\r
\r
-CHAR8 *gLdmAdr[] = {\r
+CHAR8 *gLdmAdr[] = {\r
"DA",\r
"IA",\r
"DB",\r
"IB"\r
};\r
\r
-CHAR8 *gLdmStack[] = {\r
+CHAR8 *gLdmStack[] = {\r
"FA",\r
"FD",\r
"EA",\r
"ED"\r
};\r
\r
-#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])\r
+#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])\r
\r
+#define SIGN(_U) ((_U) ? "" : "-")\r
+#define WRITE(_Write) ((_Write) ? "!" : "")\r
+#define BYTE(_B) ((_B) ? "B":"")\r
+#define USER(_B) ((_B) ? "^" : "")\r
\r
-#define SIGN(_U) ((_U) ? "" : "-")\r
-#define WRITE(_Write) ((_Write) ? "!" : "")\r
-#define BYTE(_B) ((_B) ? "B":"")\r
-#define USER(_B) ((_B) ? "^" : "")\r
-\r
-CHAR8 mMregListStr[4*15 + 1];\r
+CHAR8 mMregListStr[4*15 + 1];\r
\r
CHAR8 *\r
MRegList (\r
UINT32 OpCode\r
)\r
{\r
- UINTN Index, Start, End;\r
- BOOLEAN First;\r
+ UINTN Index, Start, End;\r
+ BOOLEAN First;\r
\r
mMregListStr[0] = '\0';\r
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "{");\r
}\r
}\r
}\r
+\r
if (First) {\r
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");\r
}\r
+\r
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");\r
\r
// BugBug: Make caller pass in buffer it is cleaner\r
\r
UINT32\r
RotateRight (\r
- IN UINT32 Op,\r
- IN UINT32 Shift\r
+ IN UINT32 Op,\r
+ IN UINT32 Shift\r
)\r
{\r
return (Op >> Shift) | (Op << (32 - Shift));\r
}\r
\r
-\r
/**\r
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to\r
point to next instruction.\r
**/\r
VOID\r
DisassembleArmInstruction (\r
- IN UINT32 **OpCodePtr,\r
- OUT CHAR8 *Buf,\r
- OUT UINTN Size,\r
- IN BOOLEAN Extended\r
+ IN UINT32 **OpCodePtr,\r
+ OUT CHAR8 *Buf,\r
+ OUT UINTN Size,\r
+ IN BOOLEAN Extended\r
)\r
{\r
- UINT32 OpCode;\r
- CHAR8 *Type;\r
- CHAR8 *Root;\r
- BOOLEAN Imm, Pre, Up, WriteBack, Write, Load, Sign, Half;\r
- UINT32 Rn, Rd, Rm;\r
- UINT32 IMod, Offset8, Offset12;\r
- UINT32 Index;\r
- UINT32 ShiftImm, Shift;\r
+ UINT32 OpCode;\r
+ CHAR8 *Type;\r
+ CHAR8 *Root;\r
+ BOOLEAN Imm, Pre, Up, WriteBack, Write, Load, Sign, Half;\r
+ UINT32 Rn, Rd, Rm;\r
+ UINT32 IMod, Offset8, Offset12;\r
+ UINT32 Index;\r
+ UINT32 ShiftImm, Shift;\r
\r
OpCode = **OpCodePtr;\r
\r
- Imm = (OpCode & BIT25) == BIT25; // I\r
- Pre = (OpCode & BIT24) == BIT24; // P\r
- Up = (OpCode & BIT23) == BIT23; // U\r
+ Imm = (OpCode & BIT25) == BIT25; // I\r
+ Pre = (OpCode & BIT24) == BIT24; // P\r
+ Up = (OpCode & BIT23) == BIT23; // U\r
WriteBack = (OpCode & BIT22) == BIT22; // B, also called S\r
- Write = (OpCode & BIT21) == BIT21; // W\r
- Load = (OpCode & BIT20) == BIT20; // L\r
- Sign = (OpCode & BIT6) == BIT6; // S\r
- Half = (OpCode & BIT5) == BIT5; // H\r
- Rn = (OpCode >> 16) & 0xf;\r
- Rd = (OpCode >> 12) & 0xf;\r
- Rm = (OpCode & 0xf);\r
-\r
+ Write = (OpCode & BIT21) == BIT21; // W\r
+ Load = (OpCode & BIT20) == BIT20; // L\r
+ Sign = (OpCode & BIT6) == BIT6; // S\r
+ Half = (OpCode & BIT5) == BIT5; // H\r
+ Rn = (OpCode >> 16) & 0xf;\r
+ Rd = (OpCode >> 12) & 0xf;\r
+ Rm = (OpCode & 0xf);\r
\r
if (Extended) {\r
Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode);\r
- Buf += Index;\r
+ Buf += Index;\r
Size -= Index;\r
}\r
\r
// A4.1.27 LDREX{<cond>} <Rd>, [<Rn>]\r
AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);\r
} else {\r
- // A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]\r
+ // A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]\r
AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);\r
}\r
+\r
return;\r
}\r
\r
// A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>\r
// A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^\r
// A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^\r
- AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
+ AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
} else {\r
// A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>\r
// A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^\r
- AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
+ AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));\r
}\r
+\r
return;\r
}\r
\r
// LDR/STR Address Mode 2\r
- if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {\r
+ if (((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000) == 0xf550f000)) {\r
Offset12 = OpCode & 0xfff;\r
- if ((OpCode & 0xfd70f000 ) == 0xf550f000) {\r
+ if ((OpCode & 0xfd70f000) == 0xf550f000) {\r
Index = AsciiSPrint (Buf, Size, "PLD");\r
} else {\r
- Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);\r
+ Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T" : "", gReg[Rd]);\r
}\r
+\r
if (Pre) {\r
if (!Imm) {\r
// A5.2.2 [<Rn>, #+/-<offset_12>]\r
// A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]\r
// A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!\r
ShiftImm = (OpCode >> 7) & 0x1f;\r
- Shift = (OpCode >> 5) & 0x3;\r
+ Shift = (OpCode >> 5) & 0x3;\r
if (Shift == 0x0) {\r
Type = "LSL";\r
} else if (Shift == 0x1) {\r
\r
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));\r
}\r
- } else { // !Pre\r
+ } else {\r
+ // !Pre\r
if (!Imm) {\r
// A5.2.8 [<Rn>], #+/-<offset_12>\r
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);\r
} else {\r
// A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>\r
ShiftImm = (OpCode >> 7) & 0x1f;\r
- Shift = (OpCode >> 5) & 0x3;\r
+ Shift = (OpCode >> 5) & 0x3;\r
\r
if (Shift == 0x0) {\r
Type = "LSL";\r
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);\r
}\r
}\r
+\r
return;\r
}\r
\r
\r
Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);\r
\r
- Sign = (OpCode & BIT6) == BIT6;\r
- Half = (OpCode & BIT5) == BIT5;\r
+ Sign = (OpCode & BIT6) == BIT6;\r
+ Half = (OpCode & BIT5) == BIT5;\r
Offset8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;\r
if (Pre & !Write) {\r
// Immediate offset/index\r
if (WriteBack) {\r
// A5.3.2 [<Rn>, #+/-<offset_8>]\r
// A5.3.4 [<Rn>, #+/-<offset_8>]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write));\r
} else {\r
// A5.3.3 [<Rn>, +/-<Rm>]\r
// A5.3.5 [<Rn>, +/-<Rm>]!\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));\r
}\r
} else {\r
// Register offset/index\r
if (WriteBack) {\r
// A5.3.6 [<Rn>], #+/-<offset_8>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8);\r
} else {\r
// A5.3.7 [<Rn>], +/-<Rm>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);\r
}\r
}\r
+\r
return;\r
}\r
\r
if (((OpCode >> 6) & 0x7) == 0) {\r
AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));\r
} else {\r
- IMod = (OpCode >> 18) & 0x3;\r
- Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",\r
- (IMod == 3) ? "ID":"IE",\r
- ((OpCode & BIT8) != 0) ? "A":"",\r
- ((OpCode & BIT7) != 0) ? "I":"",\r
- ((OpCode & BIT6) != 0) ? "F":"");\r
+ IMod = (OpCode >> 18) & 0x3;\r
+ Index = AsciiSPrint (\r
+ Buf,\r
+ Size,\r
+ "CPS%a %a%a%a",\r
+ (IMod == 3) ? "ID" : "IE",\r
+ ((OpCode & BIT8) != 0) ? "A" : "",\r
+ ((OpCode & BIT7) != 0) ? "I" : "",\r
+ ((OpCode & BIT6) != 0) ? "F" : ""\r
+ );\r
if ((OpCode & BIT17) != 0) {\r
AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);\r
}\r
}\r
+\r
return;\r
}\r
\r
return;\r
}\r
\r
-\r
if ((OpCode & 0x0db00000) == 0x01200000) {\r
// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>\r
if (Imm) {\r
// MSR{<cond>} CPSR_<fields>, #<immediate>\r
- AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));\r
+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));\r
} else {\r
// MSR{<cond>} CPSR_<fields>, <Rm>\r
AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);\r
}\r
+\r
return;\r
}\r
\r
if ((OpCode & 0x0e000000) == 0x0c000000) {\r
// A4.1.19 LDC and A4.1.96 SDC\r
if ((OpCode & 0xf0000000) == 0xf0000000) {\r
- Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);\r
+ Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC" : "SDC", (OpCode >> 8) & 0xf, Rd);\r
} else {\r
- Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);\r
+ Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC" : "SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);\r
}\r
\r
if (!Pre) {\r
if (!Write) {\r
// A5.5.5.5 [<Rn>], <option>\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);\r
} else {\r
// A.5.5.4 [<Rn>], #+/-<offset_8>*4\r
- AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (Up), OpCode & 0xff);\r
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (Up), OpCode & 0xff);\r
}\r
} else {\r
// A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!\r
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));\r
}\r
-\r
}\r
\r
if ((OpCode & 0x0f000010) == 0x0e000010) {\r
// A4.1.32 MRC2, MCR2\r
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);\r
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC" : "MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);\r
return;\r
}\r
\r
if ((OpCode & 0x0ff00000) == 0x0c400000) {\r
// A4.1.33 MRRC2, MCRR2\r
- AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);\r
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC" : "MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);\r
return;\r
}\r
\r
*OpCodePtr += 1;\r
return;\r
}\r
-\r
projects / mirror_edk2.git / blobdiff