ArmPkg: update InvalidateInstructionCacheRange to flush only to PoU

[mirror_edk2.git] / ArmPkg / Library / ArmLib / ArmV7 / ArmV7Support.S

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 5f030d92de3111f274f36aab9aec0b36991dbd21..7de1b11ef818b604b4d02b718d5efa696e25f751 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -19,6 +19,7 @@
 GCC_ASM_EXPORT (ArmInvalidateInstructionCache)\r
 GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)\r
 GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)\r
+GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)\r
 GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)\r
 GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)\r
 GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)\r
@@ -69,6 +70,11 @@ ASM_PFX(ArmCleanDataCacheEntryByMVA):
   bx      lr\r
 \r
 \r
+ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):\r
+  mcr     p15, 0, r0, c7, c11, 1  @clean single data cache line to PoU\r
+  bx      lr\r
+\r
+\r
 ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):\r
   mcr     p15, 0, r0, c7, c14, 1  @clean and invalidate single data cache line\r
   bx      lr\r